drivers/video/rockchip/transmitter/rk31xx_lvds.c

   1 /*
   2  * drivers/video/rockchip/transmitter/rk31xx_lvds.c
   3  *
   4  * Copyright (C) 2014 ROCKCHIP, Inc.
   5  * Author: zhuangwenlong<zwl@rock-chips.com>
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  */
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/slab.h>
  20 #include <linux/io.h>
  21 #include <linux/types.h>
  22 #include <linux/i2c.h>
  23 #include <linux/rk_fb.h>
  24 #include <linux/clk.h>
  25 #include <linux/delay.h>
  26 #include <linux/rockchip/iomap.h>
  27 #include <linux/rockchip/grf.h>
  28 #include "rk31xx_lvds.h"
  29
  30
  31 #define grf_readl(offset)       readl_relaxed(RK_GRF_VIRT + offset)
  32 #define grf_writel(v,offset)                                    \
  33         do {                                                    \
  34                 writel_relaxed(v, RK_GRF_VIRT + offset);        \
  35                 dsb();                                          \
  36         } while (0)
  37
  38
  39 static struct rk_lvds_device *rk31xx_lvds;
  40
  41 static int rk31xx_lvds_clk_init(struct rk_lvds_device *lvds)
  42 {
  43         lvds->pclk = devm_clk_get(lvds->dev, "pclk_lvds");
  44         if (IS_ERR(lvds->pclk)) {
  45                 dev_err(lvds->dev, "get pclk failed\n");
  46                 return PTR_ERR(lvds->pclk);
  47         }
  48
  49         lvds->ctrl_pclk = devm_clk_get(lvds->dev, "pclk_lvds_ctl");
  50         if (IS_ERR(lvds->ctrl_pclk)) {
  51                 dev_err(lvds->dev, "get ctrl pclk failed\n");
  52                 return PTR_ERR(lvds->ctrl_pclk);
  53         }
  54
  55         lvds->ctrl_hclk = devm_clk_get(lvds->dev, "hclk_vio_h2p");
  56         if (IS_ERR(lvds->ctrl_hclk)) {
  57                 dev_err(lvds->dev, "get ctrl hclk failed\n");
  58                 return PTR_ERR(lvds->ctrl_hclk);
  59         }
  60
  61         return 0;
  62 }
  63
  64 static int rk31xx_lvds_clk_enable(struct rk_lvds_device *lvds)
  65 {
  66         if (!lvds->clk_on) {
  67                 clk_prepare_enable(lvds->pclk);
  68                 clk_prepare_enable(lvds->ctrl_pclk);
  69                 clk_prepare_enable(lvds->ctrl_hclk);
  70                 lvds->clk_on = true;
  71         }
  72
  73         return 0;
  74 }
  75
  76 static int rk31xx_lvds_clk_disable(struct rk_lvds_device *lvds)
  77 {
  78         if (lvds->clk_on) {
  79                 clk_disable_unprepare(lvds->pclk);
  80                 clk_disable_unprepare(lvds->ctrl_hclk);
  81                 clk_disable_unprepare(lvds->ctrl_pclk);
  82                 lvds->clk_on = false;
  83         }
  84
  85         return 0;
  86 }
  87
  88 static int rk31xx_lvds_pwr_on(void)
  89 {
  90         struct rk_lvds_device *lvds = rk31xx_lvds;
  91
  92         if (lvds->screen.type == SCREEN_LVDS) {
  93                 /* power up lvds pll and ldo */
  94                 lvds_msk_reg(lvds, MIPIPHY_REG1,
  95                              m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
  96                              v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) | v_PLL_PWR_DOWN(0));
  97
  98                 /* enable lvds lane and power on pll */
  99                 lvds_writel(lvds, MIPIPHY_REGEB,
 100                             v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
 101                             v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
 102
 103                 /* enable lvds */
 104                 lvds_msk_reg(lvds, MIPIPHY_REGE3,
 105                              m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 106                              v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
 107         } else {
 108                 lvds_msk_reg(lvds, MIPIPHY_REGE3,
 109                              m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 110                              v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
 111         }
 112         return 0;
 113 }
 114
 115 static int rk31xx_lvds_pwr_off(void)
 116 {
 117         struct rk_lvds_device *lvds = rk31xx_lvds;
 118
 119         /* disable lvds lane and power off pll */
 120         lvds_writel(lvds, MIPIPHY_REGEB,
 121                     v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
 122                     v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
 123
 124         /* power down lvds pll and bandgap */
 125         lvds_msk_reg(lvds, MIPIPHY_REG1,
 126                      m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
 127                      v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
 128
 129         /* disable lvds */
 130         lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
 131                      v_LVDS_EN(0) | v_TTL_EN(0));
 132         return 0;
 133 }
 134
 135 static int rk31xx_lvds_disable(void)
 136 {
 137         struct rk_lvds_device *lvds = rk31xx_lvds;
 138
 139         if (unlikely(!lvds) || !lvds->sys_state)
 140                 return 0;
 141
 142         grf_writel(v_LVDSMODE_EN(0) | v_MIPIPHY_TTL_EN(0), RK312X_GRF_LVDS_CON0);
 143
 144         rk31xx_lvds_pwr_off();
 145         rk31xx_lvds_clk_disable(lvds);
 146
 147 #if !defined(CONFIG_RK_FPGA)
 148         if (lvds->screen.type == SCREEN_RGB) {
 149                 if (lvds->dev->pins) {
 150                         pinctrl_select_state(lvds->dev->pins->p,
 151                                              lvds->dev->pins->sleep_state);
 152                 } else if (lvds->pins && !IS_ERR(lvds->pins->sleep_state)) {
 153                         pinctrl_select_state(lvds->pins->p,
 154                                              lvds->pins->sleep_state);
 155                 }
 156         }
 157 #endif
 158         lvds->sys_state = false;
 159         return 0;
 160 }
 161
 162 static void rk31xx_output_lvds(struct rk_lvds_device *lvds,
 163                                struct rk_screen *screen)
 164 {
 165         u32 val = 0;
 166         u32 delay_times = 20;
 167
 168         /* if LVDS transmitter source from VOP, vop_dclk need get invert
 169          * set iomux in dts pinctrl
 170          */
 171         val = 0;
 172         val |= v_LVDSMODE_EN(1) | v_MIPIPHY_TTL_EN(0);  /* enable lvds mode */
 173         val |= v_LVDS_DATA_SEL(LVDS_DATA_FROM_LCDC);    /* config data source */
 174         val |= v_LVDS_OUTPUT_FORMAT(screen->lvds_format); /* config lvds_format */
 175         val |= v_LVDS_MSBSEL(LVDS_MSB_D7);      /* LSB receive mode */
 176         val |= v_MIPIPHY_LANE0_EN(1) | v_MIPIDPI_FORCEX_EN(1);
 177         grf_writel(val, RK312X_GRF_LVDS_CON0);
 178
 179         /* digital internal disable */
 180         lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
 181
 182         /* set pll prediv and fbdiv */
 183         lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
 184         lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
 185
 186         lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
 187
 188         /* set lvds mode and reset phy config */
 189         lvds_msk_reg(lvds, MIPIPHY_REGE0,
 190                      m_MSB_SEL | m_DIG_INTER_RST,
 191                      v_MSB_SEL(1) | v_DIG_INTER_RST(1));
 192
 193         /* power on pll and enable lane */
 194         rk31xx_lvds_pwr_on();
 195
 196         /* delay for waitting pll lock on */
 197         while (delay_times--) {
 198                 if (lvds_phy_lockon(lvds)) {
 199                         msleep(1);
 200                         break;
 201                 }
 202                 udelay(100);
 203         }
 204         /* digital internal enable */
 205         lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
 206
 207 #if 0
 208         lvds_writel(lvds, MIPIPHY_REGE2, 0xa0); /* timing */
 209         lvds_writel(lvds, MIPIPHY_REGE7, 0xfc); /* phase */
 210 #endif
 211
 212 }
 213
 214 static void rk31xx_output_lvttl(struct rk_lvds_device *lvds,
 215                                 struct rk_screen *screen)
 216 {
 217         u32 val = 0;
 218
 219         /* iomux to lcdc */
 220 #if defined(CONFIG_RK_FPGA)
 221         grf_writel(0xffff5555, RK312X_GRF_GPIO2B_IOMUX);
 222         grf_writel(0x00ff0055, RK312X_GRF_GPIO2C_IOMUX);
 223         grf_writel(0x77771111, 0x00e8); /* RK312X_GRF_GPIO2C_IOMUX2 */
 224         grf_writel(0x700c1004, RK312X_GRF_GPIO2D_IOMUX);
 225 #else
 226         if (lvds->pins && !IS_ERR(lvds->pins->default_state))
 227                 pinctrl_select_state(lvds->pins->p, lvds->pins->default_state);
 228 #endif
 229
 230         val |= v_LVDSMODE_EN(0) | v_MIPIPHY_TTL_EN(1);  /* enable lvds mode */
 231         val |= v_LVDS_DATA_SEL(LVDS_DATA_FROM_LCDC);    /* config data source */
 232         grf_writel(0xffff0380, RK312X_GRF_LVDS_CON0);
 233
 234         val = v_MIPITTL_CLK_EN(1) | v_MIPITTL_LANE0_EN(1) |
 235                 v_MIPITTL_LANE1_EN(1) | v_MIPITTL_LANE2_EN(1) |
 236                 v_MIPITTL_LANE3_EN(1);
 237         grf_writel(val, RK312X_GRF_SOC_CON1);
 238
 239         /* enable lane */
 240         lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
 241         val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
 242                 v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
 243         lvds_writel(lvds, MIPIPHY_REGEB, val);
 244
 245         /* set ttl mode and reset phy config */
 246         val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
 247                 v_MSB_SEL(1) | v_DIG_INTER_RST(1);
 248         lvds_writel(lvds, MIPIPHY_REGE0, val);
 249
 250         rk31xx_lvds_pwr_on();
 251
 252 }
 253
 254 static int rk31xx_lvds_en(void)
 255 {
 256         struct rk_lvds_device *lvds = rk31xx_lvds;
 257         struct rk_screen *screen;
 258
 259         if (unlikely(!lvds) || lvds->sys_state)
 260                 return 0;
 261
 262         screen = &lvds->screen;
 263         rk_fb_get_prmry_screen(screen);
 264
 265         /* enable clk */
 266         rk31xx_lvds_clk_enable(lvds);
 267
 268         switch (screen->type) {
 269         case SCREEN_LVDS:
 270                 rk31xx_output_lvds(lvds, screen);
 271                 break;
 272         case SCREEN_RGB:
 273                 rk31xx_output_lvttl(lvds, screen);
 274                 break;
 275         default:
 276                 printk("unsupport screen type\n");
 277                 break;
 278         }
 279
 280         lvds->sys_state = true;
 281         return 0;
 282 }
 283
 284 static struct rk_fb_trsm_ops trsm_lvds_ops = {
 285         .enable = rk31xx_lvds_en,
 286         .disable = rk31xx_lvds_disable,
 287         .dsp_pwr_on = rk31xx_lvds_pwr_on,
 288         .dsp_pwr_off = rk31xx_lvds_pwr_off,
 289 };
 290
 291 static int rk31xx_lvds_probe(struct platform_device *pdev)
 292 {
 293         struct rk_lvds_device *lvds;
 294         struct resource *res;
 295         struct device_node *np = pdev->dev.of_node;
 296         int ret = 0;
 297
 298         if (!np) {
 299                 dev_err(&pdev->dev, "Don't find lvds device tree node.\n");
 300                 return -EINVAL;
 301         }
 302
 303         lvds = devm_kzalloc(&pdev->dev, sizeof(struct rk_lvds_device), GFP_KERNEL);
 304         if (!lvds) {
 305                 dev_err(&pdev->dev, "kzalloc rk31xx lvds failed\n");
 306                 return -ENOMEM;
 307         }
 308         lvds->dev = &pdev->dev;
 309
 310         rk_fb_get_prmry_screen(&lvds->screen);
 311         if ((lvds->screen.type != SCREEN_RGB) &&
 312                 (lvds->screen.type != SCREEN_LVDS)) {
 313                 dev_err(&pdev->dev, "screen is not lvds/rgb!\n");
 314                 ret = -EINVAL;
 315                 goto err_screen_type;
 316         }
 317
 318         platform_set_drvdata(pdev, lvds);
 319         dev_set_name(lvds->dev, "rk31xx-lvds");
 320
 321         if (lvds->dev->pins == NULL && lvds->screen.type == SCREEN_RGB) {
 322                 lvds->pins = devm_kzalloc(lvds->dev, sizeof(*(lvds->pins)),
 323                                           GFP_KERNEL);
 324                 if (!lvds->pins) {
 325                         dev_err(lvds->dev, "kzalloc lvds pins failed\n");
 326                         return -ENOMEM;
 327                 }
 328
 329                 lvds->pins->p = devm_pinctrl_get(lvds->dev);
 330                 if (IS_ERR(lvds->pins->p)) {
 331                         dev_info(lvds->dev, "no pinctrl handle\n");
 332                         devm_kfree(lvds->dev, lvds->pins);
 333                         lvds->pins = NULL;
 334                 } else {
 335                         lvds->pins->default_state =
 336                                 pinctrl_lookup_state(lvds->pins->p, "lcdc");
 337                         lvds->pins->sleep_state =
 338                                 pinctrl_lookup_state(lvds->pins->p, "sleep");
 339                         if (IS_ERR(lvds->pins->default_state)) {
 340                                 dev_info(lvds->dev, "no default pinctrl state\n");
 341                                 devm_kfree(lvds->dev, lvds->pins);
 342                                 lvds->pins = NULL;
 343                         }
 344                 }
 345         }
 346
 347         /* lvds regs on MIPIPHY_REG */
 348         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mipi_lvds_phy");
 349         lvds->regbase = devm_ioremap_resource(&pdev->dev, res);
 350         if (IS_ERR(lvds->regbase)) {
 351                 dev_err(&pdev->dev, "ioremap mipi-lvds phy reg failed\n");
 352                 return PTR_ERR(lvds->regbase);
 353         }
 354
 355         /* pll lock on status reg that is MIPICTRL Register */
 356         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mipi_lvds_ctl");
 357         lvds->ctrl_reg = devm_ioremap_resource(&pdev->dev, res);
 358         if (IS_ERR(lvds->ctrl_reg)) {
 359                 dev_err(&pdev->dev, "ioremap mipi-lvds ctl reg failed\n");
 360                 return PTR_ERR(lvds->ctrl_reg);
 361         }
 362
 363         ret = rk31xx_lvds_clk_init(lvds);
 364         if(ret < 0)
 365                 goto err_clk_init;
 366
 367         if (support_uboot_display()) {
 368                 rk31xx_lvds_clk_enable(lvds);
 369                 lvds->sys_state = true;
 370         }
 371
 372         rk31xx_lvds = lvds;
 373         rk_fb_trsm_ops_register(&trsm_lvds_ops, SCREEN_LVDS);
 374         dev_info(&pdev->dev, "rk31xx lvds driver probe success\n");
 375
 376         return 0;
 377
 378 err_clk_init:
 379 err_screen_type:
 380         devm_kfree(&pdev->dev, lvds);
 381         lvds = NULL;
 382         return ret;
 383 }
 384
 385 static int rk31xx_lvds_remove(struct platform_device *pdev)
 386 {
 387         return 0;
 388 }
 389
 390 static void rk31xx_lvds_shutdown(struct platform_device *pdev)
 391 {
 392         return;
 393 }
 394
 395 #if defined(CONFIG_OF)
 396 static const struct of_device_id rk31xx_lvds_dt_ids[] = {
 397         {.compatible = "rockchip,rk31xx-lvds",},
 398         {}
 399 };
 400 #endif
 401
 402 static struct platform_driver rk31xx_lvds_driver = {
 403         .driver         = {
 404                 .name   = "rk31xx-lvds",
 405                 .owner  = THIS_MODULE,
 406 #if defined(CONFIG_OF)
 407                 .of_match_table = of_match_ptr(rk31xx_lvds_dt_ids),
 408 #endif
 409         },
 410         .probe          = rk31xx_lvds_probe,
 411         .remove         = rk31xx_lvds_remove,
 412         .shutdown       = rk31xx_lvds_shutdown,
 413 };
 414
 415 static int __init rk31xx_lvds_init(void)
 416 {
 417         return platform_driver_register(&rk31xx_lvds_driver);
 418 }
 419
 420 static void __exit rk31xx_lvds_exit(void)
 421 {
 422         platform_driver_unregister(&rk31xx_lvds_driver);
 423 }
 424
 425 fs_initcall(rk31xx_lvds_init);
 426 module_exit(rk31xx_lvds_exit);
 427