1 #ifndef _RK31XX_LVDS_H_
2 #define _RK31XX_LVDS_H_
4 #include <linux/rk_screen.h>
7 #define BITS(x, bit) ((x) << (bit))
8 #define BITS_MASK(x, mask, bit) BITS((x) & (mask), bit)
9 #define BITS_EN(mask, bit) BITS(mask, bit + 16)
11 /* RK312X_GRF_LVDS_CON0 */
12 #define v_LVDS_DATA_SEL(x) (BITS_MASK(x, 1, 0) | BITS_EN(1, 0))
13 #define v_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 1) | BITS_EN(3, 1))
14 #define v_LVDS_MSBSEL(x) (BITS_MASK(x, 1, 3) | BITS_EN(1, 3))
15 #define v_LVDSMODE_EN(x) (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
16 #define v_MIPIPHY_TTL_EN(x) (BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
17 #define v_MIPIPHY_LANE0_EN(x) (BITS_MASK(x, 1, 8) | BITS_EN(1, 8))
18 #define v_MIPIDPI_FORCEX_EN(x) (BITS_MASK(x, 1, 9) | BITS_EN(1, 9))
21 LVDS_DATA_FROM_LCDC = 0,
30 /* RK312X_GRF_SOC_CON1 */
31 #define v_MIPITTL_CLK_EN(x) (BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
32 #define v_MIPITTL_LANE0_EN(x) (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
33 #define v_MIPITTL_LANE1_EN(x) (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
34 #define v_MIPITTL_LANE2_EN(x) (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
35 #define v_MIPITTL_LANE3_EN(x) (BITS_MASK(x, 1, 14) | BITS_EN(1, 14))
38 #define MIPIPHY_REG0 0x0000
39 #define m_LANE_EN_0 BITS(1, 2)
40 #define m_LANE_EN_1 BITS(1, 3)
41 #define m_LANE_EN_2 BITS(1, 4)
42 #define m_LANE_EN_3 BITS(1, 5)
43 #define m_LANE_EN_CLK BITS(1, 5)
44 #define v_LANE_EN_0(x) BITS(1, 2)
45 #define v_LANE_EN_1(x) BITS(1, 3)
46 #define v_LANE_EN_2(x) BITS(1, 4)
47 #define v_LANE_EN_3(x) BITS(1, 5)
48 #define v_LANE_EN_CLK(x) BITS(1, 5)
50 #define MIPIPHY_REG1 0x0004
51 #define m_SYNC_RST BITS(1, 0)
52 #define m_LDO_PWR_DOWN BITS(1, 1)
53 #define m_PLL_PWR_DOWN BITS(1, 2)
54 #define v_SYNC_RST(x) BITS_MASK(x, 1, 0)
55 #define v_LDO_PWR_DOWN(x) BITS_MASK(x, 1, 1)
56 #define v_PLL_PWR_DOWN(x) BITS_MASK(x, 1, 2)
58 #define MIPIPHY_REG3 0x000c
59 #define m_PREDIV BITS(0x1f, 0)
60 #define m_FBDIV_MSB BITS(1, 5)
61 #define v_PREDIV(x) BITS_MASK(x, 0x1f, 0)
62 #define v_FBDIV_MSB(x) BITS_MASK(x, 1, 5)
64 #define MIPIPHY_REG4 0x0010
65 #define v_FBDIV_LSB(x) BITS_MASK(x, 0xff, 0)
67 #define MIPIPHY_REGE0 0x0380
68 #define m_MSB_SEL BITS(1, 0)
69 #define m_DIG_INTER_RST BITS(1, 2)
70 #define m_LVDS_MODE_EN BITS(1, 5)
71 #define m_TTL_MODE_EN BITS(1, 6)
72 #define m_MIPI_MODE_EN BITS(1, 7)
73 #define v_MSB_SEL(x) BITS_MASK(x, 1, 0)
74 #define v_DIG_INTER_RST(x) BITS_MASK(x, 1, 2)
75 #define v_LVDS_MODE_EN(x) BITS_MASK(x, 1, 5)
76 #define v_TTL_MODE_EN(x) BITS_MASK(x, 1, 6)
77 #define v_MIPI_MODE_EN(x) BITS_MASK(x, 1, 7)
79 #define MIPIPHY_REGE1 0x0384
80 #define m_DIG_INTER_EN BITS(1, 7)
81 #define v_DIG_INTER_EN(x) BITS_MASK(x, 1, 7)
83 #define MIPIPHY_REGE3 0x038c
84 #define m_MIPI_EN BITS(1, 0)
85 #define m_LVDS_EN BITS(1, 1)
86 #define m_TTL_EN BITS(1, 2)
87 #define v_MIPI_EN(x) BITS_MASK(x, 1, 0)
88 #define v_LVDS_EN(x) BITS_MASK(x, 1, 1)
89 #define v_TTL_EN(x) BITS_MASK(x, 1, 2)
91 #define MIPIPHY_REGE8 0x03a0
93 #define MIPIPHY_REGEB 0x03ac
94 #define v_PLL_PWR_OFF(x) BITS_MASK(x, 1, 2)
95 #define v_LANECLK_EN(x) BITS_MASK(x, 1, 3)
96 #define v_LANE3_EN(x) BITS_MASK(x, 1, 4)
97 #define v_LANE2_EN(x) BITS_MASK(x, 1, 5)
98 #define v_LANE1_EN(x) BITS_MASK(x, 1, 6)
99 #define v_LANE0_EN(x) BITS_MASK(x, 1, 7)
102 struct rk_lvds_device {
104 void __iomem *regbase;
105 void __iomem *ctrl_reg;
106 struct clk *pclk; /*phb clk*/
107 struct clk *ctrl_pclk; /* mipi ctrl pclk*/
108 struct clk *ctrl_hclk; /* mipi ctrl hclk*/
109 struct rk_screen screen;
112 #ifdef CONFIG_PINCTRL
113 struct dev_pin_info *pins;
117 static inline int lvds_writel(struct rk_lvds_device *lvds, u32 offset, u32 val)
119 writel_relaxed(val, lvds->regbase + offset);
123 static inline int lvds_msk_reg(struct rk_lvds_device *lvds, u32 offset,
128 temp = readl_relaxed(lvds->regbase + offset) & (0xFF - (msk));
129 writel_relaxed(temp | ((val) & (msk)), lvds->regbase + offset);
133 static inline u32 lvds_readl(struct rk_lvds_device *lvds, u32 offset)
135 return readl_relaxed(lvds->regbase + offset);
138 static inline u32 lvds_phy_lockon(struct rk_lvds_device *lvds)
142 val = readl_relaxed(lvds->ctrl_reg);