2173869afb4945fb2cf47511c40503fa42c13f5c
[firefly-linux-kernel-4.4.55.git] / drivers / video / s3c-fb.c
1 /* linux/drivers/video/s3c-fb.c
2  *
3  * Copyright 2008 Openmoko Inc.
4  * Copyright 2008-2010 Simtec Electronics
5  *      Ben Dooks <ben@simtec.co.uk>
6  *      http://armlinux.simtec.co.uk/
7  *
8  * Samsung SoC Framebuffer driver
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software FoundatIon.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/init.h>
21 #include <linux/clk.h>
22 #include <linux/fb.h>
23 #include <linux/io.h>
24 #include <linux/uaccess.h>
25 #include <linux/interrupt.h>
26
27 #include <mach/map.h>
28 #include <plat/regs-fb-v4.h>
29 #include <plat/fb.h>
30
31 /* This driver will export a number of framebuffer interfaces depending
32  * on the configuration passed in via the platform data. Each fb instance
33  * maps to a hardware window. Currently there is no support for runtime
34  * setting of the alpha-blending functions that each window has, so only
35  * window 0 is actually useful.
36  *
37  * Window 0 is treated specially, it is used for the basis of the LCD
38  * output timings and as the control for the output power-down state.
39 */
40
41 /* note, the previous use of <mach/regs-fb.h> to get platform specific data
42  * has been replaced by using the platform device name to pick the correct
43  * configuration data for the system.
44 */
45
46 #ifdef CONFIG_FB_S3C_DEBUG_REGWRITE
47 #undef writel
48 #define writel(v, r) do { \
49         printk(KERN_DEBUG "%s: %08x => %p\n", __func__, (unsigned int)v, r); \
50         __raw_writel(v, r); } while(0)
51 #endif /* FB_S3C_DEBUG_REGWRITE */
52
53 /* irq_flags bits */
54 #define S3C_FB_VSYNC_IRQ_EN     0
55
56 #define VSYNC_TIMEOUT_MSEC 50
57
58 struct s3c_fb;
59
60 #define VALID_BPP(x) (1 << ((x) - 1))
61
62 #define OSD_BASE(win, variant) ((variant).osd + ((win) * (variant).osd_stride))
63 #define VIDOSD_A(win, variant) (OSD_BASE(win, variant) + 0x00)
64 #define VIDOSD_B(win, variant) (OSD_BASE(win, variant) + 0x04)
65 #define VIDOSD_C(win, variant) (OSD_BASE(win, variant) + 0x08)
66 #define VIDOSD_D(win, variant) (OSD_BASE(win, variant) + 0x0C)
67
68 /**
69  * struct s3c_fb_variant - fb variant information
70  * @is_2443: Set if S3C2443/S3C2416 style hardware.
71  * @nr_windows: The number of windows.
72  * @vidtcon: The base for the VIDTCONx registers
73  * @wincon: The base for the WINxCON registers.
74  * @winmap: The base for the WINxMAP registers.
75  * @keycon: The abse for the WxKEYCON registers.
76  * @buf_start: Offset of buffer start registers.
77  * @buf_size: Offset of buffer size registers.
78  * @buf_end: Offset of buffer end registers.
79  * @osd: The base for the OSD registers.
80  * @palette: Address of palette memory, or 0 if none.
81  * @has_prtcon: Set if has PRTCON register.
82  * @has_shadowcon: Set if has SHADOWCON register.
83  */
84 struct s3c_fb_variant {
85         unsigned int    is_2443:1;
86         unsigned short  nr_windows;
87         unsigned short  vidtcon;
88         unsigned short  wincon;
89         unsigned short  winmap;
90         unsigned short  keycon;
91         unsigned short  buf_start;
92         unsigned short  buf_end;
93         unsigned short  buf_size;
94         unsigned short  osd;
95         unsigned short  osd_stride;
96         unsigned short  palette[S3C_FB_MAX_WIN];
97
98         unsigned int    has_prtcon:1;
99         unsigned int    has_shadowcon:1;
100 };
101
102 /**
103  * struct s3c_fb_win_variant
104  * @has_osd_c: Set if has OSD C register.
105  * @has_osd_d: Set if has OSD D register.
106  * @has_osd_alpha: Set if can change alpha transparency for a window.
107  * @palette_sz: Size of palette in entries.
108  * @palette_16bpp: Set if palette is 16bits wide.
109  * @osd_size_off: If != 0, supports setting up OSD for a window; the appropriate
110  *                register is located at the given offset from OSD_BASE.
111  * @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
112  *
113  * valid_bpp bit x is set if (x+1)BPP is supported.
114  */
115 struct s3c_fb_win_variant {
116         unsigned int    has_osd_c:1;
117         unsigned int    has_osd_d:1;
118         unsigned int    has_osd_alpha:1;
119         unsigned int    palette_16bpp:1;
120         unsigned short  osd_size_off;
121         unsigned short  palette_sz;
122         u32             valid_bpp;
123 };
124
125 /**
126  * struct s3c_fb_driverdata - per-device type driver data for init time.
127  * @variant: The variant information for this driver.
128  * @win: The window information for each window.
129  */
130 struct s3c_fb_driverdata {
131         struct s3c_fb_variant   variant;
132         struct s3c_fb_win_variant *win[S3C_FB_MAX_WIN];
133 };
134
135 /**
136  * struct s3c_fb_palette - palette information
137  * @r: Red bitfield.
138  * @g: Green bitfield.
139  * @b: Blue bitfield.
140  * @a: Alpha bitfield.
141  */
142 struct s3c_fb_palette {
143         struct fb_bitfield      r;
144         struct fb_bitfield      g;
145         struct fb_bitfield      b;
146         struct fb_bitfield      a;
147 };
148
149 /**
150  * struct s3c_fb_win - per window private data for each framebuffer.
151  * @windata: The platform data supplied for the window configuration.
152  * @parent: The hardware that this window is part of.
153  * @fbinfo: Pointer pack to the framebuffer info for this window.
154  * @varint: The variant information for this window.
155  * @palette_buffer: Buffer/cache to hold palette entries.
156  * @pseudo_palette: For use in TRUECOLOUR modes for entries 0..15/
157  * @index: The window number of this window.
158  * @palette: The bitfields for changing r/g/b into a hardware palette entry.
159  */
160 struct s3c_fb_win {
161         struct s3c_fb_pd_win    *windata;
162         struct s3c_fb           *parent;
163         struct fb_info          *fbinfo;
164         struct s3c_fb_palette    palette;
165         struct s3c_fb_win_variant variant;
166
167         u32                     *palette_buffer;
168         u32                      pseudo_palette[16];
169         unsigned int             index;
170 };
171
172 /**
173  * struct s3c_fb_vsync - vsync information
174  * @wait:       a queue for processes waiting for vsync
175  * @count:      vsync interrupt count
176  */
177 struct s3c_fb_vsync {
178         wait_queue_head_t       wait;
179         unsigned int            count;
180 };
181
182 /**
183  * struct s3c_fb - overall hardware state of the hardware
184  * @dev: The device that we bound to, for printing, etc.
185  * @regs_res: The resource we claimed for the IO registers.
186  * @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.
187  * @regs: The mapped hardware registers.
188  * @variant: Variant information for this hardware.
189  * @enabled: A bitmask of enabled hardware windows.
190  * @pdata: The platform configuration data passed with the device.
191  * @windows: The hardware windows that have been claimed.
192  * @irq_no: IRQ line number
193  * @irq_flags: irq flags
194  * @vsync_info: VSYNC-related information (count, queues...)
195  */
196 struct s3c_fb {
197         struct device           *dev;
198         struct resource         *regs_res;
199         struct clk              *bus_clk;
200         void __iomem            *regs;
201         struct s3c_fb_variant    variant;
202
203         unsigned char            enabled;
204
205         struct s3c_fb_platdata  *pdata;
206         struct s3c_fb_win       *windows[S3C_FB_MAX_WIN];
207
208         int                      irq_no;
209         unsigned long            irq_flags;
210         struct s3c_fb_vsync      vsync_info;
211 };
212
213 /**
214  * s3c_fb_validate_win_bpp - validate the bits-per-pixel for this mode.
215  * @win: The device window.
216  * @bpp: The bit depth.
217  */
218 static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp)
219 {
220         return win->variant.valid_bpp & VALID_BPP(bpp);
221 }
222
223 /**
224  * s3c_fb_check_var() - framebuffer layer request to verify a given mode.
225  * @var: The screen information to verify.
226  * @info: The framebuffer device.
227  *
228  * Framebuffer layer call to verify the given information and allow us to
229  * update various information depending on the hardware capabilities.
230  */
231 static int s3c_fb_check_var(struct fb_var_screeninfo *var,
232                             struct fb_info *info)
233 {
234         struct s3c_fb_win *win = info->par;
235         struct s3c_fb_pd_win *windata = win->windata;
236         struct s3c_fb *sfb = win->parent;
237
238         dev_dbg(sfb->dev, "checking parameters\n");
239
240         var->xres_virtual = max((unsigned int)windata->virtual_x, var->xres);
241         var->yres_virtual = max((unsigned int)windata->virtual_y, var->yres);
242
243         if (!s3c_fb_validate_win_bpp(win, var->bits_per_pixel)) {
244                 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n",
245                         win->index, var->bits_per_pixel);
246                 return -EINVAL;
247         }
248
249         /* always ensure these are zero, for drop through cases below */
250         var->transp.offset = 0;
251         var->transp.length = 0;
252
253         switch (var->bits_per_pixel) {
254         case 1:
255         case 2:
256         case 4:
257         case 8:
258                 if (sfb->variant.palette[win->index] != 0) {
259                         /* non palletised, A:1,R:2,G:3,B:2 mode */
260                         var->red.offset         = 4;
261                         var->green.offset       = 2;
262                         var->blue.offset        = 0;
263                         var->red.length         = 5;
264                         var->green.length       = 3;
265                         var->blue.length        = 2;
266                         var->transp.offset      = 7;
267                         var->transp.length      = 1;
268                 } else {
269                         var->red.offset = 0;
270                         var->red.length = var->bits_per_pixel;
271                         var->green      = var->red;
272                         var->blue       = var->red;
273                 }
274                 break;
275
276         case 19:
277                 /* 666 with one bit alpha/transparency */
278                 var->transp.offset      = 18;
279                 var->transp.length      = 1;
280         case 18:
281                 var->bits_per_pixel     = 32;
282
283                 /* 666 format */
284                 var->red.offset         = 12;
285                 var->green.offset       = 6;
286                 var->blue.offset        = 0;
287                 var->red.length         = 6;
288                 var->green.length       = 6;
289                 var->blue.length        = 6;
290                 break;
291
292         case 16:
293                 /* 16 bpp, 565 format */
294                 var->red.offset         = 11;
295                 var->green.offset       = 5;
296                 var->blue.offset        = 0;
297                 var->red.length         = 5;
298                 var->green.length       = 6;
299                 var->blue.length        = 5;
300                 break;
301
302         case 28:
303         case 25:
304                 var->transp.length      = var->bits_per_pixel - 24;
305                 var->transp.offset      = 24;
306                 /* drop through */
307         case 24:
308                 /* our 24bpp is unpacked, so 32bpp */
309                 var->bits_per_pixel     = 32;
310         case 32:
311                 var->red.offset         = 16;
312                 var->red.length         = 8;
313                 var->green.offset       = 8;
314                 var->green.length       = 8;
315                 var->blue.offset        = 0;
316                 var->blue.length        = 8;
317                 break;
318
319         default:
320                 dev_err(sfb->dev, "invalid bpp\n");
321         }
322
323         dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
324         return 0;
325 }
326
327 /**
328  * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
329  * @sfb: The hardware state.
330  * @pixclock: The pixel clock wanted, in picoseconds.
331  *
332  * Given the specified pixel clock, work out the necessary divider to get
333  * close to the output frequency.
334  */
335 static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
336 {
337         unsigned long clk = clk_get_rate(sfb->bus_clk);
338         unsigned long long tmp;
339         unsigned int result;
340
341         tmp = (unsigned long long)clk;
342         tmp *= pixclk;
343
344         do_div(tmp, 1000000000UL);
345         result = (unsigned int)tmp / 1000;
346
347         dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
348                 pixclk, clk, result, clk / result);
349
350         return result;
351 }
352
353 /**
354  * s3c_fb_align_word() - align pixel count to word boundary
355  * @bpp: The number of bits per pixel
356  * @pix: The value to be aligned.
357  *
358  * Align the given pixel count so that it will start on an 32bit word
359  * boundary.
360  */
361 static int s3c_fb_align_word(unsigned int bpp, unsigned int pix)
362 {
363         int pix_per_word;
364
365         if (bpp > 16)
366                 return pix;
367
368         pix_per_word = (8 * 32) / bpp;
369         return ALIGN(pix, pix_per_word);
370 }
371
372 /**
373  * vidosd_set_size() - set OSD size for a window
374  *
375  * @win: the window to set OSD size for
376  * @size: OSD size register value
377  */
378 static void vidosd_set_size(struct s3c_fb_win *win, u32 size)
379 {
380         struct s3c_fb *sfb = win->parent;
381
382         /* OSD can be set up if osd_size_off != 0 for this window */
383         if (win->variant.osd_size_off)
384                 writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
385                                 + win->variant.osd_size_off);
386 }
387
388 /**
389  * vidosd_set_alpha() - set alpha transparency for a window
390  *
391  * @win: the window to set OSD size for
392  * @alpha: alpha register value
393  */
394 static void vidosd_set_alpha(struct s3c_fb_win *win, u32 alpha)
395 {
396         struct s3c_fb *sfb = win->parent;
397
398         if (win->variant.has_osd_alpha)
399                 writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
400 }
401
402 /**
403  * shadow_protect_win() - disable updating values from shadow registers at vsync
404  *
405  * @win: window to protect registers for
406  * @protect: 1 to protect (disable updates)
407  */
408 static void shadow_protect_win(struct s3c_fb_win *win, bool protect)
409 {
410         struct s3c_fb *sfb = win->parent;
411         u32 reg;
412
413         if (protect) {
414                 if (sfb->variant.has_prtcon) {
415                         writel(PRTCON_PROTECT, sfb->regs + PRTCON);
416                 } else if (sfb->variant.has_shadowcon) {
417                         reg = readl(sfb->regs + SHADOWCON);
418                         writel(reg | SHADOWCON_WINx_PROTECT(win->index),
419                                 sfb->regs + SHADOWCON);
420                 }
421         } else {
422                 if (sfb->variant.has_prtcon) {
423                         writel(0, sfb->regs + PRTCON);
424                 } else if (sfb->variant.has_shadowcon) {
425                         reg = readl(sfb->regs + SHADOWCON);
426                         writel(reg & ~SHADOWCON_WINx_PROTECT(win->index),
427                                 sfb->regs + SHADOWCON);
428                 }
429         }
430 }
431
432 /**
433  * s3c_fb_set_par() - framebuffer request to set new framebuffer state.
434  * @info: The framebuffer to change.
435  *
436  * Framebuffer layer request to set a new mode for the specified framebuffer
437  */
438 static int s3c_fb_set_par(struct fb_info *info)
439 {
440         struct fb_var_screeninfo *var = &info->var;
441         struct s3c_fb_win *win = info->par;
442         struct s3c_fb *sfb = win->parent;
443         void __iomem *regs = sfb->regs;
444         void __iomem *buf = regs;
445         int win_no = win->index;
446         u32 alpha = 0;
447         u32 data;
448         u32 pagewidth;
449         int clkdiv;
450
451         dev_dbg(sfb->dev, "setting framebuffer parameters\n");
452
453         switch (var->bits_per_pixel) {
454         case 32:
455         case 24:
456         case 16:
457         case 12:
458                 info->fix.visual = FB_VISUAL_TRUECOLOR;
459                 break;
460         case 8:
461                 if (win->variant.palette_sz >= 256)
462                         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
463                 else
464                         info->fix.visual = FB_VISUAL_TRUECOLOR;
465                 break;
466         case 1:
467                 info->fix.visual = FB_VISUAL_MONO01;
468                 break;
469         default:
470                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
471                 break;
472         }
473
474         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
475
476         info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
477         info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
478
479         /* disable the window whilst we update it */
480         writel(0, regs + WINCON(win_no));
481
482         /* use platform specified window as the basis for the lcd timings */
483
484         if (win_no == sfb->pdata->default_win) {
485                 clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
486
487                 data = sfb->pdata->vidcon0;
488                 data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
489
490                 if (clkdiv > 1)
491                         data |= VIDCON0_CLKVAL_F(clkdiv-1) | VIDCON0_CLKDIR;
492                 else
493                         data &= ~VIDCON0_CLKDIR;        /* 1:1 clock */
494
495                 /* write the timing data to the panel */
496
497                 if (sfb->variant.is_2443)
498                         data |= (1 << 5);
499
500                 data |= VIDCON0_ENVID | VIDCON0_ENVID_F;
501                 writel(data, regs + VIDCON0);
502
503                 data = VIDTCON0_VBPD(var->upper_margin - 1) |
504                        VIDTCON0_VFPD(var->lower_margin - 1) |
505                        VIDTCON0_VSPW(var->vsync_len - 1);
506
507                 writel(data, regs + sfb->variant.vidtcon);
508
509                 data = VIDTCON1_HBPD(var->left_margin - 1) |
510                        VIDTCON1_HFPD(var->right_margin - 1) |
511                        VIDTCON1_HSPW(var->hsync_len - 1);
512
513                 /* VIDTCON1 */
514                 writel(data, regs + sfb->variant.vidtcon + 4);
515
516                 data = VIDTCON2_LINEVAL(var->yres - 1) |
517                        VIDTCON2_HOZVAL(var->xres - 1);
518                 writel(data, regs +sfb->variant.vidtcon + 8 );
519         }
520
521         /* write the buffer address */
522
523         /* start and end registers stride is 8 */
524         buf = regs + win_no * 8;
525
526         writel(info->fix.smem_start, buf + sfb->variant.buf_start);
527
528         data = info->fix.smem_start + info->fix.line_length * var->yres;
529         writel(data, buf + sfb->variant.buf_end);
530
531         pagewidth = (var->xres * var->bits_per_pixel) >> 3;
532         data = VIDW_BUF_SIZE_OFFSET(info->fix.line_length - pagewidth) |
533                VIDW_BUF_SIZE_PAGEWIDTH(pagewidth);
534         writel(data, regs + sfb->variant.buf_size + (win_no * 4));
535
536         /* write 'OSD' registers to control position of framebuffer */
537
538         data = VIDOSDxA_TOPLEFT_X(0) | VIDOSDxA_TOPLEFT_Y(0);
539         writel(data, regs + VIDOSD_A(win_no, sfb->variant));
540
541         data = VIDOSDxB_BOTRIGHT_X(s3c_fb_align_word(var->bits_per_pixel,
542                                                      var->xres - 1)) |
543                VIDOSDxB_BOTRIGHT_Y(var->yres - 1);
544
545         writel(data, regs + VIDOSD_B(win_no, sfb->variant));
546
547         data = var->xres * var->yres;
548
549         alpha = VIDISD14C_ALPHA1_R(0xf) |
550                 VIDISD14C_ALPHA1_G(0xf) |
551                 VIDISD14C_ALPHA1_B(0xf);
552
553         vidosd_set_alpha(win, alpha);
554         vidosd_set_size(win, data);
555
556         data = WINCONx_ENWIN;
557
558         /* note, since we have to round up the bits-per-pixel, we end up
559          * relying on the bitfield information for r/g/b/a to work out
560          * exactly which mode of operation is intended. */
561
562         switch (var->bits_per_pixel) {
563         case 1:
564                 data |= WINCON0_BPPMODE_1BPP;
565                 data |= WINCONx_BITSWP;
566                 data |= WINCONx_BURSTLEN_4WORD;
567                 break;
568         case 2:
569                 data |= WINCON0_BPPMODE_2BPP;
570                 data |= WINCONx_BITSWP;
571                 data |= WINCONx_BURSTLEN_8WORD;
572                 break;
573         case 4:
574                 data |= WINCON0_BPPMODE_4BPP;
575                 data |= WINCONx_BITSWP;
576                 data |= WINCONx_BURSTLEN_8WORD;
577                 break;
578         case 8:
579                 if (var->transp.length != 0)
580                         data |= WINCON1_BPPMODE_8BPP_1232;
581                 else
582                         data |= WINCON0_BPPMODE_8BPP_PALETTE;
583                 data |= WINCONx_BURSTLEN_8WORD;
584                 data |= WINCONx_BYTSWP;
585                 break;
586         case 16:
587                 if (var->transp.length != 0)
588                         data |= WINCON1_BPPMODE_16BPP_A1555;
589                 else
590                         data |= WINCON0_BPPMODE_16BPP_565;
591                 data |= WINCONx_HAWSWP;
592                 data |= WINCONx_BURSTLEN_16WORD;
593                 break;
594         case 24:
595         case 32:
596                 if (var->red.length == 6) {
597                         if (var->transp.length != 0)
598                                 data |= WINCON1_BPPMODE_19BPP_A1666;
599                         else
600                                 data |= WINCON1_BPPMODE_18BPP_666;
601                 } else if (var->transp.length == 1)
602                         data |= WINCON1_BPPMODE_25BPP_A1888
603                                 | WINCON1_BLD_PIX;
604                 else if (var->transp.length == 4)
605                         data |= WINCON1_BPPMODE_28BPP_A4888
606                                 | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
607                 else
608                         data |= WINCON0_BPPMODE_24BPP_888;
609
610                 data |= WINCONx_WSWP;
611                 data |= WINCONx_BURSTLEN_16WORD;
612                 break;
613         }
614
615         /* Enable the colour keying for the window below this one */
616         if (win_no > 0) {
617                 u32 keycon0_data = 0, keycon1_data = 0;
618                 void __iomem *keycon = regs + sfb->variant.keycon;
619
620                 keycon0_data = ~(WxKEYCON0_KEYBL_EN |
621                                 WxKEYCON0_KEYEN_F |
622                                 WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
623
624                 keycon1_data = WxKEYCON1_COLVAL(0xffffff);
625
626                 keycon += (win_no - 1) * 8;
627
628                 writel(keycon0_data, keycon + WKEYCON0);
629                 writel(keycon1_data, keycon + WKEYCON1);
630         }
631
632         writel(data, regs + sfb->variant.wincon + (win_no * 4));
633         writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
634
635         return 0;
636 }
637
638 /**
639  * s3c_fb_update_palette() - set or schedule a palette update.
640  * @sfb: The hardware information.
641  * @win: The window being updated.
642  * @reg: The palette index being changed.
643  * @value: The computed palette value.
644  *
645  * Change the value of a palette register, either by directly writing to
646  * the palette (this requires the palette RAM to be disconnected from the
647  * hardware whilst this is in progress) or schedule the update for later.
648  *
649  * At the moment, since we have no VSYNC interrupt support, we simply set
650  * the palette entry directly.
651  */
652 static void s3c_fb_update_palette(struct s3c_fb *sfb,
653                                   struct s3c_fb_win *win,
654                                   unsigned int reg,
655                                   u32 value)
656 {
657         void __iomem *palreg;
658         u32 palcon;
659
660         palreg = sfb->regs + sfb->variant.palette[win->index];
661
662         dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
663                 __func__, win->index, reg, palreg, value);
664
665         win->palette_buffer[reg] = value;
666
667         palcon = readl(sfb->regs + WPALCON);
668         writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
669
670         if (win->variant.palette_16bpp)
671                 writew(value, palreg + (reg * 2));
672         else
673                 writel(value, palreg + (reg * 4));
674
675         writel(palcon, sfb->regs + WPALCON);
676 }
677
678 static inline unsigned int chan_to_field(unsigned int chan,
679                                          struct fb_bitfield *bf)
680 {
681         chan &= 0xffff;
682         chan >>= 16 - bf->length;
683         return chan << bf->offset;
684 }
685
686 /**
687  * s3c_fb_setcolreg() - framebuffer layer request to change palette.
688  * @regno: The palette index to change.
689  * @red: The red field for the palette data.
690  * @green: The green field for the palette data.
691  * @blue: The blue field for the palette data.
692  * @trans: The transparency (alpha) field for the palette data.
693  * @info: The framebuffer being changed.
694  */
695 static int s3c_fb_setcolreg(unsigned regno,
696                             unsigned red, unsigned green, unsigned blue,
697                             unsigned transp, struct fb_info *info)
698 {
699         struct s3c_fb_win *win = info->par;
700         struct s3c_fb *sfb = win->parent;
701         unsigned int val;
702
703         dev_dbg(sfb->dev, "%s: win %d: %d => rgb=%d/%d/%d\n",
704                 __func__, win->index, regno, red, green, blue);
705
706         switch (info->fix.visual) {
707         case FB_VISUAL_TRUECOLOR:
708                 /* true-colour, use pseudo-palette */
709
710                 if (regno < 16) {
711                         u32 *pal = info->pseudo_palette;
712
713                         val  = chan_to_field(red,   &info->var.red);
714                         val |= chan_to_field(green, &info->var.green);
715                         val |= chan_to_field(blue,  &info->var.blue);
716
717                         pal[regno] = val;
718                 }
719                 break;
720
721         case FB_VISUAL_PSEUDOCOLOR:
722                 if (regno < win->variant.palette_sz) {
723                         val  = chan_to_field(red, &win->palette.r);
724                         val |= chan_to_field(green, &win->palette.g);
725                         val |= chan_to_field(blue, &win->palette.b);
726
727                         s3c_fb_update_palette(sfb, win, regno, val);
728                 }
729
730                 break;
731
732         default:
733                 return 1;       /* unknown type */
734         }
735
736         return 0;
737 }
738
739 /**
740  * s3c_fb_enable() - Set the state of the main LCD output
741  * @sfb: The main framebuffer state.
742  * @enable: The state to set.
743  */
744 static void s3c_fb_enable(struct s3c_fb *sfb, int enable)
745 {
746         u32 vidcon0 = readl(sfb->regs + VIDCON0);
747
748         if (enable)
749                 vidcon0 |= VIDCON0_ENVID | VIDCON0_ENVID_F;
750         else {
751                 /* see the note in the framebuffer datasheet about
752                  * why you cannot take both of these bits down at the
753                  * same time. */
754
755                 if (!(vidcon0 & VIDCON0_ENVID))
756                         return;
757
758                 vidcon0 |= VIDCON0_ENVID;
759                 vidcon0 &= ~VIDCON0_ENVID_F;
760         }
761
762         writel(vidcon0, sfb->regs + VIDCON0);
763 }
764
765 /**
766  * s3c_fb_blank() - blank or unblank the given window
767  * @blank_mode: The blank state from FB_BLANK_*
768  * @info: The framebuffer to blank.
769  *
770  * Framebuffer layer request to change the power state.
771  */
772 static int s3c_fb_blank(int blank_mode, struct fb_info *info)
773 {
774         struct s3c_fb_win *win = info->par;
775         struct s3c_fb *sfb = win->parent;
776         unsigned int index = win->index;
777         u32 wincon;
778
779         dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
780
781         wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
782
783         switch (blank_mode) {
784         case FB_BLANK_POWERDOWN:
785                 wincon &= ~WINCONx_ENWIN;
786                 sfb->enabled &= ~(1 << index);
787                 /* fall through to FB_BLANK_NORMAL */
788
789         case FB_BLANK_NORMAL:
790                 /* disable the DMA and display 0x0 (black) */
791                 writel(WINxMAP_MAP | WINxMAP_MAP_COLOUR(0x0),
792                        sfb->regs + sfb->variant.winmap + (index * 4));
793                 break;
794
795         case FB_BLANK_UNBLANK:
796                 writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
797                 wincon |= WINCONx_ENWIN;
798                 sfb->enabled |= (1 << index);
799                 break;
800
801         case FB_BLANK_VSYNC_SUSPEND:
802         case FB_BLANK_HSYNC_SUSPEND:
803         default:
804                 return 1;
805         }
806
807         writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
808
809         /* Check the enabled state to see if we need to be running the
810          * main LCD interface, as if there are no active windows then
811          * it is highly likely that we also do not need to output
812          * anything.
813          */
814
815         /* We could do something like the following code, but the current
816          * system of using framebuffer events means that we cannot make
817          * the distinction between just window 0 being inactive and all
818          * the windows being down.
819          *
820          * s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
821         */
822
823         /* we're stuck with this until we can do something about overriding
824          * the power control using the blanking event for a single fb.
825          */
826         if (index == sfb->pdata->default_win)
827                 s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
828
829         return 0;
830 }
831
832 /**
833  * s3c_fb_pan_display() - Pan the display.
834  *
835  * Note that the offsets can be written to the device at any time, as their
836  * values are latched at each vsync automatically. This also means that only
837  * the last call to this function will have any effect on next vsync, but
838  * there is no need to sleep waiting for it to prevent tearing.
839  *
840  * @var: The screen information to verify.
841  * @info: The framebuffer device.
842  */
843 static int s3c_fb_pan_display(struct fb_var_screeninfo *var,
844                               struct fb_info *info)
845 {
846         struct s3c_fb_win *win  = info->par;
847         struct s3c_fb *sfb      = win->parent;
848         void __iomem *buf       = sfb->regs + win->index * 8;
849         unsigned int start_boff, end_boff;
850
851         /* Offset in bytes to the start of the displayed area */
852         start_boff = var->yoffset * info->fix.line_length;
853         /* X offset depends on the current bpp */
854         if (info->var.bits_per_pixel >= 8) {
855                 start_boff += var->xoffset * (info->var.bits_per_pixel >> 3);
856         } else {
857                 switch (info->var.bits_per_pixel) {
858                 case 4:
859                         start_boff += var->xoffset >> 1;
860                         break;
861                 case 2:
862                         start_boff += var->xoffset >> 2;
863                         break;
864                 case 1:
865                         start_boff += var->xoffset >> 3;
866                         break;
867                 default:
868                         dev_err(sfb->dev, "invalid bpp\n");
869                         return -EINVAL;
870                 }
871         }
872         /* Offset in bytes to the end of the displayed area */
873         end_boff = start_boff + var->yres * info->fix.line_length;
874
875         /* Temporarily turn off per-vsync update from shadow registers until
876          * both start and end addresses are updated to prevent corruption */
877         shadow_protect_win(win, 1);
878
879         writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
880         writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
881
882         shadow_protect_win(win, 0);
883
884         return 0;
885 }
886
887 /**
888  * s3c_fb_enable_irq() - enable framebuffer interrupts
889  * @sfb: main hardware state
890  */
891 static void s3c_fb_enable_irq(struct s3c_fb *sfb)
892 {
893         void __iomem *regs = sfb->regs;
894         u32 irq_ctrl_reg;
895
896         if (!test_and_set_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
897                 /* IRQ disabled, enable it */
898                 irq_ctrl_reg = readl(regs + VIDINTCON0);
899
900                 irq_ctrl_reg |= VIDINTCON0_INT_ENABLE;
901                 irq_ctrl_reg |= VIDINTCON0_INT_FRAME;
902
903                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL0_MASK;
904                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL0_VSYNC;
905                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL1_MASK;
906                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL1_NONE;
907
908                 writel(irq_ctrl_reg, regs + VIDINTCON0);
909         }
910 }
911
912 /**
913  * s3c_fb_disable_irq() - disable framebuffer interrupts
914  * @sfb: main hardware state
915  */
916 static void s3c_fb_disable_irq(struct s3c_fb *sfb)
917 {
918         void __iomem *regs = sfb->regs;
919         u32 irq_ctrl_reg;
920
921         if (test_and_clear_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
922                 /* IRQ enabled, disable it */
923                 irq_ctrl_reg = readl(regs + VIDINTCON0);
924
925                 irq_ctrl_reg &= ~VIDINTCON0_INT_FRAME;
926                 irq_ctrl_reg &= ~VIDINTCON0_INT_ENABLE;
927
928                 writel(irq_ctrl_reg, regs + VIDINTCON0);
929         }
930 }
931
932 static irqreturn_t s3c_fb_irq(int irq, void *dev_id)
933 {
934         struct s3c_fb *sfb = dev_id;
935         void __iomem  *regs = sfb->regs;
936         u32 irq_sts_reg;
937
938         irq_sts_reg = readl(regs + VIDINTCON1);
939
940         if (irq_sts_reg & VIDINTCON1_INT_FRAME) {
941
942                 /* VSYNC interrupt, accept it */
943                 writel(VIDINTCON1_INT_FRAME, regs + VIDINTCON1);
944
945                 sfb->vsync_info.count++;
946                 wake_up_interruptible(&sfb->vsync_info.wait);
947         }
948
949         /* We only support waiting for VSYNC for now, so it's safe
950          * to always disable irqs here.
951          */
952         s3c_fb_disable_irq(sfb);
953
954         return IRQ_HANDLED;
955 }
956
957 /**
958  * s3c_fb_wait_for_vsync() - sleep until next VSYNC interrupt or timeout
959  * @sfb: main hardware state
960  * @crtc: head index.
961  */
962 static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)
963 {
964         unsigned long count;
965         int ret;
966
967         if (crtc != 0)
968                 return -ENODEV;
969
970         count = sfb->vsync_info.count;
971         s3c_fb_enable_irq(sfb);
972         ret = wait_event_interruptible_timeout(sfb->vsync_info.wait,
973                                        count != sfb->vsync_info.count,
974                                        msecs_to_jiffies(VSYNC_TIMEOUT_MSEC));
975         if (ret == 0)
976                 return -ETIMEDOUT;
977
978         return 0;
979 }
980
981 static int s3c_fb_ioctl(struct fb_info *info, unsigned int cmd,
982                         unsigned long arg)
983 {
984         struct s3c_fb_win *win = info->par;
985         struct s3c_fb *sfb = win->parent;
986         int ret;
987         u32 crtc;
988
989         switch (cmd) {
990         case FBIO_WAITFORVSYNC:
991                 if (get_user(crtc, (u32 __user *)arg)) {
992                         ret = -EFAULT;
993                         break;
994                 }
995
996                 ret = s3c_fb_wait_for_vsync(sfb, crtc);
997                 break;
998         default:
999                 ret = -ENOTTY;
1000         }
1001
1002         return ret;
1003 }
1004
1005 static struct fb_ops s3c_fb_ops = {
1006         .owner          = THIS_MODULE,
1007         .fb_check_var   = s3c_fb_check_var,
1008         .fb_set_par     = s3c_fb_set_par,
1009         .fb_blank       = s3c_fb_blank,
1010         .fb_setcolreg   = s3c_fb_setcolreg,
1011         .fb_fillrect    = cfb_fillrect,
1012         .fb_copyarea    = cfb_copyarea,
1013         .fb_imageblit   = cfb_imageblit,
1014         .fb_pan_display = s3c_fb_pan_display,
1015         .fb_ioctl       = s3c_fb_ioctl,
1016 };
1017
1018 /**
1019  * s3c_fb_alloc_memory() - allocate display memory for framebuffer window
1020  * @sfb: The base resources for the hardware.
1021  * @win: The window to initialise memory for.
1022  *
1023  * Allocate memory for the given framebuffer.
1024  */
1025 static int __devinit s3c_fb_alloc_memory(struct s3c_fb *sfb,
1026                                          struct s3c_fb_win *win)
1027 {
1028         struct s3c_fb_pd_win *windata = win->windata;
1029         unsigned int real_size, virt_size, size;
1030         struct fb_info *fbi = win->fbinfo;
1031         dma_addr_t map_dma;
1032
1033         dev_dbg(sfb->dev, "allocating memory for display\n");
1034
1035         real_size = windata->win_mode.xres * windata->win_mode.yres;
1036         virt_size = windata->virtual_x * windata->virtual_y;
1037
1038         dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
1039                 real_size, windata->win_mode.xres, windata->win_mode.yres,
1040                 virt_size, windata->virtual_x, windata->virtual_y);
1041
1042         size = (real_size > virt_size) ? real_size : virt_size;
1043         size *= (windata->max_bpp > 16) ? 32 : windata->max_bpp;
1044         size /= 8;
1045
1046         fbi->fix.smem_len = size;
1047         size = PAGE_ALIGN(size);
1048
1049         dev_dbg(sfb->dev, "want %u bytes for window\n", size);
1050
1051         fbi->screen_base = dma_alloc_writecombine(sfb->dev, size,
1052                                                   &map_dma, GFP_KERNEL);
1053         if (!fbi->screen_base)
1054                 return -ENOMEM;
1055
1056         dev_dbg(sfb->dev, "mapped %x to %p\n",
1057                 (unsigned int)map_dma, fbi->screen_base);
1058
1059         memset(fbi->screen_base, 0x0, size);
1060         fbi->fix.smem_start = map_dma;
1061
1062         return 0;
1063 }
1064
1065 /**
1066  * s3c_fb_free_memory() - free the display memory for the given window
1067  * @sfb: The base resources for the hardware.
1068  * @win: The window to free the display memory for.
1069  *
1070  * Free the display memory allocated by s3c_fb_alloc_memory().
1071  */
1072 static void s3c_fb_free_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1073 {
1074         struct fb_info *fbi = win->fbinfo;
1075
1076         if (fbi->screen_base)
1077                 dma_free_writecombine(sfb->dev, PAGE_ALIGN(fbi->fix.smem_len),
1078                               fbi->screen_base, fbi->fix.smem_start);
1079 }
1080
1081 /**
1082  * s3c_fb_release_win() - release resources for a framebuffer window.
1083  * @win: The window to cleanup the resources for.
1084  *
1085  * Release the resources that where claimed for the hardware window,
1086  * such as the framebuffer instance and any memory claimed for it.
1087  */
1088 static void s3c_fb_release_win(struct s3c_fb *sfb, struct s3c_fb_win *win)
1089 {
1090         if (win->fbinfo) {
1091                 unregister_framebuffer(win->fbinfo);
1092                 if (win->fbinfo->cmap.len)
1093                         fb_dealloc_cmap(&win->fbinfo->cmap);
1094                 s3c_fb_free_memory(sfb, win);
1095                 framebuffer_release(win->fbinfo);
1096         }
1097 }
1098
1099 /**
1100  * s3c_fb_probe_win() - register an hardware window
1101  * @sfb: The base resources for the hardware
1102  * @variant: The variant information for this window.
1103  * @res: Pointer to where to place the resultant window.
1104  *
1105  * Allocate and do the basic initialisation for one of the hardware's graphics
1106  * windows.
1107  */
1108 static int __devinit s3c_fb_probe_win(struct s3c_fb *sfb, unsigned int win_no,
1109                                       struct s3c_fb_win_variant *variant,
1110                                       struct s3c_fb_win **res)
1111 {
1112         struct fb_var_screeninfo *var;
1113         struct fb_videomode *initmode;
1114         struct s3c_fb_pd_win *windata;
1115         struct s3c_fb_win *win;
1116         struct fb_info *fbinfo;
1117         int palette_size;
1118         int ret;
1119
1120         dev_dbg(sfb->dev, "probing window %d, variant %p\n", win_no, variant);
1121
1122         init_waitqueue_head(&sfb->vsync_info.wait);
1123
1124         palette_size = variant->palette_sz * 4;
1125
1126         fbinfo = framebuffer_alloc(sizeof(struct s3c_fb_win) +
1127                                    palette_size * sizeof(u32), sfb->dev);
1128         if (!fbinfo) {
1129                 dev_err(sfb->dev, "failed to allocate framebuffer\n");
1130                 return -ENOENT;
1131         }
1132
1133         windata = sfb->pdata->win[win_no];
1134         initmode = &windata->win_mode;
1135
1136         WARN_ON(windata->max_bpp == 0);
1137         WARN_ON(windata->win_mode.xres == 0);
1138         WARN_ON(windata->win_mode.yres == 0);
1139
1140         win = fbinfo->par;
1141         *res = win;
1142         var = &fbinfo->var;
1143         win->variant = *variant;
1144         win->fbinfo = fbinfo;
1145         win->parent = sfb;
1146         win->windata = windata;
1147         win->index = win_no;
1148         win->palette_buffer = (u32 *)(win + 1);
1149
1150         ret = s3c_fb_alloc_memory(sfb, win);
1151         if (ret) {
1152                 dev_err(sfb->dev, "failed to allocate display memory\n");
1153                 return ret;
1154         }
1155
1156         /* setup the r/b/g positions for the window's palette */
1157         if (win->variant.palette_16bpp) {
1158                 /* Set RGB 5:6:5 as default */
1159                 win->palette.r.offset = 11;
1160                 win->palette.r.length = 5;
1161                 win->palette.g.offset = 5;
1162                 win->palette.g.length = 6;
1163                 win->palette.b.offset = 0;
1164                 win->palette.b.length = 5;
1165
1166         } else {
1167                 /* Set 8bpp or 8bpp and 1bit alpha */
1168                 win->palette.r.offset = 16;
1169                 win->palette.r.length = 8;
1170                 win->palette.g.offset = 8;
1171                 win->palette.g.length = 8;
1172                 win->palette.b.offset = 0;
1173                 win->palette.b.length = 8;
1174         }
1175
1176         /* setup the initial video mode from the window */
1177         fb_videomode_to_var(&fbinfo->var, initmode);
1178
1179         fbinfo->fix.type        = FB_TYPE_PACKED_PIXELS;
1180         fbinfo->fix.accel       = FB_ACCEL_NONE;
1181         fbinfo->var.activate    = FB_ACTIVATE_NOW;
1182         fbinfo->var.vmode       = FB_VMODE_NONINTERLACED;
1183         fbinfo->var.bits_per_pixel = windata->default_bpp;
1184         fbinfo->fbops           = &s3c_fb_ops;
1185         fbinfo->flags           = FBINFO_FLAG_DEFAULT;
1186         fbinfo->pseudo_palette  = &win->pseudo_palette;
1187
1188         /* prepare to actually start the framebuffer */
1189
1190         ret = s3c_fb_check_var(&fbinfo->var, fbinfo);
1191         if (ret < 0) {
1192                 dev_err(sfb->dev, "check_var failed on initial video params\n");
1193                 return ret;
1194         }
1195
1196         /* create initial colour map */
1197
1198         ret = fb_alloc_cmap(&fbinfo->cmap, win->variant.palette_sz, 1);
1199         if (ret == 0)
1200                 fb_set_cmap(&fbinfo->cmap, fbinfo);
1201         else
1202                 dev_err(sfb->dev, "failed to allocate fb cmap\n");
1203
1204         s3c_fb_set_par(fbinfo);
1205
1206         dev_dbg(sfb->dev, "about to register framebuffer\n");
1207
1208         /* run the check_var and set_par on our configuration. */
1209
1210         ret = register_framebuffer(fbinfo);
1211         if (ret < 0) {
1212                 dev_err(sfb->dev, "failed to register framebuffer\n");
1213                 return ret;
1214         }
1215
1216         dev_info(sfb->dev, "window %d: fb %s\n", win_no, fbinfo->fix.id);
1217
1218         return 0;
1219 }
1220
1221 /**
1222  * s3c_fb_clear_win() - clear hardware window registers.
1223  * @sfb: The base resources for the hardware.
1224  * @win: The window to process.
1225  *
1226  * Reset the specific window registers to a known state.
1227  */
1228 static void s3c_fb_clear_win(struct s3c_fb *sfb, int win)
1229 {
1230         void __iomem *regs = sfb->regs;
1231
1232         writel(0, regs + sfb->variant.wincon + (win * 4));
1233         writel(0, regs + VIDOSD_A(win, sfb->variant));
1234         writel(0, regs + VIDOSD_B(win, sfb->variant));
1235         writel(0, regs + VIDOSD_C(win, sfb->variant));
1236 }
1237
1238 static int __devinit s3c_fb_probe(struct platform_device *pdev)
1239 {
1240         struct s3c_fb_driverdata *fbdrv;
1241         struct device *dev = &pdev->dev;
1242         struct s3c_fb_platdata *pd;
1243         struct s3c_fb *sfb;
1244         struct resource *res;
1245         int win;
1246         int ret = 0;
1247
1248         fbdrv = (struct s3c_fb_driverdata *)platform_get_device_id(pdev)->driver_data;
1249
1250         if (fbdrv->variant.nr_windows > S3C_FB_MAX_WIN) {
1251                 dev_err(dev, "too many windows, cannot attach\n");
1252                 return -EINVAL;
1253         }
1254
1255         pd = pdev->dev.platform_data;
1256         if (!pd) {
1257                 dev_err(dev, "no platform data specified\n");
1258                 return -EINVAL;
1259         }
1260
1261         sfb = kzalloc(sizeof(struct s3c_fb), GFP_KERNEL);
1262         if (!sfb) {
1263                 dev_err(dev, "no memory for framebuffers\n");
1264                 return -ENOMEM;
1265         }
1266
1267         dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
1268
1269         sfb->dev = dev;
1270         sfb->pdata = pd;
1271         sfb->variant = fbdrv->variant;
1272
1273         sfb->bus_clk = clk_get(dev, "lcd");
1274         if (IS_ERR(sfb->bus_clk)) {
1275                 dev_err(dev, "failed to get bus clock\n");
1276                 goto err_sfb;
1277         }
1278
1279         clk_enable(sfb->bus_clk);
1280
1281         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1282         if (!res) {
1283                 dev_err(dev, "failed to find registers\n");
1284                 ret = -ENOENT;
1285                 goto err_clk;
1286         }
1287
1288         sfb->regs_res = request_mem_region(res->start, resource_size(res),
1289                                            dev_name(dev));
1290         if (!sfb->regs_res) {
1291                 dev_err(dev, "failed to claim register region\n");
1292                 ret = -ENOENT;
1293                 goto err_clk;
1294         }
1295
1296         sfb->regs = ioremap(res->start, resource_size(res));
1297         if (!sfb->regs) {
1298                 dev_err(dev, "failed to map registers\n");
1299                 ret = -ENXIO;
1300                 goto err_req_region;
1301         }
1302
1303         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1304         if (!res) {
1305                 dev_err(dev, "failed to acquire irq resource\n");
1306                 ret = -ENOENT;
1307                 goto err_ioremap;
1308         }
1309         sfb->irq_no = res->start;
1310         ret = request_irq(sfb->irq_no, s3c_fb_irq,
1311                           0, "s3c_fb", sfb);
1312         if (ret) {
1313                 dev_err(dev, "irq request failed\n");
1314                 goto err_ioremap;
1315         }
1316
1317         dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
1318
1319         /* setup gpio and output polarity controls */
1320
1321         pd->setup_gpio();
1322
1323         writel(pd->vidcon1, sfb->regs + VIDCON1);
1324
1325         /* zero all windows before we do anything */
1326
1327         for (win = 0; win < fbdrv->variant.nr_windows; win++)
1328                 s3c_fb_clear_win(sfb, win);
1329
1330         /* initialise colour key controls */
1331         for (win = 0; win < (fbdrv->variant.nr_windows - 1); win++) {
1332                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1333
1334                 regs += (win * 8);
1335                 writel(0xffffff, regs + WKEYCON0);
1336                 writel(0xffffff, regs + WKEYCON1);
1337         }
1338
1339         /* we have the register setup, start allocating framebuffers */
1340
1341         for (win = 0; win < fbdrv->variant.nr_windows; win++) {
1342                 if (!pd->win[win])
1343                         continue;
1344
1345                 ret = s3c_fb_probe_win(sfb, win, fbdrv->win[win],
1346                                        &sfb->windows[win]);
1347                 if (ret < 0) {
1348                         dev_err(dev, "failed to create window %d\n", win);
1349                         for (; win >= 0; win--)
1350                                 s3c_fb_release_win(sfb, sfb->windows[win]);
1351                         goto err_irq;
1352                 }
1353         }
1354
1355         platform_set_drvdata(pdev, sfb);
1356
1357         return 0;
1358
1359 err_irq:
1360         free_irq(sfb->irq_no, sfb);
1361
1362 err_ioremap:
1363         iounmap(sfb->regs);
1364
1365 err_req_region:
1366         release_resource(sfb->regs_res);
1367         kfree(sfb->regs_res);
1368
1369 err_clk:
1370         clk_disable(sfb->bus_clk);
1371         clk_put(sfb->bus_clk);
1372
1373 err_sfb:
1374         kfree(sfb);
1375         return ret;
1376 }
1377
1378 /**
1379  * s3c_fb_remove() - Cleanup on module finalisation
1380  * @pdev: The platform device we are bound to.
1381  *
1382  * Shutdown and then release all the resources that the driver allocated
1383  * on initialisation.
1384  */
1385 static int __devexit s3c_fb_remove(struct platform_device *pdev)
1386 {
1387         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1388         int win;
1389
1390         for (win = 0; win < S3C_FB_MAX_WIN; win++)
1391                 if (sfb->windows[win])
1392                         s3c_fb_release_win(sfb, sfb->windows[win]);
1393
1394         free_irq(sfb->irq_no, sfb);
1395
1396         iounmap(sfb->regs);
1397
1398         clk_disable(sfb->bus_clk);
1399         clk_put(sfb->bus_clk);
1400
1401         release_resource(sfb->regs_res);
1402         kfree(sfb->regs_res);
1403
1404         kfree(sfb);
1405
1406         return 0;
1407 }
1408
1409 #ifdef CONFIG_PM
1410 static int s3c_fb_suspend(struct platform_device *pdev, pm_message_t state)
1411 {
1412         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1413         struct s3c_fb_win *win;
1414         int win_no;
1415
1416         for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1417                 win = sfb->windows[win_no];
1418                 if (!win)
1419                         continue;
1420
1421                 /* use the blank function to push into power-down */
1422                 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1423         }
1424
1425         clk_disable(sfb->bus_clk);
1426         return 0;
1427 }
1428
1429 static int s3c_fb_resume(struct platform_device *pdev)
1430 {
1431         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1432         struct s3c_fb_platdata *pd = sfb->pdata;
1433         struct s3c_fb_win *win;
1434         int win_no;
1435
1436         clk_enable(sfb->bus_clk);
1437
1438         /* setup registers */
1439         writel(pd->vidcon1, sfb->regs + VIDCON1);
1440
1441         /* zero all windows before we do anything */
1442         for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1443                 s3c_fb_clear_win(sfb, win_no);
1444
1445         for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1446                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1447
1448                 regs += (win_no * 8);
1449                 writel(0xffffff, regs + WKEYCON0);
1450                 writel(0xffffff, regs + WKEYCON1);
1451         }
1452
1453         /* restore framebuffers */
1454         for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1455                 win = sfb->windows[win_no];
1456                 if (!win)
1457                         continue;
1458
1459                 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1460                 s3c_fb_set_par(win->fbinfo);
1461         }
1462
1463         return 0;
1464 }
1465 #else
1466 #define s3c_fb_suspend NULL
1467 #define s3c_fb_resume  NULL
1468 #endif
1469
1470
1471 #define VALID_BPP124 (VALID_BPP(1) | VALID_BPP(2) | VALID_BPP(4))
1472 #define VALID_BPP1248 (VALID_BPP124 | VALID_BPP(8))
1473
1474 static struct s3c_fb_win_variant s3c_fb_data_64xx_wins[] __devinitdata = {
1475         [0] = {
1476                 .has_osd_c      = 1,
1477                 .osd_size_off   = 0x8,
1478                 .palette_sz     = 256,
1479                 .valid_bpp      = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1480         },
1481         [1] = {
1482                 .has_osd_c      = 1,
1483                 .has_osd_d      = 1,
1484                 .osd_size_off   = 0x12,
1485                 .has_osd_alpha  = 1,
1486                 .palette_sz     = 256,
1487                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1488                                    VALID_BPP(18) | VALID_BPP(19) |
1489                                    VALID_BPP(24) | VALID_BPP(25)),
1490         },
1491         [2] = {
1492                 .has_osd_c      = 1,
1493                 .has_osd_d      = 1,
1494                 .osd_size_off   = 0x12,
1495                 .has_osd_alpha  = 1,
1496                 .palette_sz     = 16,
1497                 .palette_16bpp  = 1,
1498                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1499                                    VALID_BPP(18) | VALID_BPP(19) |
1500                                    VALID_BPP(24) | VALID_BPP(25)),
1501         },
1502         [3] = {
1503                 .has_osd_c      = 1,
1504                 .has_osd_alpha  = 1,
1505                 .palette_sz     = 16,
1506                 .palette_16bpp  = 1,
1507                 .valid_bpp      = (VALID_BPP124  | VALID_BPP(16) |
1508                                    VALID_BPP(18) | VALID_BPP(19) |
1509                                    VALID_BPP(24) | VALID_BPP(25)),
1510         },
1511         [4] = {
1512                 .has_osd_c      = 1,
1513                 .has_osd_alpha  = 1,
1514                 .palette_sz     = 4,
1515                 .palette_16bpp  = 1,
1516                 .valid_bpp      = (VALID_BPP(1) | VALID_BPP(2) |
1517                                    VALID_BPP(16) | VALID_BPP(18) |
1518                                    VALID_BPP(24) | VALID_BPP(25)),
1519         },
1520 };
1521
1522 static struct s3c_fb_driverdata s3c_fb_data_64xx __devinitdata = {
1523         .variant = {
1524                 .nr_windows     = 5,
1525                 .vidtcon        = VIDTCON0,
1526                 .wincon         = WINCON(0),
1527                 .winmap         = WINxMAP(0),
1528                 .keycon         = WKEYCON,
1529                 .osd            = VIDOSD_BASE,
1530                 .osd_stride     = 16,
1531                 .buf_start      = VIDW_BUF_START(0),
1532                 .buf_size       = VIDW_BUF_SIZE(0),
1533                 .buf_end        = VIDW_BUF_END(0),
1534
1535                 .palette = {
1536                         [0] = 0x400,
1537                         [1] = 0x800,
1538                         [2] = 0x300,
1539                         [3] = 0x320,
1540                         [4] = 0x340,
1541                 },
1542
1543                 .has_prtcon     = 1,
1544         },
1545         .win[0] = &s3c_fb_data_64xx_wins[0],
1546         .win[1] = &s3c_fb_data_64xx_wins[1],
1547         .win[2] = &s3c_fb_data_64xx_wins[2],
1548         .win[3] = &s3c_fb_data_64xx_wins[3],
1549         .win[4] = &s3c_fb_data_64xx_wins[4],
1550 };
1551
1552 static struct s3c_fb_driverdata s3c_fb_data_s5pc100 __devinitdata = {
1553         .variant = {
1554                 .nr_windows     = 5,
1555                 .vidtcon        = VIDTCON0,
1556                 .wincon         = WINCON(0),
1557                 .winmap         = WINxMAP(0),
1558                 .keycon         = WKEYCON,
1559                 .osd            = VIDOSD_BASE,
1560                 .osd_stride     = 16,
1561                 .buf_start      = VIDW_BUF_START(0),
1562                 .buf_size       = VIDW_BUF_SIZE(0),
1563                 .buf_end        = VIDW_BUF_END(0),
1564
1565                 .palette = {
1566                         [0] = 0x2400,
1567                         [1] = 0x2800,
1568                         [2] = 0x2c00,
1569                         [3] = 0x3000,
1570                         [4] = 0x3400,
1571                 },
1572
1573                 .has_prtcon     = 1,
1574         },
1575         .win[0] = &s3c_fb_data_64xx_wins[0],
1576         .win[1] = &s3c_fb_data_64xx_wins[1],
1577         .win[2] = &s3c_fb_data_64xx_wins[2],
1578         .win[3] = &s3c_fb_data_64xx_wins[3],
1579         .win[4] = &s3c_fb_data_64xx_wins[4],
1580 };
1581
1582 static struct s3c_fb_driverdata s3c_fb_data_s5pv210 __devinitdata = {
1583         .variant = {
1584                 .nr_windows     = 5,
1585                 .vidtcon        = VIDTCON0,
1586                 .wincon         = WINCON(0),
1587                 .winmap         = WINxMAP(0),
1588                 .keycon         = WKEYCON,
1589                 .osd            = VIDOSD_BASE,
1590                 .osd_stride     = 16,
1591                 .buf_start      = VIDW_BUF_START(0),
1592                 .buf_size       = VIDW_BUF_SIZE(0),
1593                 .buf_end        = VIDW_BUF_END(0),
1594
1595                 .palette = {
1596                         [0] = 0x2400,
1597                         [1] = 0x2800,
1598                         [2] = 0x2c00,
1599                         [3] = 0x3000,
1600                         [4] = 0x3400,
1601                 },
1602
1603                 .has_shadowcon  = 1,
1604         },
1605         .win[0] = &s3c_fb_data_64xx_wins[0],
1606         .win[1] = &s3c_fb_data_64xx_wins[1],
1607         .win[2] = &s3c_fb_data_64xx_wins[2],
1608         .win[3] = &s3c_fb_data_64xx_wins[3],
1609         .win[4] = &s3c_fb_data_64xx_wins[4],
1610 };
1611
1612 /* S3C2443/S3C2416 style hardware */
1613 static struct s3c_fb_driverdata s3c_fb_data_s3c2443 __devinitdata = {
1614         .variant = {
1615                 .nr_windows     = 2,
1616                 .is_2443        = 1,
1617
1618                 .vidtcon        = 0x08,
1619                 .wincon         = 0x14,
1620                 .winmap         = 0xd0,
1621                 .keycon         = 0xb0,
1622                 .osd            = 0x28,
1623                 .osd_stride     = 12,
1624                 .buf_start      = 0x64,
1625                 .buf_size       = 0x94,
1626                 .buf_end        = 0x7c,
1627
1628                 .palette = {
1629                         [0] = 0x400,
1630                         [1] = 0x800,
1631                 },
1632         },
1633         .win[0] = &(struct s3c_fb_win_variant) {
1634                 .palette_sz     = 256,
1635                 .valid_bpp      = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1636         },
1637         .win[1] = &(struct s3c_fb_win_variant) {
1638                 .has_osd_c      = 1,
1639                 .has_osd_alpha  = 1,
1640                 .palette_sz     = 256,
1641                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1642                                    VALID_BPP(18) | VALID_BPP(19) |
1643                                    VALID_BPP(24) | VALID_BPP(25) |
1644                                    VALID_BPP(28)),
1645         },
1646 };
1647
1648 static struct platform_device_id s3c_fb_driver_ids[] = {
1649         {
1650                 .name           = "s3c-fb",
1651                 .driver_data    = (unsigned long)&s3c_fb_data_64xx,
1652         }, {
1653                 .name           = "s5pc100-fb",
1654                 .driver_data    = (unsigned long)&s3c_fb_data_s5pc100,
1655         }, {
1656                 .name           = "s5pv210-fb",
1657                 .driver_data    = (unsigned long)&s3c_fb_data_s5pv210,
1658         }, {
1659                 .name           = "s3c2443-fb",
1660                 .driver_data    = (unsigned long)&s3c_fb_data_s3c2443,
1661         },
1662         {},
1663 };
1664 MODULE_DEVICE_TABLE(platform, s3c_fb_driver_ids);
1665
1666 static struct platform_driver s3c_fb_driver = {
1667         .probe          = s3c_fb_probe,
1668         .remove         = __devexit_p(s3c_fb_remove),
1669         .suspend        = s3c_fb_suspend,
1670         .resume         = s3c_fb_resume,
1671         .id_table       = s3c_fb_driver_ids,
1672         .driver         = {
1673                 .name   = "s3c-fb",
1674                 .owner  = THIS_MODULE,
1675         },
1676 };
1677
1678 static int __init s3c_fb_init(void)
1679 {
1680         return platform_driver_register(&s3c_fb_driver);
1681 }
1682
1683 static void __exit s3c_fb_cleanup(void)
1684 {
1685         platform_driver_unregister(&s3c_fb_driver);
1686 }
1687
1688 module_init(s3c_fb_init);
1689 module_exit(s3c_fb_cleanup);
1690
1691 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1692 MODULE_DESCRIPTION("Samsung S3C SoC Framebuffer driver");
1693 MODULE_LICENSE("GPL");
1694 MODULE_ALIAS("platform:s3c-fb");