b1a75a024a2ca4b768b4de245c7273b84d500c6d
[firefly-linux-kernel-4.4.55.git] / drivers / video / s3c-fb.c
1 /* linux/drivers/video/s3c-fb.c
2  *
3  * Copyright 2008 Openmoko Inc.
4  * Copyright 2008-2010 Simtec Electronics
5  *      Ben Dooks <ben@simtec.co.uk>
6  *      http://armlinux.simtec.co.uk/
7  *
8  * Samsung SoC Framebuffer driver
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software FoundatIon.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/init.h>
21 #include <linux/clk.h>
22 #include <linux/fb.h>
23 #include <linux/io.h>
24 #include <linux/uaccess.h>
25 #include <linux/interrupt.h>
26 #include <linux/pm_runtime.h>
27
28 #include <mach/map.h>
29 #include <plat/regs-fb-v4.h>
30 #include <plat/fb.h>
31
32 /* This driver will export a number of framebuffer interfaces depending
33  * on the configuration passed in via the platform data. Each fb instance
34  * maps to a hardware window. Currently there is no support for runtime
35  * setting of the alpha-blending functions that each window has, so only
36  * window 0 is actually useful.
37  *
38  * Window 0 is treated specially, it is used for the basis of the LCD
39  * output timings and as the control for the output power-down state.
40 */
41
42 /* note, the previous use of <mach/regs-fb.h> to get platform specific data
43  * has been replaced by using the platform device name to pick the correct
44  * configuration data for the system.
45 */
46
47 #ifdef CONFIG_FB_S3C_DEBUG_REGWRITE
48 #undef writel
49 #define writel(v, r) do { \
50         printk(KERN_DEBUG "%s: %08x => %p\n", __func__, (unsigned int)v, r); \
51         __raw_writel(v, r); } while (0)
52 #endif /* FB_S3C_DEBUG_REGWRITE */
53
54 /* irq_flags bits */
55 #define S3C_FB_VSYNC_IRQ_EN     0
56
57 #define VSYNC_TIMEOUT_MSEC 50
58
59 struct s3c_fb;
60
61 #define VALID_BPP(x) (1 << ((x) - 1))
62
63 #define OSD_BASE(win, variant) ((variant).osd + ((win) * (variant).osd_stride))
64 #define VIDOSD_A(win, variant) (OSD_BASE(win, variant) + 0x00)
65 #define VIDOSD_B(win, variant) (OSD_BASE(win, variant) + 0x04)
66 #define VIDOSD_C(win, variant) (OSD_BASE(win, variant) + 0x08)
67 #define VIDOSD_D(win, variant) (OSD_BASE(win, variant) + 0x0C)
68
69 /**
70  * struct s3c_fb_variant - fb variant information
71  * @is_2443: Set if S3C2443/S3C2416 style hardware.
72  * @nr_windows: The number of windows.
73  * @vidtcon: The base for the VIDTCONx registers
74  * @wincon: The base for the WINxCON registers.
75  * @winmap: The base for the WINxMAP registers.
76  * @keycon: The abse for the WxKEYCON registers.
77  * @buf_start: Offset of buffer start registers.
78  * @buf_size: Offset of buffer size registers.
79  * @buf_end: Offset of buffer end registers.
80  * @osd: The base for the OSD registers.
81  * @palette: Address of palette memory, or 0 if none.
82  * @has_prtcon: Set if has PRTCON register.
83  * @has_shadowcon: Set if has SHADOWCON register.
84  * @has_clksel: Set if VIDCON0 register has CLKSEL bit.
85  */
86 struct s3c_fb_variant {
87         unsigned int    is_2443:1;
88         unsigned short  nr_windows;
89         unsigned short  vidtcon;
90         unsigned short  wincon;
91         unsigned short  winmap;
92         unsigned short  keycon;
93         unsigned short  buf_start;
94         unsigned short  buf_end;
95         unsigned short  buf_size;
96         unsigned short  osd;
97         unsigned short  osd_stride;
98         unsigned short  palette[S3C_FB_MAX_WIN];
99
100         unsigned int    has_prtcon:1;
101         unsigned int    has_shadowcon:1;
102         unsigned int    has_clksel:1;
103 };
104
105 /**
106  * struct s3c_fb_win_variant
107  * @has_osd_c: Set if has OSD C register.
108  * @has_osd_d: Set if has OSD D register.
109  * @has_osd_alpha: Set if can change alpha transparency for a window.
110  * @palette_sz: Size of palette in entries.
111  * @palette_16bpp: Set if palette is 16bits wide.
112  * @osd_size_off: If != 0, supports setting up OSD for a window; the appropriate
113  *                register is located at the given offset from OSD_BASE.
114  * @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
115  *
116  * valid_bpp bit x is set if (x+1)BPP is supported.
117  */
118 struct s3c_fb_win_variant {
119         unsigned int    has_osd_c:1;
120         unsigned int    has_osd_d:1;
121         unsigned int    has_osd_alpha:1;
122         unsigned int    palette_16bpp:1;
123         unsigned short  osd_size_off;
124         unsigned short  palette_sz;
125         u32             valid_bpp;
126 };
127
128 /**
129  * struct s3c_fb_driverdata - per-device type driver data for init time.
130  * @variant: The variant information for this driver.
131  * @win: The window information for each window.
132  */
133 struct s3c_fb_driverdata {
134         struct s3c_fb_variant   variant;
135         struct s3c_fb_win_variant *win[S3C_FB_MAX_WIN];
136 };
137
138 /**
139  * struct s3c_fb_palette - palette information
140  * @r: Red bitfield.
141  * @g: Green bitfield.
142  * @b: Blue bitfield.
143  * @a: Alpha bitfield.
144  */
145 struct s3c_fb_palette {
146         struct fb_bitfield      r;
147         struct fb_bitfield      g;
148         struct fb_bitfield      b;
149         struct fb_bitfield      a;
150 };
151
152 /**
153  * struct s3c_fb_win - per window private data for each framebuffer.
154  * @windata: The platform data supplied for the window configuration.
155  * @parent: The hardware that this window is part of.
156  * @fbinfo: Pointer pack to the framebuffer info for this window.
157  * @varint: The variant information for this window.
158  * @palette_buffer: Buffer/cache to hold palette entries.
159  * @pseudo_palette: For use in TRUECOLOUR modes for entries 0..15/
160  * @index: The window number of this window.
161  * @palette: The bitfields for changing r/g/b into a hardware palette entry.
162  */
163 struct s3c_fb_win {
164         struct s3c_fb_pd_win    *windata;
165         struct s3c_fb           *parent;
166         struct fb_info          *fbinfo;
167         struct s3c_fb_palette    palette;
168         struct s3c_fb_win_variant variant;
169
170         u32                     *palette_buffer;
171         u32                      pseudo_palette[16];
172         unsigned int             index;
173 };
174
175 /**
176  * struct s3c_fb_vsync - vsync information
177  * @wait:       a queue for processes waiting for vsync
178  * @count:      vsync interrupt count
179  */
180 struct s3c_fb_vsync {
181         wait_queue_head_t       wait;
182         unsigned int            count;
183 };
184
185 /**
186  * struct s3c_fb - overall hardware state of the hardware
187  * @slock: The spinlock protection for this data sturcture.
188  * @dev: The device that we bound to, for printing, etc.
189  * @regs_res: The resource we claimed for the IO registers.
190  * @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.
191  * @lcd_clk: The clk (sclk) feeding pixclk.
192  * @regs: The mapped hardware registers.
193  * @variant: Variant information for this hardware.
194  * @enabled: A bitmask of enabled hardware windows.
195  * @pdata: The platform configuration data passed with the device.
196  * @windows: The hardware windows that have been claimed.
197  * @irq_no: IRQ line number
198  * @irq_flags: irq flags
199  * @vsync_info: VSYNC-related information (count, queues...)
200  */
201 struct s3c_fb {
202         spinlock_t              slock;
203         struct device           *dev;
204         struct resource         *regs_res;
205         struct clk              *bus_clk;
206         struct clk              *lcd_clk;
207         void __iomem            *regs;
208         struct s3c_fb_variant    variant;
209
210         unsigned char            enabled;
211
212         struct s3c_fb_platdata  *pdata;
213         struct s3c_fb_win       *windows[S3C_FB_MAX_WIN];
214
215         int                      irq_no;
216         unsigned long            irq_flags;
217         struct s3c_fb_vsync      vsync_info;
218 };
219
220 /**
221  * s3c_fb_validate_win_bpp - validate the bits-per-pixel for this mode.
222  * @win: The device window.
223  * @bpp: The bit depth.
224  */
225 static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp)
226 {
227         return win->variant.valid_bpp & VALID_BPP(bpp);
228 }
229
230 /**
231  * s3c_fb_check_var() - framebuffer layer request to verify a given mode.
232  * @var: The screen information to verify.
233  * @info: The framebuffer device.
234  *
235  * Framebuffer layer call to verify the given information and allow us to
236  * update various information depending on the hardware capabilities.
237  */
238 static int s3c_fb_check_var(struct fb_var_screeninfo *var,
239                             struct fb_info *info)
240 {
241         struct s3c_fb_win *win = info->par;
242         struct s3c_fb *sfb = win->parent;
243
244         dev_dbg(sfb->dev, "checking parameters\n");
245
246         var->xres_virtual = max(var->xres_virtual, var->xres);
247         var->yres_virtual = max(var->yres_virtual, var->yres);
248
249         if (!s3c_fb_validate_win_bpp(win, var->bits_per_pixel)) {
250                 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n",
251                         win->index, var->bits_per_pixel);
252                 return -EINVAL;
253         }
254
255         /* always ensure these are zero, for drop through cases below */
256         var->transp.offset = 0;
257         var->transp.length = 0;
258
259         switch (var->bits_per_pixel) {
260         case 1:
261         case 2:
262         case 4:
263         case 8:
264                 if (sfb->variant.palette[win->index] != 0) {
265                         /* non palletised, A:1,R:2,G:3,B:2 mode */
266                         var->red.offset         = 4;
267                         var->green.offset       = 2;
268                         var->blue.offset        = 0;
269                         var->red.length         = 5;
270                         var->green.length       = 3;
271                         var->blue.length        = 2;
272                         var->transp.offset      = 7;
273                         var->transp.length      = 1;
274                 } else {
275                         var->red.offset = 0;
276                         var->red.length = var->bits_per_pixel;
277                         var->green      = var->red;
278                         var->blue       = var->red;
279                 }
280                 break;
281
282         case 19:
283                 /* 666 with one bit alpha/transparency */
284                 var->transp.offset      = 18;
285                 var->transp.length      = 1;
286         case 18:
287                 var->bits_per_pixel     = 32;
288
289                 /* 666 format */
290                 var->red.offset         = 12;
291                 var->green.offset       = 6;
292                 var->blue.offset        = 0;
293                 var->red.length         = 6;
294                 var->green.length       = 6;
295                 var->blue.length        = 6;
296                 break;
297
298         case 16:
299                 /* 16 bpp, 565 format */
300                 var->red.offset         = 11;
301                 var->green.offset       = 5;
302                 var->blue.offset        = 0;
303                 var->red.length         = 5;
304                 var->green.length       = 6;
305                 var->blue.length        = 5;
306                 break;
307
308         case 32:
309         case 28:
310         case 25:
311                 var->transp.length      = var->bits_per_pixel - 24;
312                 var->transp.offset      = 24;
313                 /* drop through */
314         case 24:
315                 /* our 24bpp is unpacked, so 32bpp */
316                 var->bits_per_pixel     = 32;
317                 var->red.offset         = 16;
318                 var->red.length         = 8;
319                 var->green.offset       = 8;
320                 var->green.length       = 8;
321                 var->blue.offset        = 0;
322                 var->blue.length        = 8;
323                 break;
324
325         default:
326                 dev_err(sfb->dev, "invalid bpp\n");
327         }
328
329         dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
330         return 0;
331 }
332
333 /**
334  * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
335  * @sfb: The hardware state.
336  * @pixclock: The pixel clock wanted, in picoseconds.
337  *
338  * Given the specified pixel clock, work out the necessary divider to get
339  * close to the output frequency.
340  */
341 static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
342 {
343         unsigned long clk;
344         unsigned long long tmp;
345         unsigned int result;
346
347         if (sfb->variant.has_clksel)
348                 clk = clk_get_rate(sfb->bus_clk);
349         else
350                 clk = clk_get_rate(sfb->lcd_clk);
351
352         tmp = (unsigned long long)clk;
353         tmp *= pixclk;
354
355         do_div(tmp, 1000000000UL);
356         result = (unsigned int)tmp / 1000;
357
358         dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
359                 pixclk, clk, result, clk / result);
360
361         return result;
362 }
363
364 /**
365  * s3c_fb_align_word() - align pixel count to word boundary
366  * @bpp: The number of bits per pixel
367  * @pix: The value to be aligned.
368  *
369  * Align the given pixel count so that it will start on an 32bit word
370  * boundary.
371  */
372 static int s3c_fb_align_word(unsigned int bpp, unsigned int pix)
373 {
374         int pix_per_word;
375
376         if (bpp > 16)
377                 return pix;
378
379         pix_per_word = (8 * 32) / bpp;
380         return ALIGN(pix, pix_per_word);
381 }
382
383 /**
384  * vidosd_set_size() - set OSD size for a window
385  *
386  * @win: the window to set OSD size for
387  * @size: OSD size register value
388  */
389 static void vidosd_set_size(struct s3c_fb_win *win, u32 size)
390 {
391         struct s3c_fb *sfb = win->parent;
392
393         /* OSD can be set up if osd_size_off != 0 for this window */
394         if (win->variant.osd_size_off)
395                 writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
396                                 + win->variant.osd_size_off);
397 }
398
399 /**
400  * vidosd_set_alpha() - set alpha transparency for a window
401  *
402  * @win: the window to set OSD size for
403  * @alpha: alpha register value
404  */
405 static void vidosd_set_alpha(struct s3c_fb_win *win, u32 alpha)
406 {
407         struct s3c_fb *sfb = win->parent;
408
409         if (win->variant.has_osd_alpha)
410                 writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
411 }
412
413 /**
414  * shadow_protect_win() - disable updating values from shadow registers at vsync
415  *
416  * @win: window to protect registers for
417  * @protect: 1 to protect (disable updates)
418  */
419 static void shadow_protect_win(struct s3c_fb_win *win, bool protect)
420 {
421         struct s3c_fb *sfb = win->parent;
422         u32 reg;
423
424         if (protect) {
425                 if (sfb->variant.has_prtcon) {
426                         writel(PRTCON_PROTECT, sfb->regs + PRTCON);
427                 } else if (sfb->variant.has_shadowcon) {
428                         reg = readl(sfb->regs + SHADOWCON);
429                         writel(reg | SHADOWCON_WINx_PROTECT(win->index),
430                                 sfb->regs + SHADOWCON);
431                 }
432         } else {
433                 if (sfb->variant.has_prtcon) {
434                         writel(0, sfb->regs + PRTCON);
435                 } else if (sfb->variant.has_shadowcon) {
436                         reg = readl(sfb->regs + SHADOWCON);
437                         writel(reg & ~SHADOWCON_WINx_PROTECT(win->index),
438                                 sfb->regs + SHADOWCON);
439                 }
440         }
441 }
442
443 /**
444  * s3c_fb_set_par() - framebuffer request to set new framebuffer state.
445  * @info: The framebuffer to change.
446  *
447  * Framebuffer layer request to set a new mode for the specified framebuffer
448  */
449 static int s3c_fb_set_par(struct fb_info *info)
450 {
451         struct fb_var_screeninfo *var = &info->var;
452         struct s3c_fb_win *win = info->par;
453         struct s3c_fb *sfb = win->parent;
454         void __iomem *regs = sfb->regs;
455         void __iomem *buf = regs;
456         int win_no = win->index;
457         u32 alpha = 0;
458         u32 data;
459         u32 pagewidth;
460         int clkdiv;
461
462         dev_dbg(sfb->dev, "setting framebuffer parameters\n");
463
464         shadow_protect_win(win, 1);
465
466         switch (var->bits_per_pixel) {
467         case 32:
468         case 24:
469         case 16:
470         case 12:
471                 info->fix.visual = FB_VISUAL_TRUECOLOR;
472                 break;
473         case 8:
474                 if (win->variant.palette_sz >= 256)
475                         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
476                 else
477                         info->fix.visual = FB_VISUAL_TRUECOLOR;
478                 break;
479         case 1:
480                 info->fix.visual = FB_VISUAL_MONO01;
481                 break;
482         default:
483                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
484                 break;
485         }
486
487         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
488
489         info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
490         info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
491
492         /* disable the window whilst we update it */
493         writel(0, regs + WINCON(win_no));
494
495         /* use platform specified window as the basis for the lcd timings */
496
497         if (win_no == sfb->pdata->default_win) {
498                 clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
499
500                 data = sfb->pdata->vidcon0;
501                 data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
502
503                 if (clkdiv > 1)
504                         data |= VIDCON0_CLKVAL_F(clkdiv-1) | VIDCON0_CLKDIR;
505                 else
506                         data &= ~VIDCON0_CLKDIR;        /* 1:1 clock */
507
508                 /* write the timing data to the panel */
509
510                 if (sfb->variant.is_2443)
511                         data |= (1 << 5);
512
513                 data |= VIDCON0_ENVID | VIDCON0_ENVID_F;
514                 writel(data, regs + VIDCON0);
515
516                 data = VIDTCON0_VBPD(var->upper_margin - 1) |
517                        VIDTCON0_VFPD(var->lower_margin - 1) |
518                        VIDTCON0_VSPW(var->vsync_len - 1);
519
520                 writel(data, regs + sfb->variant.vidtcon);
521
522                 data = VIDTCON1_HBPD(var->left_margin - 1) |
523                        VIDTCON1_HFPD(var->right_margin - 1) |
524                        VIDTCON1_HSPW(var->hsync_len - 1);
525
526                 /* VIDTCON1 */
527                 writel(data, regs + sfb->variant.vidtcon + 4);
528
529                 data = VIDTCON2_LINEVAL(var->yres - 1) |
530                        VIDTCON2_HOZVAL(var->xres - 1);
531                 writel(data, regs + sfb->variant.vidtcon + 8);
532         }
533
534         /* write the buffer address */
535
536         /* start and end registers stride is 8 */
537         buf = regs + win_no * 8;
538
539         writel(info->fix.smem_start, buf + sfb->variant.buf_start);
540
541         data = info->fix.smem_start + info->fix.line_length * var->yres;
542         writel(data, buf + sfb->variant.buf_end);
543
544         pagewidth = (var->xres * var->bits_per_pixel) >> 3;
545         data = VIDW_BUF_SIZE_OFFSET(info->fix.line_length - pagewidth) |
546                VIDW_BUF_SIZE_PAGEWIDTH(pagewidth);
547         writel(data, regs + sfb->variant.buf_size + (win_no * 4));
548
549         /* write 'OSD' registers to control position of framebuffer */
550
551         data = VIDOSDxA_TOPLEFT_X(0) | VIDOSDxA_TOPLEFT_Y(0);
552         writel(data, regs + VIDOSD_A(win_no, sfb->variant));
553
554         data = VIDOSDxB_BOTRIGHT_X(s3c_fb_align_word(var->bits_per_pixel,
555                                                      var->xres - 1)) |
556                VIDOSDxB_BOTRIGHT_Y(var->yres - 1);
557
558         writel(data, regs + VIDOSD_B(win_no, sfb->variant));
559
560         data = var->xres * var->yres;
561
562         alpha = VIDISD14C_ALPHA1_R(0xf) |
563                 VIDISD14C_ALPHA1_G(0xf) |
564                 VIDISD14C_ALPHA1_B(0xf);
565
566         vidosd_set_alpha(win, alpha);
567         vidosd_set_size(win, data);
568
569         /* Enable DMA channel for this window */
570         if (sfb->variant.has_shadowcon) {
571                 data = readl(sfb->regs + SHADOWCON);
572                 data |= SHADOWCON_CHx_ENABLE(win_no);
573                 writel(data, sfb->regs + SHADOWCON);
574         }
575
576         data = WINCONx_ENWIN;
577         sfb->enabled |= (1 << win->index);
578
579         /* note, since we have to round up the bits-per-pixel, we end up
580          * relying on the bitfield information for r/g/b/a to work out
581          * exactly which mode of operation is intended. */
582
583         switch (var->bits_per_pixel) {
584         case 1:
585                 data |= WINCON0_BPPMODE_1BPP;
586                 data |= WINCONx_BITSWP;
587                 data |= WINCONx_BURSTLEN_4WORD;
588                 break;
589         case 2:
590                 data |= WINCON0_BPPMODE_2BPP;
591                 data |= WINCONx_BITSWP;
592                 data |= WINCONx_BURSTLEN_8WORD;
593                 break;
594         case 4:
595                 data |= WINCON0_BPPMODE_4BPP;
596                 data |= WINCONx_BITSWP;
597                 data |= WINCONx_BURSTLEN_8WORD;
598                 break;
599         case 8:
600                 if (var->transp.length != 0)
601                         data |= WINCON1_BPPMODE_8BPP_1232;
602                 else
603                         data |= WINCON0_BPPMODE_8BPP_PALETTE;
604                 data |= WINCONx_BURSTLEN_8WORD;
605                 data |= WINCONx_BYTSWP;
606                 break;
607         case 16:
608                 if (var->transp.length != 0)
609                         data |= WINCON1_BPPMODE_16BPP_A1555;
610                 else
611                         data |= WINCON0_BPPMODE_16BPP_565;
612                 data |= WINCONx_HAWSWP;
613                 data |= WINCONx_BURSTLEN_16WORD;
614                 break;
615         case 24:
616         case 32:
617                 if (var->red.length == 6) {
618                         if (var->transp.length != 0)
619                                 data |= WINCON1_BPPMODE_19BPP_A1666;
620                         else
621                                 data |= WINCON1_BPPMODE_18BPP_666;
622                 } else if (var->transp.length == 1)
623                         data |= WINCON1_BPPMODE_25BPP_A1888
624                                 | WINCON1_BLD_PIX;
625                 else if ((var->transp.length == 4) ||
626                         (var->transp.length == 8))
627                         data |= WINCON1_BPPMODE_28BPP_A4888
628                                 | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
629                 else
630                         data |= WINCON0_BPPMODE_24BPP_888;
631
632                 data |= WINCONx_WSWP;
633                 data |= WINCONx_BURSTLEN_16WORD;
634                 break;
635         }
636
637         /* Enable the colour keying for the window below this one */
638         if (win_no > 0) {
639                 u32 keycon0_data = 0, keycon1_data = 0;
640                 void __iomem *keycon = regs + sfb->variant.keycon;
641
642                 keycon0_data = ~(WxKEYCON0_KEYBL_EN |
643                                 WxKEYCON0_KEYEN_F |
644                                 WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
645
646                 keycon1_data = WxKEYCON1_COLVAL(0xffffff);
647
648                 keycon += (win_no - 1) * 8;
649
650                 writel(keycon0_data, keycon + WKEYCON0);
651                 writel(keycon1_data, keycon + WKEYCON1);
652         }
653
654         writel(data, regs + sfb->variant.wincon + (win_no * 4));
655         writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
656
657         shadow_protect_win(win, 0);
658
659         return 0;
660 }
661
662 /**
663  * s3c_fb_update_palette() - set or schedule a palette update.
664  * @sfb: The hardware information.
665  * @win: The window being updated.
666  * @reg: The palette index being changed.
667  * @value: The computed palette value.
668  *
669  * Change the value of a palette register, either by directly writing to
670  * the palette (this requires the palette RAM to be disconnected from the
671  * hardware whilst this is in progress) or schedule the update for later.
672  *
673  * At the moment, since we have no VSYNC interrupt support, we simply set
674  * the palette entry directly.
675  */
676 static void s3c_fb_update_palette(struct s3c_fb *sfb,
677                                   struct s3c_fb_win *win,
678                                   unsigned int reg,
679                                   u32 value)
680 {
681         void __iomem *palreg;
682         u32 palcon;
683
684         palreg = sfb->regs + sfb->variant.palette[win->index];
685
686         dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
687                 __func__, win->index, reg, palreg, value);
688
689         win->palette_buffer[reg] = value;
690
691         palcon = readl(sfb->regs + WPALCON);
692         writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
693
694         if (win->variant.palette_16bpp)
695                 writew(value, palreg + (reg * 2));
696         else
697                 writel(value, palreg + (reg * 4));
698
699         writel(palcon, sfb->regs + WPALCON);
700 }
701
702 static inline unsigned int chan_to_field(unsigned int chan,
703                                          struct fb_bitfield *bf)
704 {
705         chan &= 0xffff;
706         chan >>= 16 - bf->length;
707         return chan << bf->offset;
708 }
709
710 /**
711  * s3c_fb_setcolreg() - framebuffer layer request to change palette.
712  * @regno: The palette index to change.
713  * @red: The red field for the palette data.
714  * @green: The green field for the palette data.
715  * @blue: The blue field for the palette data.
716  * @trans: The transparency (alpha) field for the palette data.
717  * @info: The framebuffer being changed.
718  */
719 static int s3c_fb_setcolreg(unsigned regno,
720                             unsigned red, unsigned green, unsigned blue,
721                             unsigned transp, struct fb_info *info)
722 {
723         struct s3c_fb_win *win = info->par;
724         struct s3c_fb *sfb = win->parent;
725         unsigned int val;
726
727         dev_dbg(sfb->dev, "%s: win %d: %d => rgb=%d/%d/%d\n",
728                 __func__, win->index, regno, red, green, blue);
729
730         switch (info->fix.visual) {
731         case FB_VISUAL_TRUECOLOR:
732                 /* true-colour, use pseudo-palette */
733
734                 if (regno < 16) {
735                         u32 *pal = info->pseudo_palette;
736
737                         val  = chan_to_field(red,   &info->var.red);
738                         val |= chan_to_field(green, &info->var.green);
739                         val |= chan_to_field(blue,  &info->var.blue);
740
741                         pal[regno] = val;
742                 }
743                 break;
744
745         case FB_VISUAL_PSEUDOCOLOR:
746                 if (regno < win->variant.palette_sz) {
747                         val  = chan_to_field(red, &win->palette.r);
748                         val |= chan_to_field(green, &win->palette.g);
749                         val |= chan_to_field(blue, &win->palette.b);
750
751                         s3c_fb_update_palette(sfb, win, regno, val);
752                 }
753
754                 break;
755
756         default:
757                 return 1;       /* unknown type */
758         }
759
760         return 0;
761 }
762
763 /**
764  * s3c_fb_enable() - Set the state of the main LCD output
765  * @sfb: The main framebuffer state.
766  * @enable: The state to set.
767  */
768 static void s3c_fb_enable(struct s3c_fb *sfb, int enable)
769 {
770         u32 vidcon0 = readl(sfb->regs + VIDCON0);
771
772         if (enable)
773                 vidcon0 |= VIDCON0_ENVID | VIDCON0_ENVID_F;
774         else {
775                 /* see the note in the framebuffer datasheet about
776                  * why you cannot take both of these bits down at the
777                  * same time. */
778
779                 if (!(vidcon0 & VIDCON0_ENVID))
780                         return;
781
782                 vidcon0 |= VIDCON0_ENVID;
783                 vidcon0 &= ~VIDCON0_ENVID_F;
784         }
785
786         writel(vidcon0, sfb->regs + VIDCON0);
787 }
788
789 /**
790  * s3c_fb_blank() - blank or unblank the given window
791  * @blank_mode: The blank state from FB_BLANK_*
792  * @info: The framebuffer to blank.
793  *
794  * Framebuffer layer request to change the power state.
795  */
796 static int s3c_fb_blank(int blank_mode, struct fb_info *info)
797 {
798         struct s3c_fb_win *win = info->par;
799         struct s3c_fb *sfb = win->parent;
800         unsigned int index = win->index;
801         u32 wincon;
802
803         dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
804
805         wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
806
807         switch (blank_mode) {
808         case FB_BLANK_POWERDOWN:
809                 wincon &= ~WINCONx_ENWIN;
810                 sfb->enabled &= ~(1 << index);
811                 /* fall through to FB_BLANK_NORMAL */
812
813         case FB_BLANK_NORMAL:
814                 /* disable the DMA and display 0x0 (black) */
815                 shadow_protect_win(win, 1);
816                 writel(WINxMAP_MAP | WINxMAP_MAP_COLOUR(0x0),
817                        sfb->regs + sfb->variant.winmap + (index * 4));
818                 shadow_protect_win(win, 0);
819                 break;
820
821         case FB_BLANK_UNBLANK:
822                 shadow_protect_win(win, 1);
823                 writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
824                 shadow_protect_win(win, 0);
825                 wincon |= WINCONx_ENWIN;
826                 sfb->enabled |= (1 << index);
827                 break;
828
829         case FB_BLANK_VSYNC_SUSPEND:
830         case FB_BLANK_HSYNC_SUSPEND:
831         default:
832                 return 1;
833         }
834
835         shadow_protect_win(win, 1);
836         writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
837         shadow_protect_win(win, 0);
838
839         /* Check the enabled state to see if we need to be running the
840          * main LCD interface, as if there are no active windows then
841          * it is highly likely that we also do not need to output
842          * anything.
843          */
844
845         /* We could do something like the following code, but the current
846          * system of using framebuffer events means that we cannot make
847          * the distinction between just window 0 being inactive and all
848          * the windows being down.
849          *
850          * s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
851         */
852
853         /* we're stuck with this until we can do something about overriding
854          * the power control using the blanking event for a single fb.
855          */
856         if (index == sfb->pdata->default_win) {
857                 shadow_protect_win(win, 1);
858                 s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
859                 shadow_protect_win(win, 0);
860         }
861
862         return 0;
863 }
864
865 /**
866  * s3c_fb_pan_display() - Pan the display.
867  *
868  * Note that the offsets can be written to the device at any time, as their
869  * values are latched at each vsync automatically. This also means that only
870  * the last call to this function will have any effect on next vsync, but
871  * there is no need to sleep waiting for it to prevent tearing.
872  *
873  * @var: The screen information to verify.
874  * @info: The framebuffer device.
875  */
876 static int s3c_fb_pan_display(struct fb_var_screeninfo *var,
877                               struct fb_info *info)
878 {
879         struct s3c_fb_win *win  = info->par;
880         struct s3c_fb *sfb      = win->parent;
881         void __iomem *buf       = sfb->regs + win->index * 8;
882         unsigned int start_boff, end_boff;
883
884         /* Offset in bytes to the start of the displayed area */
885         start_boff = var->yoffset * info->fix.line_length;
886         /* X offset depends on the current bpp */
887         if (info->var.bits_per_pixel >= 8) {
888                 start_boff += var->xoffset * (info->var.bits_per_pixel >> 3);
889         } else {
890                 switch (info->var.bits_per_pixel) {
891                 case 4:
892                         start_boff += var->xoffset >> 1;
893                         break;
894                 case 2:
895                         start_boff += var->xoffset >> 2;
896                         break;
897                 case 1:
898                         start_boff += var->xoffset >> 3;
899                         break;
900                 default:
901                         dev_err(sfb->dev, "invalid bpp\n");
902                         return -EINVAL;
903                 }
904         }
905         /* Offset in bytes to the end of the displayed area */
906         end_boff = start_boff + info->var.yres * info->fix.line_length;
907
908         /* Temporarily turn off per-vsync update from shadow registers until
909          * both start and end addresses are updated to prevent corruption */
910         shadow_protect_win(win, 1);
911
912         writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
913         writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
914
915         shadow_protect_win(win, 0);
916
917         return 0;
918 }
919
920 /**
921  * s3c_fb_enable_irq() - enable framebuffer interrupts
922  * @sfb: main hardware state
923  */
924 static void s3c_fb_enable_irq(struct s3c_fb *sfb)
925 {
926         void __iomem *regs = sfb->regs;
927         u32 irq_ctrl_reg;
928
929         if (!test_and_set_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
930                 /* IRQ disabled, enable it */
931                 irq_ctrl_reg = readl(regs + VIDINTCON0);
932
933                 irq_ctrl_reg |= VIDINTCON0_INT_ENABLE;
934                 irq_ctrl_reg |= VIDINTCON0_INT_FRAME;
935
936                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL0_MASK;
937                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL0_VSYNC;
938                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL1_MASK;
939                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL1_NONE;
940
941                 writel(irq_ctrl_reg, regs + VIDINTCON0);
942         }
943 }
944
945 /**
946  * s3c_fb_disable_irq() - disable framebuffer interrupts
947  * @sfb: main hardware state
948  */
949 static void s3c_fb_disable_irq(struct s3c_fb *sfb)
950 {
951         void __iomem *regs = sfb->regs;
952         u32 irq_ctrl_reg;
953
954         if (test_and_clear_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
955                 /* IRQ enabled, disable it */
956                 irq_ctrl_reg = readl(regs + VIDINTCON0);
957
958                 irq_ctrl_reg &= ~VIDINTCON0_INT_FRAME;
959                 irq_ctrl_reg &= ~VIDINTCON0_INT_ENABLE;
960
961                 writel(irq_ctrl_reg, regs + VIDINTCON0);
962         }
963 }
964
965 static irqreturn_t s3c_fb_irq(int irq, void *dev_id)
966 {
967         struct s3c_fb *sfb = dev_id;
968         void __iomem  *regs = sfb->regs;
969         u32 irq_sts_reg;
970
971         spin_lock(&sfb->slock);
972
973         irq_sts_reg = readl(regs + VIDINTCON1);
974
975         if (irq_sts_reg & VIDINTCON1_INT_FRAME) {
976
977                 /* VSYNC interrupt, accept it */
978                 writel(VIDINTCON1_INT_FRAME, regs + VIDINTCON1);
979
980                 sfb->vsync_info.count++;
981                 wake_up_interruptible(&sfb->vsync_info.wait);
982         }
983
984         /* We only support waiting for VSYNC for now, so it's safe
985          * to always disable irqs here.
986          */
987         s3c_fb_disable_irq(sfb);
988
989         spin_unlock(&sfb->slock);
990         return IRQ_HANDLED;
991 }
992
993 /**
994  * s3c_fb_wait_for_vsync() - sleep until next VSYNC interrupt or timeout
995  * @sfb: main hardware state
996  * @crtc: head index.
997  */
998 static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)
999 {
1000         unsigned long count;
1001         int ret;
1002
1003         if (crtc != 0)
1004                 return -ENODEV;
1005
1006         count = sfb->vsync_info.count;
1007         s3c_fb_enable_irq(sfb);
1008         ret = wait_event_interruptible_timeout(sfb->vsync_info.wait,
1009                                        count != sfb->vsync_info.count,
1010                                        msecs_to_jiffies(VSYNC_TIMEOUT_MSEC));
1011         if (ret == 0)
1012                 return -ETIMEDOUT;
1013
1014         return 0;
1015 }
1016
1017 static int s3c_fb_ioctl(struct fb_info *info, unsigned int cmd,
1018                         unsigned long arg)
1019 {
1020         struct s3c_fb_win *win = info->par;
1021         struct s3c_fb *sfb = win->parent;
1022         int ret;
1023         u32 crtc;
1024
1025         switch (cmd) {
1026         case FBIO_WAITFORVSYNC:
1027                 if (get_user(crtc, (u32 __user *)arg)) {
1028                         ret = -EFAULT;
1029                         break;
1030                 }
1031
1032                 ret = s3c_fb_wait_for_vsync(sfb, crtc);
1033                 break;
1034         default:
1035                 ret = -ENOTTY;
1036         }
1037
1038         return ret;
1039 }
1040
1041 static int s3c_fb_open(struct fb_info *info, int user)
1042 {
1043         struct s3c_fb_win *win = info->par;
1044         struct s3c_fb *sfb = win->parent;
1045
1046         pm_runtime_get_sync(sfb->dev);
1047
1048         return 0;
1049 }
1050
1051 static int s3c_fb_release(struct fb_info *info, int user)
1052 {
1053         struct s3c_fb_win *win = info->par;
1054         struct s3c_fb *sfb = win->parent;
1055
1056         pm_runtime_put_sync(sfb->dev);
1057
1058         return 0;
1059 }
1060
1061 static struct fb_ops s3c_fb_ops = {
1062         .owner          = THIS_MODULE,
1063         .fb_open        = s3c_fb_open,
1064         .fb_release     = s3c_fb_release,
1065         .fb_check_var   = s3c_fb_check_var,
1066         .fb_set_par     = s3c_fb_set_par,
1067         .fb_blank       = s3c_fb_blank,
1068         .fb_setcolreg   = s3c_fb_setcolreg,
1069         .fb_fillrect    = cfb_fillrect,
1070         .fb_copyarea    = cfb_copyarea,
1071         .fb_imageblit   = cfb_imageblit,
1072         .fb_pan_display = s3c_fb_pan_display,
1073         .fb_ioctl       = s3c_fb_ioctl,
1074 };
1075
1076 /**
1077  * s3c_fb_missing_pixclock() - calculates pixel clock
1078  * @mode: The video mode to change.
1079  *
1080  * Calculate the pixel clock when none has been given through platform data.
1081  */
1082 static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
1083 {
1084         u64 pixclk = 1000000000000ULL;
1085         u32 div;
1086
1087         div  = mode->left_margin + mode->hsync_len + mode->right_margin +
1088                mode->xres;
1089         div *= mode->upper_margin + mode->vsync_len + mode->lower_margin +
1090                mode->yres;
1091         div *= mode->refresh ? : 60;
1092
1093         do_div(pixclk, div);
1094
1095         mode->pixclock = pixclk;
1096 }
1097
1098 /**
1099  * s3c_fb_alloc_memory() - allocate display memory for framebuffer window
1100  * @sfb: The base resources for the hardware.
1101  * @win: The window to initialise memory for.
1102  *
1103  * Allocate memory for the given framebuffer.
1104  */
1105 static int __devinit s3c_fb_alloc_memory(struct s3c_fb *sfb,
1106                                          struct s3c_fb_win *win)
1107 {
1108         struct s3c_fb_pd_win *windata = win->windata;
1109         unsigned int real_size, virt_size, size;
1110         struct fb_info *fbi = win->fbinfo;
1111         dma_addr_t map_dma;
1112
1113         dev_dbg(sfb->dev, "allocating memory for display\n");
1114
1115         real_size = windata->win_mode.xres * windata->win_mode.yres;
1116         virt_size = windata->virtual_x * windata->virtual_y;
1117
1118         dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
1119                 real_size, windata->win_mode.xres, windata->win_mode.yres,
1120                 virt_size, windata->virtual_x, windata->virtual_y);
1121
1122         size = (real_size > virt_size) ? real_size : virt_size;
1123         size *= (windata->max_bpp > 16) ? 32 : windata->max_bpp;
1124         size /= 8;
1125
1126         fbi->fix.smem_len = size;
1127         size = PAGE_ALIGN(size);
1128
1129         dev_dbg(sfb->dev, "want %u bytes for window\n", size);
1130
1131         fbi->screen_base = dma_alloc_writecombine(sfb->dev, size,
1132                                                   &map_dma, GFP_KERNEL);
1133         if (!fbi->screen_base)
1134                 return -ENOMEM;
1135
1136         dev_dbg(sfb->dev, "mapped %x to %p\n",
1137                 (unsigned int)map_dma, fbi->screen_base);
1138
1139         memset(fbi->screen_base, 0x0, size);
1140         fbi->fix.smem_start = map_dma;
1141
1142         return 0;
1143 }
1144
1145 /**
1146  * s3c_fb_free_memory() - free the display memory for the given window
1147  * @sfb: The base resources for the hardware.
1148  * @win: The window to free the display memory for.
1149  *
1150  * Free the display memory allocated by s3c_fb_alloc_memory().
1151  */
1152 static void s3c_fb_free_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1153 {
1154         struct fb_info *fbi = win->fbinfo;
1155
1156         if (fbi->screen_base)
1157                 dma_free_writecombine(sfb->dev, PAGE_ALIGN(fbi->fix.smem_len),
1158                               fbi->screen_base, fbi->fix.smem_start);
1159 }
1160
1161 /**
1162  * s3c_fb_release_win() - release resources for a framebuffer window.
1163  * @win: The window to cleanup the resources for.
1164  *
1165  * Release the resources that where claimed for the hardware window,
1166  * such as the framebuffer instance and any memory claimed for it.
1167  */
1168 static void s3c_fb_release_win(struct s3c_fb *sfb, struct s3c_fb_win *win)
1169 {
1170         u32 data;
1171
1172         if (win->fbinfo) {
1173                 if (sfb->variant.has_shadowcon) {
1174                         data = readl(sfb->regs + SHADOWCON);
1175                         data &= ~SHADOWCON_CHx_ENABLE(win->index);
1176                         data &= ~SHADOWCON_CHx_LOCAL_ENABLE(win->index);
1177                         writel(data, sfb->regs + SHADOWCON);
1178                 }
1179                 unregister_framebuffer(win->fbinfo);
1180                 if (win->fbinfo->cmap.len)
1181                         fb_dealloc_cmap(&win->fbinfo->cmap);
1182                 s3c_fb_free_memory(sfb, win);
1183                 framebuffer_release(win->fbinfo);
1184         }
1185 }
1186
1187 /**
1188  * s3c_fb_probe_win() - register an hardware window
1189  * @sfb: The base resources for the hardware
1190  * @variant: The variant information for this window.
1191  * @res: Pointer to where to place the resultant window.
1192  *
1193  * Allocate and do the basic initialisation for one of the hardware's graphics
1194  * windows.
1195  */
1196 static int __devinit s3c_fb_probe_win(struct s3c_fb *sfb, unsigned int win_no,
1197                                       struct s3c_fb_win_variant *variant,
1198                                       struct s3c_fb_win **res)
1199 {
1200         struct fb_var_screeninfo *var;
1201         struct fb_videomode *initmode;
1202         struct s3c_fb_pd_win *windata;
1203         struct s3c_fb_win *win;
1204         struct fb_info *fbinfo;
1205         int palette_size;
1206         int ret;
1207
1208         dev_dbg(sfb->dev, "probing window %d, variant %p\n", win_no, variant);
1209
1210         init_waitqueue_head(&sfb->vsync_info.wait);
1211
1212         palette_size = variant->palette_sz * 4;
1213
1214         fbinfo = framebuffer_alloc(sizeof(struct s3c_fb_win) +
1215                                    palette_size * sizeof(u32), sfb->dev);
1216         if (!fbinfo) {
1217                 dev_err(sfb->dev, "failed to allocate framebuffer\n");
1218                 return -ENOENT;
1219         }
1220
1221         windata = sfb->pdata->win[win_no];
1222         initmode = &windata->win_mode;
1223
1224         WARN_ON(windata->max_bpp == 0);
1225         WARN_ON(windata->win_mode.xres == 0);
1226         WARN_ON(windata->win_mode.yres == 0);
1227
1228         win = fbinfo->par;
1229         *res = win;
1230         var = &fbinfo->var;
1231         win->variant = *variant;
1232         win->fbinfo = fbinfo;
1233         win->parent = sfb;
1234         win->windata = windata;
1235         win->index = win_no;
1236         win->palette_buffer = (u32 *)(win + 1);
1237
1238         ret = s3c_fb_alloc_memory(sfb, win);
1239         if (ret) {
1240                 dev_err(sfb->dev, "failed to allocate display memory\n");
1241                 return ret;
1242         }
1243
1244         /* setup the r/b/g positions for the window's palette */
1245         if (win->variant.palette_16bpp) {
1246                 /* Set RGB 5:6:5 as default */
1247                 win->palette.r.offset = 11;
1248                 win->palette.r.length = 5;
1249                 win->palette.g.offset = 5;
1250                 win->palette.g.length = 6;
1251                 win->palette.b.offset = 0;
1252                 win->palette.b.length = 5;
1253
1254         } else {
1255                 /* Set 8bpp or 8bpp and 1bit alpha */
1256                 win->palette.r.offset = 16;
1257                 win->palette.r.length = 8;
1258                 win->palette.g.offset = 8;
1259                 win->palette.g.length = 8;
1260                 win->palette.b.offset = 0;
1261                 win->palette.b.length = 8;
1262         }
1263
1264         /* setup the initial video mode from the window */
1265         fb_videomode_to_var(&fbinfo->var, initmode);
1266
1267         fbinfo->fix.type        = FB_TYPE_PACKED_PIXELS;
1268         fbinfo->fix.accel       = FB_ACCEL_NONE;
1269         fbinfo->var.activate    = FB_ACTIVATE_NOW;
1270         fbinfo->var.vmode       = FB_VMODE_NONINTERLACED;
1271         fbinfo->var.bits_per_pixel = windata->default_bpp;
1272         fbinfo->fbops           = &s3c_fb_ops;
1273         fbinfo->flags           = FBINFO_FLAG_DEFAULT;
1274         fbinfo->pseudo_palette  = &win->pseudo_palette;
1275
1276         /* prepare to actually start the framebuffer */
1277
1278         ret = s3c_fb_check_var(&fbinfo->var, fbinfo);
1279         if (ret < 0) {
1280                 dev_err(sfb->dev, "check_var failed on initial video params\n");
1281                 return ret;
1282         }
1283
1284         /* create initial colour map */
1285
1286         ret = fb_alloc_cmap(&fbinfo->cmap, win->variant.palette_sz, 1);
1287         if (ret == 0)
1288                 fb_set_cmap(&fbinfo->cmap, fbinfo);
1289         else
1290                 dev_err(sfb->dev, "failed to allocate fb cmap\n");
1291
1292         s3c_fb_set_par(fbinfo);
1293
1294         dev_dbg(sfb->dev, "about to register framebuffer\n");
1295
1296         /* run the check_var and set_par on our configuration. */
1297
1298         ret = register_framebuffer(fbinfo);
1299         if (ret < 0) {
1300                 dev_err(sfb->dev, "failed to register framebuffer\n");
1301                 return ret;
1302         }
1303
1304         dev_info(sfb->dev, "window %d: fb %s\n", win_no, fbinfo->fix.id);
1305
1306         return 0;
1307 }
1308
1309 /**
1310  * s3c_fb_clear_win() - clear hardware window registers.
1311  * @sfb: The base resources for the hardware.
1312  * @win: The window to process.
1313  *
1314  * Reset the specific window registers to a known state.
1315  */
1316 static void s3c_fb_clear_win(struct s3c_fb *sfb, int win)
1317 {
1318         void __iomem *regs = sfb->regs;
1319         u32 reg;
1320
1321         writel(0, regs + sfb->variant.wincon + (win * 4));
1322         writel(0, regs + VIDOSD_A(win, sfb->variant));
1323         writel(0, regs + VIDOSD_B(win, sfb->variant));
1324         writel(0, regs + VIDOSD_C(win, sfb->variant));
1325         reg = readl(regs + SHADOWCON);
1326         writel(reg & ~SHADOWCON_WINx_PROTECT(win), regs + SHADOWCON);
1327 }
1328
1329 static int __devinit s3c_fb_probe(struct platform_device *pdev)
1330 {
1331         const struct platform_device_id *platid;
1332         struct s3c_fb_driverdata *fbdrv;
1333         struct device *dev = &pdev->dev;
1334         struct s3c_fb_platdata *pd;
1335         struct s3c_fb *sfb;
1336         struct resource *res;
1337         int win;
1338         int ret = 0;
1339
1340         platid = platform_get_device_id(pdev);
1341         fbdrv = (struct s3c_fb_driverdata *)platid->driver_data;
1342
1343         if (fbdrv->variant.nr_windows > S3C_FB_MAX_WIN) {
1344                 dev_err(dev, "too many windows, cannot attach\n");
1345                 return -EINVAL;
1346         }
1347
1348         pd = pdev->dev.platform_data;
1349         if (!pd) {
1350                 dev_err(dev, "no platform data specified\n");
1351                 return -EINVAL;
1352         }
1353
1354         sfb = kzalloc(sizeof(struct s3c_fb), GFP_KERNEL);
1355         if (!sfb) {
1356                 dev_err(dev, "no memory for framebuffers\n");
1357                 return -ENOMEM;
1358         }
1359
1360         dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
1361
1362         sfb->dev = dev;
1363         sfb->pdata = pd;
1364         sfb->variant = fbdrv->variant;
1365
1366         spin_lock_init(&sfb->slock);
1367
1368         sfb->bus_clk = clk_get(dev, "lcd");
1369         if (IS_ERR(sfb->bus_clk)) {
1370                 dev_err(dev, "failed to get bus clock\n");
1371                 ret = PTR_ERR(sfb->bus_clk);
1372                 goto err_sfb;
1373         }
1374
1375         clk_enable(sfb->bus_clk);
1376
1377         if (!sfb->variant.has_clksel) {
1378                 sfb->lcd_clk = clk_get(dev, "sclk_fimd");
1379                 if (IS_ERR(sfb->lcd_clk)) {
1380                         dev_err(dev, "failed to get lcd clock\n");
1381                         ret = PTR_ERR(sfb->lcd_clk);
1382                         goto err_bus_clk;
1383                 }
1384
1385                 clk_enable(sfb->lcd_clk);
1386         }
1387
1388         pm_runtime_enable(sfb->dev);
1389
1390         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1391         if (!res) {
1392                 dev_err(dev, "failed to find registers\n");
1393                 ret = -ENOENT;
1394                 goto err_lcd_clk;
1395         }
1396
1397         sfb->regs_res = request_mem_region(res->start, resource_size(res),
1398                                            dev_name(dev));
1399         if (!sfb->regs_res) {
1400                 dev_err(dev, "failed to claim register region\n");
1401                 ret = -ENOENT;
1402                 goto err_lcd_clk;
1403         }
1404
1405         sfb->regs = ioremap(res->start, resource_size(res));
1406         if (!sfb->regs) {
1407                 dev_err(dev, "failed to map registers\n");
1408                 ret = -ENXIO;
1409                 goto err_req_region;
1410         }
1411
1412         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1413         if (!res) {
1414                 dev_err(dev, "failed to acquire irq resource\n");
1415                 ret = -ENOENT;
1416                 goto err_ioremap;
1417         }
1418         sfb->irq_no = res->start;
1419         ret = request_irq(sfb->irq_no, s3c_fb_irq,
1420                           0, "s3c_fb", sfb);
1421         if (ret) {
1422                 dev_err(dev, "irq request failed\n");
1423                 goto err_ioremap;
1424         }
1425
1426         dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
1427
1428         platform_set_drvdata(pdev, sfb);
1429         pm_runtime_get_sync(sfb->dev);
1430
1431         /* setup gpio and output polarity controls */
1432
1433         pd->setup_gpio();
1434
1435         writel(pd->vidcon1, sfb->regs + VIDCON1);
1436
1437         /* zero all windows before we do anything */
1438
1439         for (win = 0; win < fbdrv->variant.nr_windows; win++)
1440                 s3c_fb_clear_win(sfb, win);
1441
1442         /* initialise colour key controls */
1443         for (win = 0; win < (fbdrv->variant.nr_windows - 1); win++) {
1444                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1445
1446                 regs += (win * 8);
1447                 writel(0xffffff, regs + WKEYCON0);
1448                 writel(0xffffff, regs + WKEYCON1);
1449         }
1450
1451         /* we have the register setup, start allocating framebuffers */
1452
1453         for (win = 0; win < fbdrv->variant.nr_windows; win++) {
1454                 if (!pd->win[win])
1455                         continue;
1456
1457                 if (!pd->win[win]->win_mode.pixclock)
1458                         s3c_fb_missing_pixclock(&pd->win[win]->win_mode);
1459
1460                 ret = s3c_fb_probe_win(sfb, win, fbdrv->win[win],
1461                                        &sfb->windows[win]);
1462                 if (ret < 0) {
1463                         dev_err(dev, "failed to create window %d\n", win);
1464                         for (; win >= 0; win--)
1465                                 s3c_fb_release_win(sfb, sfb->windows[win]);
1466                         goto err_irq;
1467                 }
1468         }
1469
1470         platform_set_drvdata(pdev, sfb);
1471         pm_runtime_put_sync(sfb->dev);
1472
1473         return 0;
1474
1475 err_irq:
1476         free_irq(sfb->irq_no, sfb);
1477
1478 err_ioremap:
1479         iounmap(sfb->regs);
1480
1481 err_req_region:
1482         release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
1483
1484 err_lcd_clk:
1485         if (!sfb->variant.has_clksel) {
1486                 clk_disable(sfb->lcd_clk);
1487                 clk_put(sfb->lcd_clk);
1488         }
1489
1490 err_bus_clk:
1491         clk_disable(sfb->bus_clk);
1492         clk_put(sfb->bus_clk);
1493
1494 err_sfb:
1495         kfree(sfb);
1496         return ret;
1497 }
1498
1499 /**
1500  * s3c_fb_remove() - Cleanup on module finalisation
1501  * @pdev: The platform device we are bound to.
1502  *
1503  * Shutdown and then release all the resources that the driver allocated
1504  * on initialisation.
1505  */
1506 static int __devexit s3c_fb_remove(struct platform_device *pdev)
1507 {
1508         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1509         int win;
1510
1511         pm_runtime_get_sync(sfb->dev);
1512
1513         for (win = 0; win < S3C_FB_MAX_WIN; win++)
1514                 if (sfb->windows[win])
1515                         s3c_fb_release_win(sfb, sfb->windows[win]);
1516
1517         free_irq(sfb->irq_no, sfb);
1518
1519         iounmap(sfb->regs);
1520
1521         if (!sfb->variant.has_clksel) {
1522                 clk_disable(sfb->lcd_clk);
1523                 clk_put(sfb->lcd_clk);
1524         }
1525
1526         clk_disable(sfb->bus_clk);
1527         clk_put(sfb->bus_clk);
1528
1529         release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
1530
1531         pm_runtime_put_sync(sfb->dev);
1532         pm_runtime_disable(sfb->dev);
1533
1534         kfree(sfb);
1535         return 0;
1536 }
1537
1538 #ifdef CONFIG_PM
1539 static int s3c_fb_suspend(struct device *dev)
1540 {
1541         struct platform_device *pdev = to_platform_device(dev);
1542         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1543         struct s3c_fb_win *win;
1544         int win_no;
1545
1546         for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1547                 win = sfb->windows[win_no];
1548                 if (!win)
1549                         continue;
1550
1551                 /* use the blank function to push into power-down */
1552                 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1553         }
1554
1555         if (!sfb->variant.has_clksel)
1556                 clk_disable(sfb->lcd_clk);
1557
1558         clk_disable(sfb->bus_clk);
1559         return 0;
1560 }
1561
1562 static int s3c_fb_resume(struct device *dev)
1563 {
1564         struct platform_device *pdev = to_platform_device(dev);
1565         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1566         struct s3c_fb_platdata *pd = sfb->pdata;
1567         struct s3c_fb_win *win;
1568         int win_no;
1569
1570         clk_enable(sfb->bus_clk);
1571
1572         if (!sfb->variant.has_clksel)
1573                 clk_enable(sfb->lcd_clk);
1574
1575         /* setup gpio and output polarity controls */
1576         pd->setup_gpio();
1577         writel(pd->vidcon1, sfb->regs + VIDCON1);
1578
1579         /* zero all windows before we do anything */
1580         for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1581                 s3c_fb_clear_win(sfb, win_no);
1582
1583         for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1584                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1585                 win = sfb->windows[win_no];
1586                 if (!win)
1587                         continue;
1588
1589                 shadow_protect_win(win, 1);
1590                 regs += (win_no * 8);
1591                 writel(0xffffff, regs + WKEYCON0);
1592                 writel(0xffffff, regs + WKEYCON1);
1593                 shadow_protect_win(win, 0);
1594         }
1595
1596         /* restore framebuffers */
1597         for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1598                 win = sfb->windows[win_no];
1599                 if (!win)
1600                         continue;
1601
1602                 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1603                 s3c_fb_set_par(win->fbinfo);
1604         }
1605
1606         return 0;
1607 }
1608 #else
1609 #define s3c_fb_suspend NULL
1610 #define s3c_fb_resume  NULL
1611 #endif
1612
1613
1614 #define VALID_BPP124 (VALID_BPP(1) | VALID_BPP(2) | VALID_BPP(4))
1615 #define VALID_BPP1248 (VALID_BPP124 | VALID_BPP(8))
1616
1617 static struct s3c_fb_win_variant s3c_fb_data_64xx_wins[] = {
1618         [0] = {
1619                 .has_osd_c      = 1,
1620                 .osd_size_off   = 0x8,
1621                 .palette_sz     = 256,
1622                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1623                                    VALID_BPP(18) | VALID_BPP(24)),
1624         },
1625         [1] = {
1626                 .has_osd_c      = 1,
1627                 .has_osd_d      = 1,
1628                 .osd_size_off   = 0xc,
1629                 .has_osd_alpha  = 1,
1630                 .palette_sz     = 256,
1631                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1632                                    VALID_BPP(18) | VALID_BPP(19) |
1633                                    VALID_BPP(24) | VALID_BPP(25) |
1634                                    VALID_BPP(28)),
1635         },
1636         [2] = {
1637                 .has_osd_c      = 1,
1638                 .has_osd_d      = 1,
1639                 .osd_size_off   = 0xc,
1640                 .has_osd_alpha  = 1,
1641                 .palette_sz     = 16,
1642                 .palette_16bpp  = 1,
1643                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1644                                    VALID_BPP(18) | VALID_BPP(19) |
1645                                    VALID_BPP(24) | VALID_BPP(25) |
1646                                    VALID_BPP(28)),
1647         },
1648         [3] = {
1649                 .has_osd_c      = 1,
1650                 .has_osd_alpha  = 1,
1651                 .palette_sz     = 16,
1652                 .palette_16bpp  = 1,
1653                 .valid_bpp      = (VALID_BPP124  | VALID_BPP(16) |
1654                                    VALID_BPP(18) | VALID_BPP(19) |
1655                                    VALID_BPP(24) | VALID_BPP(25) |
1656                                    VALID_BPP(28)),
1657         },
1658         [4] = {
1659                 .has_osd_c      = 1,
1660                 .has_osd_alpha  = 1,
1661                 .palette_sz     = 4,
1662                 .palette_16bpp  = 1,
1663                 .valid_bpp      = (VALID_BPP(1) | VALID_BPP(2) |
1664                                    VALID_BPP(16) | VALID_BPP(18) |
1665                                    VALID_BPP(19) | VALID_BPP(24) |
1666                                    VALID_BPP(25) | VALID_BPP(28)),
1667         },
1668 };
1669
1670 static struct s3c_fb_win_variant s3c_fb_data_s5p_wins[] = {
1671         [0] = {
1672                 .has_osd_c      = 1,
1673                 .osd_size_off   = 0x8,
1674                 .palette_sz     = 256,
1675                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1676                                    VALID_BPP(15) | VALID_BPP(16) |
1677                                    VALID_BPP(18) | VALID_BPP(19) |
1678                                    VALID_BPP(24) | VALID_BPP(25) |
1679                                    VALID_BPP(32)),
1680         },
1681         [1] = {
1682                 .has_osd_c      = 1,
1683                 .has_osd_d      = 1,
1684                 .osd_size_off   = 0xc,
1685                 .has_osd_alpha  = 1,
1686                 .palette_sz     = 256,
1687                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1688                                    VALID_BPP(15) | VALID_BPP(16) |
1689                                    VALID_BPP(18) | VALID_BPP(19) |
1690                                    VALID_BPP(24) | VALID_BPP(25) |
1691                                    VALID_BPP(32)),
1692         },
1693         [2] = {
1694                 .has_osd_c      = 1,
1695                 .has_osd_d      = 1,
1696                 .osd_size_off   = 0xc,
1697                 .has_osd_alpha  = 1,
1698                 .palette_sz     = 256,
1699                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1700                                    VALID_BPP(15) | VALID_BPP(16) |
1701                                    VALID_BPP(18) | VALID_BPP(19) |
1702                                    VALID_BPP(24) | VALID_BPP(25) |
1703                                    VALID_BPP(32)),
1704         },
1705         [3] = {
1706                 .has_osd_c      = 1,
1707                 .has_osd_alpha  = 1,
1708                 .palette_sz     = 256,
1709                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1710                                    VALID_BPP(15) | VALID_BPP(16) |
1711                                    VALID_BPP(18) | VALID_BPP(19) |
1712                                    VALID_BPP(24) | VALID_BPP(25) |
1713                                    VALID_BPP(32)),
1714         },
1715         [4] = {
1716                 .has_osd_c      = 1,
1717                 .has_osd_alpha  = 1,
1718                 .palette_sz     = 256,
1719                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1720                                    VALID_BPP(15) | VALID_BPP(16) |
1721                                    VALID_BPP(18) | VALID_BPP(19) |
1722                                    VALID_BPP(24) | VALID_BPP(25) |
1723                                    VALID_BPP(32)),
1724         },
1725 };
1726
1727 static struct s3c_fb_driverdata s3c_fb_data_64xx = {
1728         .variant = {
1729                 .nr_windows     = 5,
1730                 .vidtcon        = VIDTCON0,
1731                 .wincon         = WINCON(0),
1732                 .winmap         = WINxMAP(0),
1733                 .keycon         = WKEYCON,
1734                 .osd            = VIDOSD_BASE,
1735                 .osd_stride     = 16,
1736                 .buf_start      = VIDW_BUF_START(0),
1737                 .buf_size       = VIDW_BUF_SIZE(0),
1738                 .buf_end        = VIDW_BUF_END(0),
1739
1740                 .palette = {
1741                         [0] = 0x400,
1742                         [1] = 0x800,
1743                         [2] = 0x300,
1744                         [3] = 0x320,
1745                         [4] = 0x340,
1746                 },
1747
1748                 .has_prtcon     = 1,
1749                 .has_clksel     = 1,
1750         },
1751         .win[0] = &s3c_fb_data_64xx_wins[0],
1752         .win[1] = &s3c_fb_data_64xx_wins[1],
1753         .win[2] = &s3c_fb_data_64xx_wins[2],
1754         .win[3] = &s3c_fb_data_64xx_wins[3],
1755         .win[4] = &s3c_fb_data_64xx_wins[4],
1756 };
1757
1758 static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
1759         .variant = {
1760                 .nr_windows     = 5,
1761                 .vidtcon        = VIDTCON0,
1762                 .wincon         = WINCON(0),
1763                 .winmap         = WINxMAP(0),
1764                 .keycon         = WKEYCON,
1765                 .osd            = VIDOSD_BASE,
1766                 .osd_stride     = 16,
1767                 .buf_start      = VIDW_BUF_START(0),
1768                 .buf_size       = VIDW_BUF_SIZE(0),
1769                 .buf_end        = VIDW_BUF_END(0),
1770
1771                 .palette = {
1772                         [0] = 0x2400,
1773                         [1] = 0x2800,
1774                         [2] = 0x2c00,
1775                         [3] = 0x3000,
1776                         [4] = 0x3400,
1777                 },
1778
1779                 .has_prtcon     = 1,
1780                 .has_clksel     = 1,
1781         },
1782         .win[0] = &s3c_fb_data_s5p_wins[0],
1783         .win[1] = &s3c_fb_data_s5p_wins[1],
1784         .win[2] = &s3c_fb_data_s5p_wins[2],
1785         .win[3] = &s3c_fb_data_s5p_wins[3],
1786         .win[4] = &s3c_fb_data_s5p_wins[4],
1787 };
1788
1789 static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
1790         .variant = {
1791                 .nr_windows     = 5,
1792                 .vidtcon        = VIDTCON0,
1793                 .wincon         = WINCON(0),
1794                 .winmap         = WINxMAP(0),
1795                 .keycon         = WKEYCON,
1796                 .osd            = VIDOSD_BASE,
1797                 .osd_stride     = 16,
1798                 .buf_start      = VIDW_BUF_START(0),
1799                 .buf_size       = VIDW_BUF_SIZE(0),
1800                 .buf_end        = VIDW_BUF_END(0),
1801
1802                 .palette = {
1803                         [0] = 0x2400,
1804                         [1] = 0x2800,
1805                         [2] = 0x2c00,
1806                         [3] = 0x3000,
1807                         [4] = 0x3400,
1808                 },
1809
1810                 .has_shadowcon  = 1,
1811                 .has_clksel     = 1,
1812         },
1813         .win[0] = &s3c_fb_data_s5p_wins[0],
1814         .win[1] = &s3c_fb_data_s5p_wins[1],
1815         .win[2] = &s3c_fb_data_s5p_wins[2],
1816         .win[3] = &s3c_fb_data_s5p_wins[3],
1817         .win[4] = &s3c_fb_data_s5p_wins[4],
1818 };
1819
1820 static struct s3c_fb_driverdata s3c_fb_data_exynos4 = {
1821         .variant = {
1822                 .nr_windows     = 5,
1823                 .vidtcon        = VIDTCON0,
1824                 .wincon         = WINCON(0),
1825                 .winmap         = WINxMAP(0),
1826                 .keycon         = WKEYCON,
1827                 .osd            = VIDOSD_BASE,
1828                 .osd_stride     = 16,
1829                 .buf_start      = VIDW_BUF_START(0),
1830                 .buf_size       = VIDW_BUF_SIZE(0),
1831                 .buf_end        = VIDW_BUF_END(0),
1832
1833                 .palette = {
1834                         [0] = 0x2400,
1835                         [1] = 0x2800,
1836                         [2] = 0x2c00,
1837                         [3] = 0x3000,
1838                         [4] = 0x3400,
1839                 },
1840
1841                 .has_shadowcon  = 1,
1842         },
1843         .win[0] = &s3c_fb_data_s5p_wins[0],
1844         .win[1] = &s3c_fb_data_s5p_wins[1],
1845         .win[2] = &s3c_fb_data_s5p_wins[2],
1846         .win[3] = &s3c_fb_data_s5p_wins[3],
1847         .win[4] = &s3c_fb_data_s5p_wins[4],
1848 };
1849
1850 /* S3C2443/S3C2416 style hardware */
1851 static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
1852         .variant = {
1853                 .nr_windows     = 2,
1854                 .is_2443        = 1,
1855
1856                 .vidtcon        = 0x08,
1857                 .wincon         = 0x14,
1858                 .winmap         = 0xd0,
1859                 .keycon         = 0xb0,
1860                 .osd            = 0x28,
1861                 .osd_stride     = 12,
1862                 .buf_start      = 0x64,
1863                 .buf_size       = 0x94,
1864                 .buf_end        = 0x7c,
1865
1866                 .palette = {
1867                         [0] = 0x400,
1868                         [1] = 0x800,
1869                 },
1870                 .has_clksel     = 1,
1871         },
1872         .win[0] = &(struct s3c_fb_win_variant) {
1873                 .palette_sz     = 256,
1874                 .valid_bpp      = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1875         },
1876         .win[1] = &(struct s3c_fb_win_variant) {
1877                 .has_osd_c      = 1,
1878                 .has_osd_alpha  = 1,
1879                 .palette_sz     = 256,
1880                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1881                                    VALID_BPP(18) | VALID_BPP(19) |
1882                                    VALID_BPP(24) | VALID_BPP(25) |
1883                                    VALID_BPP(28)),
1884         },
1885 };
1886
1887 static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = {
1888         .variant = {
1889                 .nr_windows     = 3,
1890                 .vidtcon        = VIDTCON0,
1891                 .wincon         = WINCON(0),
1892                 .winmap         = WINxMAP(0),
1893                 .keycon         = WKEYCON,
1894                 .osd            = VIDOSD_BASE,
1895                 .osd_stride     = 16,
1896                 .buf_start      = VIDW_BUF_START(0),
1897                 .buf_size       = VIDW_BUF_SIZE(0),
1898                 .buf_end        = VIDW_BUF_END(0),
1899
1900                 .palette = {
1901                         [0] = 0x2400,
1902                         [1] = 0x2800,
1903                         [2] = 0x2c00,
1904                 },
1905         },
1906         .win[0] = &s3c_fb_data_s5p_wins[0],
1907         .win[1] = &s3c_fb_data_s5p_wins[1],
1908         .win[2] = &s3c_fb_data_s5p_wins[2],
1909 };
1910
1911 static struct platform_device_id s3c_fb_driver_ids[] = {
1912         {
1913                 .name           = "s3c-fb",
1914                 .driver_data    = (unsigned long)&s3c_fb_data_64xx,
1915         }, {
1916                 .name           = "s5pc100-fb",
1917                 .driver_data    = (unsigned long)&s3c_fb_data_s5pc100,
1918         }, {
1919                 .name           = "s5pv210-fb",
1920                 .driver_data    = (unsigned long)&s3c_fb_data_s5pv210,
1921         }, {
1922                 .name           = "exynos4-fb",
1923                 .driver_data    = (unsigned long)&s3c_fb_data_exynos4,
1924         }, {
1925                 .name           = "s3c2443-fb",
1926                 .driver_data    = (unsigned long)&s3c_fb_data_s3c2443,
1927         }, {
1928                 .name           = "s5p64x0-fb",
1929                 .driver_data    = (unsigned long)&s3c_fb_data_s5p64x0,
1930         },
1931         {},
1932 };
1933 MODULE_DEVICE_TABLE(platform, s3c_fb_driver_ids);
1934
1935 static UNIVERSAL_DEV_PM_OPS(s3cfb_pm_ops, s3c_fb_suspend, s3c_fb_resume, NULL);
1936
1937 static struct platform_driver s3c_fb_driver = {
1938         .probe          = s3c_fb_probe,
1939         .remove         = __devexit_p(s3c_fb_remove),
1940         .id_table       = s3c_fb_driver_ids,
1941         .driver         = {
1942                 .name   = "s3c-fb",
1943                 .owner  = THIS_MODULE,
1944                 .pm     = &s3cfb_pm_ops,
1945         },
1946 };
1947
1948 module_platform_driver(s3c_fb_driver);
1949
1950 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1951 MODULE_DESCRIPTION("Samsung S3C SoC Framebuffer driver");
1952 MODULE_LICENSE("GPL");
1953 MODULE_ALIAS("platform:s3c-fb");