5 * Author: Hannu Mallat <hmallat@cc.hut.fi>
7 * Copyright © 1999 Hannu Mallat
10 * Created : Thu Sep 23 18:17:43 1999, hmallat
11 * Last modified: Tue Nov 2 21:19:47 1999, hmallat
13 * Lots of the information here comes from the Daryll Strauss' Banshee
14 * patches to the XF86 server, and the rest comes from the 3dfx
15 * Banshee specification. I'm very much indebted to Daryll for his
16 * work on the X server.
18 * Voodoo3 support was contributed Harold Oga. Lots of additions
19 * (proper acceleration, 24 bpp, hardware cursor) and bug fixes by Attila
20 * Kesmarki. Thanks guys!
22 * Voodoo1 and Voodoo2 support aren't relevant to this driver as they
23 * behave very differently from the Voodoo3/4/5. For anyone wanting to
24 * use frame buffer on the Voodoo1/2, see the sstfb driver (which is
25 * located at http://www.sourceforge.net/projects/sstfb).
27 * While I _am_ grateful to 3Dfx for releasing the specs for Banshee,
28 * I do wish the next version is a bit more complete. Without the XF86
29 * patches I couldn't have gotten even this far... for instance, the
30 * extensions to the VGA register set go completely unmentioned in the
31 * spec! Also, lots of references are made to the 'SST core', but no
32 * spec is publicly available, AFAIK.
34 * The structure of this driver comes pretty much from the Permedia
35 * driver by Ilario Nardinocchi, which in turn is based on skeletonfb.
38 * - support for 16/32 bpp needs fixing (funky bootup penguin)
39 * - multihead support (basically need to support an array of fb_infos)
40 * - support other architectures (PPC, Alpha); does the fact that the VGA
41 * core can be accessed only thru I/O (not memory mapped) complicate
46 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
48 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
49 * reorg, hwcursor address page size alignment
50 * (for mmaping both frame buffer and regs),
51 * and my changes to get rid of hardcoded
52 * VGA i/o register locations (uses PCI
53 * configuration info now)
54 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
56 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
57 * 0.1.0 (released 1999-10-06) initial version
61 #include <linux/config.h>
62 #include <linux/module.h>
63 #include <linux/kernel.h>
64 #include <linux/errno.h>
65 #include <linux/string.h>
67 #include <linux/tty.h>
68 #include <linux/slab.h>
69 #include <linux/delay.h>
70 #include <linux/interrupt.h>
72 #include <linux/init.h>
73 #include <linux/pci.h>
74 #include <linux/nvram.h>
76 #include <linux/timer.h>
77 #include <linux/spinlock.h>
79 #include <video/tdfx.h>
83 #define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
85 #define DPRINTK(a,b...)
88 #define BANSHEE_MAX_PIXCLOCK 270000
89 #define VOODOO3_MAX_PIXCLOCK 300000
90 #define VOODOO5_MAX_PIXCLOCK 350000
92 static struct fb_fix_screeninfo tdfx_fix __devinitdata = {
94 .type = FB_TYPE_PACKED_PIXELS,
95 .visual = FB_VISUAL_PSEUDOCOLOR,
98 .accel = FB_ACCEL_3DFX_BANSHEE
101 static struct fb_var_screeninfo tdfx_var __devinitdata = {
102 /* "640x480, 8 bpp @ 60 Hz */
106 .yres_virtual = 1024,
111 .activate = FB_ACTIVATE_NOW,
114 .accel_flags = FB_ACCELF_TEXT,
122 .vmode = FB_VMODE_NONINTERLACED
126 * PCI driver prototypes
128 static int __devinit tdfxfb_probe(struct pci_dev *pdev,
129 const struct pci_device_id *id);
130 static void __devexit tdfxfb_remove(struct pci_dev *pdev);
132 static struct pci_device_id tdfxfb_id_table[] = {
133 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE,
134 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
136 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO3,
137 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
139 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO5,
140 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
145 static struct pci_driver tdfxfb_driver = {
147 .id_table = tdfxfb_id_table,
148 .probe = tdfxfb_probe,
149 .remove = __devexit_p(tdfxfb_remove),
152 MODULE_DEVICE_TABLE(pci, tdfxfb_id_table);
155 * Frame buffer device API
157 static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb);
158 static int tdfxfb_set_par(struct fb_info *info);
159 static int tdfxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
160 u_int transp, struct fb_info *info);
161 static int tdfxfb_blank(int blank, struct fb_info *info);
162 static int tdfxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info);
163 static int banshee_wait_idle(struct fb_info *info);
164 #ifdef CONFIG_FB_3DFX_ACCEL
165 static void tdfxfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
166 static void tdfxfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
167 static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image);
168 #endif /* CONFIG_FB_3DFX_ACCEL */
170 static struct fb_ops tdfxfb_ops = {
171 .owner = THIS_MODULE,
172 .fb_check_var = tdfxfb_check_var,
173 .fb_set_par = tdfxfb_set_par,
174 .fb_setcolreg = tdfxfb_setcolreg,
175 .fb_blank = tdfxfb_blank,
176 .fb_pan_display = tdfxfb_pan_display,
177 .fb_sync = banshee_wait_idle,
178 #ifdef CONFIG_FB_3DFX_ACCEL
179 .fb_fillrect = tdfxfb_fillrect,
180 .fb_copyarea = tdfxfb_copyarea,
181 .fb_imageblit = tdfxfb_imageblit,
183 .fb_fillrect = cfb_fillrect,
184 .fb_copyarea = cfb_copyarea,
185 .fb_imageblit = cfb_imageblit,
187 .fb_cursor = soft_cursor,
191 * do_xxx: Hardware-specific functions
193 static u32 do_calc_pll(int freq, int *freq_out);
194 static void do_write_regs(struct fb_info *info, struct banshee_reg *reg);
195 static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short);
200 static int nopan = 0;
201 static int nowrap = 1; // not implemented (yet)
202 static char *mode_option __devinitdata = NULL;
204 /* -------------------------------------------------------------------------
205 * Hardware-specific funcions
206 * ------------------------------------------------------------------------- */
209 static inline u8 vga_inb(struct tdfx_par *par, u32 reg) { return inb(reg); }
211 static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val) { outb(val, reg); }
213 static inline u8 vga_inb(struct tdfx_par *par, u32 reg) {
214 return inb(par->iobase + reg - 0x300);
216 static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val) {
217 outb(val, par->iobase + reg - 0x300);
221 static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val) {
222 vga_outb(par, GRA_I, idx); vga_outb(par, GRA_D, val);
225 static inline void seq_outb(struct tdfx_par *par, u32 idx, u8 val) {
226 vga_outb(par, SEQ_I, idx); vga_outb(par, SEQ_D, val);
229 static inline u8 seq_inb(struct tdfx_par *par, u32 idx) {
230 vga_outb(par, SEQ_I, idx); return vga_inb(par, SEQ_D);
233 static inline void crt_outb(struct tdfx_par *par, u32 idx, u8 val) {
234 vga_outb(par, CRT_I, idx); vga_outb(par, CRT_D, val);
237 static inline u8 crt_inb(struct tdfx_par *par, u32 idx) {
238 vga_outb(par, CRT_I, idx); return vga_inb(par, CRT_D);
241 static inline void att_outb(struct tdfx_par *par, u32 idx, u8 val)
245 tmp = vga_inb(par, IS1_R);
246 vga_outb(par, ATT_IW, idx);
247 vga_outb(par, ATT_IW, val);
250 static inline void vga_disable_video(struct tdfx_par *par)
254 s = seq_inb(par, 0x01) | 0x20;
255 seq_outb(par, 0x00, 0x01);
256 seq_outb(par, 0x01, s);
257 seq_outb(par, 0x00, 0x03);
260 static inline void vga_enable_video(struct tdfx_par *par)
264 s = seq_inb(par, 0x01) & 0xdf;
265 seq_outb(par, 0x00, 0x01);
266 seq_outb(par, 0x01, s);
267 seq_outb(par, 0x00, 0x03);
270 static inline void vga_enable_palette(struct tdfx_par *par)
273 vga_outb(par, ATT_IW, 0x20);
276 static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg)
278 return readl(par->regbase_virt + reg);
281 static inline void tdfx_outl(struct tdfx_par *par, unsigned int reg, u32 val)
283 writel(val, par->regbase_virt + reg);
286 static inline void banshee_make_room(struct tdfx_par *par, int size)
288 /* Note: The Voodoo3's onboard FIFO has 32 slots. This loop
289 * won't quit if you ask for more. */
290 while((tdfx_inl(par, STATUS) & 0x1f) < size-1);
293 static int banshee_wait_idle(struct fb_info *info)
295 struct tdfx_par *par = (struct tdfx_par *) info->par;
298 banshee_make_room(par, 1);
299 tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP);
302 i = (tdfx_inl(par, STATUS) & STATUS_BUSY) ? 0 : i + 1;
309 * Set the color of a palette entry in 8bpp mode
311 static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c)
313 banshee_make_room(par, 2);
314 tdfx_outl(par, DACADDR, regno);
315 tdfx_outl(par, DACDATA, c);
318 static u32 do_calc_pll(int freq, int* freq_out)
320 int m, n, k, best_m, best_n, best_k, best_error;
324 best_n = best_m = best_k = 0;
326 for (k = 3; k >= 0; k--) {
327 for (m = 63; m >= 0; m--) {
329 * Estimate value of n that produces target frequency
330 * with current m and k
332 int n_estimated = (freq * (m + 2) * (1 << k) / fref) - 2;
334 /* Search neighborhood of estimated n */
335 for (n = max(0, n_estimated - 1);
336 n <= min(255, n_estimated + 1); n++) {
338 * Calculate PLL freqency with current m, k and
341 int f = fref * (n + 2) / (m + 2) / (1 << k);
342 int error = abs (f - freq);
345 * If this is the closest we've come to the
346 * target frequency then remember n, m and k
348 if (error < best_error) {
361 *freq_out = fref*(n + 2)/(m + 2)/(1 << k);
363 return (n << 8) | (m << 2) | k;
366 static void do_write_regs(struct fb_info *info, struct banshee_reg* reg)
368 struct tdfx_par *par = (struct tdfx_par *) info->par;
371 banshee_wait_idle(info);
373 tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01);
375 crt_outb(par, 0x11, crt_inb(par, 0x11) & 0x7f); /* CRT unprotect */
377 banshee_make_room(par, 3);
378 tdfx_outl(par, VGAINIT1, reg->vgainit1 & 0x001FFFFF);
379 tdfx_outl(par, VIDPROCCFG, reg->vidcfg & ~0x00000001);
381 tdfx_outl(par, PLLCTRL1, reg->mempll);
382 tdfx_outl(par, PLLCTRL2, reg->gfxpll);
384 tdfx_outl(par, PLLCTRL0, reg->vidpll);
386 vga_outb(par, MISC_W, reg->misc[0x00] | 0x01);
388 for (i = 0; i < 5; i++)
389 seq_outb(par, i, reg->seq[i]);
391 for (i = 0; i < 25; i++)
392 crt_outb(par, i, reg->crt[i]);
394 for (i = 0; i < 9; i++)
395 gra_outb(par, i, reg->gra[i]);
397 for (i = 0; i < 21; i++)
398 att_outb(par, i, reg->att[i]);
400 crt_outb(par, 0x1a, reg->ext[0]);
401 crt_outb(par, 0x1b, reg->ext[1]);
403 vga_enable_palette(par);
404 vga_enable_video(par);
406 banshee_make_room(par, 11);
407 tdfx_outl(par, VGAINIT0, reg->vgainit0);
408 tdfx_outl(par, DACMODE, reg->dacmode);
409 tdfx_outl(par, VIDDESKSTRIDE, reg->stride);
410 tdfx_outl(par, HWCURPATADDR, 0);
412 tdfx_outl(par, VIDSCREENSIZE,reg->screensize);
413 tdfx_outl(par, VIDDESKSTART, reg->startaddr);
414 tdfx_outl(par, VIDPROCCFG, reg->vidcfg);
415 tdfx_outl(par, VGAINIT1, reg->vgainit1);
416 tdfx_outl(par, MISCINIT0, reg->miscinit0);
418 banshee_make_room(par, 8);
419 tdfx_outl(par, SRCBASE, reg->srcbase);
420 tdfx_outl(par, DSTBASE, reg->dstbase);
421 tdfx_outl(par, COMMANDEXTRA_2D, 0);
422 tdfx_outl(par, CLIP0MIN, 0);
423 tdfx_outl(par, CLIP0MAX, 0x0fff0fff);
424 tdfx_outl(par, CLIP1MIN, 0);
425 tdfx_outl(par, CLIP1MAX, 0x0fff0fff);
426 tdfx_outl(par, SRCXY, 0);
428 banshee_wait_idle(info);
431 static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
439 draminit0 = tdfx_inl(par, DRAMINIT0);
440 draminit1 = tdfx_inl(par, DRAMINIT1);
442 if ((dev_id == PCI_DEVICE_ID_3DFX_BANSHEE) ||
443 (dev_id == PCI_DEVICE_ID_3DFX_VOODOO3)) {
444 sgram_p = (draminit1 & DRAMINIT1_MEM_SDRAM) ? 0 : 1;
447 (((draminit0 & DRAMINIT0_SGRAM_NUM) ? 2 : 1) *
448 ((draminit0 & DRAMINIT0_SGRAM_TYPE) ? 8 : 4) * 1024 * 1024) :
452 u32 chips, psize, banks;
454 chips = ((draminit0 & (1 << 26)) == 0) ? 4 : 8;
455 psize = 1 << ((draminit0 & 0x38000000) >> 28);
456 banks = ((draminit0 & (1 << 30)) == 0) ? 2 : 4;
457 lfbsize = chips * psize * banks;
460 /* disable block writes for SDRAM (why?) */
461 miscinit1 = tdfx_inl(par, MISCINIT1);
462 miscinit1 |= sgram_p ? 0 : MISCINIT1_2DBLOCK_DIS;
463 miscinit1 |= MISCINIT1_CLUT_INV;
465 banshee_make_room(par, 1);
466 tdfx_outl(par, MISCINIT1, miscinit1);
470 /* ------------------------------------------------------------------------- */
472 static int tdfxfb_check_var(struct fb_var_screeninfo *var,struct fb_info *info)
474 struct tdfx_par *par = (struct tdfx_par *) info->par;
477 if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 &&
478 var->bits_per_pixel != 24 && var->bits_per_pixel != 32) {
479 DPRINTK("depth not supported: %u\n", var->bits_per_pixel);
483 if (var->xres != var->xres_virtual)
484 var->xres_virtual = var->xres;
486 if (var->yres > var->yres_virtual)
487 var->yres_virtual = var->yres;
490 DPRINTK("xoffset not supported\n");
494 /* Banshee doesn't support interlace, but Voodoo4/5 and probably Voodoo3 do. */
495 /* no direct information about device id now? use max_pixclock for this... */
496 if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) &&
497 (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) {
498 DPRINTK("interlace not supported\n");
502 var->xres = (var->xres + 15) & ~15; /* could sometimes be 8 */
503 lpitch = var->xres * ((var->bits_per_pixel + 7)>>3);
505 if (var->xres < 320 || var->xres > 2048) {
506 DPRINTK("width not supported: %u\n", var->xres);
510 if (var->yres < 200 || var->yres > 2048) {
511 DPRINTK("height not supported: %u\n", var->yres);
515 if (lpitch * var->yres_virtual > info->fix.smem_len) {
516 var->yres_virtual = info->fix.smem_len/lpitch;
517 if (var->yres_virtual < var->yres) {
518 DPRINTK("no memory for screen (%ux%ux%u)\n",
519 var->xres, var->yres_virtual, var->bits_per_pixel);
524 if (PICOS2KHZ(var->pixclock) > par->max_pixclock) {
525 DPRINTK("pixclock too high (%ldKHz)\n",PICOS2KHZ(var->pixclock));
529 switch(var->bits_per_pixel) {
531 var->red.length = var->green.length = var->blue.length = 8;
534 var->red.offset = 11;
536 var->green.offset = 5;
537 var->green.length = 6;
538 var->blue.offset = 0;
539 var->blue.length = 5;
545 var->red.length = var->green.length = var->blue.length = 8;
547 var->red.offset = 16;
548 var->green.offset = 8;
549 var->blue.offset = 0;
550 var->red.length = var->green.length = var->blue.length = 8;
553 var->height = var->width = -1;
555 var->accel_flags = FB_ACCELF_TEXT;
557 DPRINTK("Checking graphics mode at %dx%d depth %d\n", var->xres, var->yres, var->bits_per_pixel);
561 static int tdfxfb_set_par(struct fb_info *info)
563 struct tdfx_par *par = (struct tdfx_par *) info->par;
564 u32 hdispend, hsyncsta, hsyncend, htotal;
565 u32 hd, hs, he, ht, hbs, hbe;
566 u32 vd, vs, ve, vt, vbs, vbe;
567 struct banshee_reg reg;
573 memset(®, 0, sizeof(reg));
574 cpp = (info->var.bits_per_pixel + 7)/8;
576 reg.vidcfg = VIDCFG_VIDPROC_ENABLE | VIDCFG_DESK_ENABLE | VIDCFG_CURS_X11 | ((cpp - 1) << VIDCFG_PIXFMT_SHIFT) | (cpp != 1 ? VIDCFG_CLUT_BYPASS : 0);
579 freq = PICOS2KHZ(info->var.pixclock);
582 reg.vidcfg &= ~VIDCFG_2X;
584 hdispend = info->var.xres;
585 hsyncsta = hdispend + info->var.right_margin;
586 hsyncend = hsyncsta + info->var.hsync_len;
587 htotal = hsyncend + info->var.left_margin;
589 if (freq > par->max_pixclock/2) {
590 freq = freq > par->max_pixclock ? par->max_pixclock : freq;
591 reg.dacmode |= DACMODE_2X;
592 reg.vidcfg |= VIDCFG_2X;
599 hd = wd = (hdispend >> 3) - 1;
600 hs = (hsyncsta >> 3) - 1;
601 he = (hsyncend >> 3) - 1;
602 ht = (htotal >> 3) - 1;
606 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
607 vbs = vd = (info->var.yres << 1) - 1;
608 vs = vd + (info->var.lower_margin << 1);
609 ve = vs + (info->var.vsync_len << 1);
610 vbe = vt = ve + (info->var.upper_margin << 1) - 1;
612 vbs = vd = info->var.yres - 1;
613 vs = vd + info->var.lower_margin;
614 ve = vs + info->var.vsync_len;
615 vbe = vt = ve + info->var.upper_margin - 1;
618 /* this is all pretty standard VGA register stuffing */
619 reg.misc[0x00] = 0x0f |
620 (info->var.xres < 400 ? 0xa0 :
621 info->var.xres < 480 ? 0x60 :
622 info->var.xres < 768 ? 0xe0 : 0x20);
624 reg.gra[0x00] = 0x00;
625 reg.gra[0x01] = 0x00;
626 reg.gra[0x02] = 0x00;
627 reg.gra[0x03] = 0x00;
628 reg.gra[0x04] = 0x00;
629 reg.gra[0x05] = 0x40;
630 reg.gra[0x06] = 0x05;
631 reg.gra[0x07] = 0x0f;
632 reg.gra[0x08] = 0xff;
634 reg.att[0x00] = 0x00;
635 reg.att[0x01] = 0x01;
636 reg.att[0x02] = 0x02;
637 reg.att[0x03] = 0x03;
638 reg.att[0x04] = 0x04;
639 reg.att[0x05] = 0x05;
640 reg.att[0x06] = 0x06;
641 reg.att[0x07] = 0x07;
642 reg.att[0x08] = 0x08;
643 reg.att[0x09] = 0x09;
644 reg.att[0x0a] = 0x0a;
645 reg.att[0x0b] = 0x0b;
646 reg.att[0x0c] = 0x0c;
647 reg.att[0x0d] = 0x0d;
648 reg.att[0x0e] = 0x0e;
649 reg.att[0x0f] = 0x0f;
650 reg.att[0x10] = 0x41;
651 reg.att[0x11] = 0x00;
652 reg.att[0x12] = 0x0f;
653 reg.att[0x13] = 0x00;
654 reg.att[0x14] = 0x00;
656 reg.seq[0x00] = 0x03;
657 reg.seq[0x01] = 0x01; /* fixme: clkdiv2? */
658 reg.seq[0x02] = 0x0f;
659 reg.seq[0x03] = 0x00;
660 reg.seq[0x04] = 0x0e;
662 reg.crt[0x00] = ht - 4;
665 reg.crt[0x03] = 0x80 | (hbe & 0x1f);
667 reg.crt[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f);
669 reg.crt[0x07] = ((vs & 0x200) >> 2) |
670 ((vd & 0x200) >> 3) |
671 ((vt & 0x200) >> 4) | 0x10 |
672 ((vbs & 0x100) >> 5) |
673 ((vs & 0x100) >> 6) |
674 ((vd & 0x100) >> 7) |
676 reg.crt[0x08] = 0x00;
677 reg.crt[0x09] = 0x40 | ((vbs & 0x200) >> 4);
678 reg.crt[0x0a] = 0x00;
679 reg.crt[0x0b] = 0x00;
680 reg.crt[0x0c] = 0x00;
681 reg.crt[0x0d] = 0x00;
682 reg.crt[0x0e] = 0x00;
683 reg.crt[0x0f] = 0x00;
685 reg.crt[0x11] = (ve & 0x0f) | 0x20;
688 reg.crt[0x14] = 0x00;
690 reg.crt[0x16] = vbe + 1;
691 reg.crt[0x17] = 0xc3;
692 reg.crt[0x18] = 0xff;
694 /* Banshee's nonvga stuff */
695 reg.ext[0x00] = (((ht & 0x100) >> 8) |
696 ((hd & 0x100) >> 6) |
697 ((hbs & 0x100) >> 4) |
698 ((hbe & 0x40) >> 1) |
699 ((hs & 0x100) >> 2) |
701 reg.ext[0x01] = (((vt & 0x400) >> 10) |
702 ((vd & 0x400) >> 8) |
703 ((vbs & 0x400) >> 6) |
704 ((vbe & 0x400) >> 4));
706 reg.vgainit0 = VGAINIT0_8BIT_DAC |
707 VGAINIT0_EXT_ENABLE |
708 VGAINIT0_WAKEUP_3C3 |
709 VGAINIT0_ALT_READBACK |
710 VGAINIT0_EXTSHIFTOUT;
711 reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff;
716 reg.cursc1 = 0xffffff;
718 reg.stride = info->var.xres * cpp;
719 reg.startaddr = par->baseline * reg.stride;
720 reg.srcbase = reg.startaddr;
721 reg.dstbase = reg.startaddr;
724 freq = PICOS2KHZ(info->var.pixclock);
726 reg.dacmode &= ~DACMODE_2X;
727 reg.vidcfg &= ~VIDCFG_2X;
728 if (freq > par->max_pixclock/2) {
729 freq = freq > par->max_pixclock ? par->max_pixclock : freq;
730 reg.dacmode |= DACMODE_2X;
731 reg.vidcfg |= VIDCFG_2X;
733 reg.vidpll = do_calc_pll(freq, &fout);
735 reg.mempll = do_calc_pll(..., &fout);
736 reg.gfxpll = do_calc_pll(..., &fout);
739 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
740 reg.screensize = info->var.xres | (info->var.yres << 13);
741 reg.vidcfg |= VIDCFG_HALF_MODE;
742 reg.crt[0x09] |= 0x80;
744 reg.screensize = info->var.xres | (info->var.yres << 12);
745 reg.vidcfg &= ~VIDCFG_HALF_MODE;
747 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
748 reg.vidcfg |= VIDCFG_INTERLACE;
749 reg.miscinit0 = tdfx_inl(par, MISCINIT0);
751 #if defined(__BIG_ENDIAN)
752 switch (info->var.bits_per_pixel) {
755 reg.miscinit0 &= ~(1 << 30);
756 reg.miscinit0 &= ~(1 << 31);
759 reg.miscinit0 |= (1 << 30);
760 reg.miscinit0 |= (1 << 31);
763 reg.miscinit0 |= (1 << 30);
764 reg.miscinit0 &= ~(1 << 31);
768 do_write_regs(info, ®);
770 /* Now change fb_fix_screeninfo according to changes in par */
771 info->fix.line_length = info->var.xres * ((info->var.bits_per_pixel + 7)>>3);
772 info->fix.visual = (info->var.bits_per_pixel == 8)
773 ? FB_VISUAL_PSEUDOCOLOR
774 : FB_VISUAL_TRUECOLOR;
775 DPRINTK("Graphics mode is now set at %dx%d depth %d\n", info->var.xres, info->var.yres, info->var.bits_per_pixel);
779 /* A handy macro shamelessly pinched from matroxfb */
780 #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
782 static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
783 unsigned blue,unsigned transp,struct fb_info *info)
785 struct tdfx_par *par = (struct tdfx_par *) info->par;
788 if (regno >= info->cmap.len || regno > 255) return 1;
790 switch (info->fix.visual) {
791 case FB_VISUAL_PSEUDOCOLOR:
792 rgbcol =(((u32)red & 0xff00) << 8) |
793 (((u32)green & 0xff00) << 0) |
794 (((u32)blue & 0xff00) >> 8);
795 do_setpalentry(par, regno, rgbcol);
797 /* Truecolor has no hardware color palettes. */
798 case FB_VISUAL_TRUECOLOR:
799 rgbcol = (CNVT_TOHW( red, info->var.red.length) << info->var.red.offset) |
800 (CNVT_TOHW( green, info->var.green.length) << info->var.green.offset) |
801 (CNVT_TOHW( blue, info->var.blue.length) << info->var.blue.offset) |
802 (CNVT_TOHW( transp, info->var.transp.length) << info->var.transp.offset);
803 ((u32*)(info->pseudo_palette))[regno] = rgbcol;
806 DPRINTK("bad depth %u\n", info->var.bits_per_pixel);
812 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
813 static int tdfxfb_blank(int blank, struct fb_info *info)
815 struct tdfx_par *par = (struct tdfx_par *) info->par;
816 u32 dacmode, state = 0, vgablank = 0;
818 dacmode = tdfx_inl(par, DACMODE);
821 case FB_BLANK_UNBLANK: /* Screen: On; HSync: On, VSync: On */
825 case FB_BLANK_NORMAL: /* Screen: Off; HSync: On, VSync: On */
829 case FB_BLANK_VSYNC_SUSPEND: /* Screen: Off; HSync: On, VSync: Off */
833 case FB_BLANK_HSYNC_SUSPEND: /* Screen: Off; HSync: Off, VSync: On */
837 case FB_BLANK_POWERDOWN: /* Screen: Off; HSync: Off, VSync: Off */
838 state = BIT(1) | BIT(3);
843 dacmode &= ~(BIT(1) | BIT(3));
845 banshee_make_room(par, 1);
846 tdfx_outl(par, DACMODE, dacmode);
848 vga_disable_video(par);
850 vga_enable_video(par);
855 * Set the starting position of the visible screen to var->yoffset
857 static int tdfxfb_pan_display(struct fb_var_screeninfo *var,
858 struct fb_info *info)
860 struct tdfx_par *par = (struct tdfx_par *) info->par;
863 if (nopan || var->xoffset || (var->yoffset > var->yres_virtual))
865 if ((var->yoffset + var->yres > var->yres_virtual && nowrap))
868 addr = var->yoffset * info->fix.line_length;
869 banshee_make_room(par, 1);
870 tdfx_outl(par, VIDDESKSTART, addr);
872 info->var.xoffset = var->xoffset;
873 info->var.yoffset = var->yoffset;
877 #ifdef CONFIG_FB_3DFX_ACCEL
879 * FillRect 2D command (solidfill or invert (via ROP_XOR))
881 static void tdfxfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
883 struct tdfx_par *par = (struct tdfx_par *) info->par;
884 u32 bpp = info->var.bits_per_pixel;
885 u32 stride = info->fix.line_length;
886 u32 fmt= stride | ((bpp+((bpp==8) ? 0 : 8)) << 13);
889 if (rect->rop == ROP_COPY)
890 tdfx_rop = TDFX_ROP_COPY;
892 tdfx_rop = TDFX_ROP_XOR;
894 banshee_make_room(par, 5);
895 tdfx_outl(par, DSTFORMAT, fmt);
896 if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
897 tdfx_outl(par, COLORFORE, rect->color);
898 } else { /* FB_VISUAL_TRUECOLOR */
899 tdfx_outl(par, COLORFORE, ((u32*)(info->pseudo_palette))[rect->color]);
901 tdfx_outl(par, COMMAND_2D, COMMAND_2D_FILLRECT | (tdfx_rop << 24));
902 tdfx_outl(par, DSTSIZE, rect->width | (rect->height << 16));
903 tdfx_outl(par, LAUNCH_2D, rect->dx | (rect->dy << 16));
907 * Screen-to-Screen BitBlt 2D command (for the bmove fb op.)
909 static void tdfxfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
911 struct tdfx_par *par = (struct tdfx_par *) info->par;
912 u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
913 u32 bpp = info->var.bits_per_pixel;
914 u32 stride = info->fix.line_length;
915 u32 blitcmd = COMMAND_2D_S2S_BITBLT | (TDFX_ROP_COPY << 24);
916 u32 fmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13);
918 if (area->sx <= area->dx) {
921 sx += area->width - 1;
922 dx += area->width - 1;
924 if (area->sy <= area->dy) {
927 sy += area->height - 1;
928 dy += area->height - 1;
931 banshee_make_room(par, 6);
933 tdfx_outl(par, SRCFORMAT, fmt);
934 tdfx_outl(par, DSTFORMAT, fmt);
935 tdfx_outl(par, COMMAND_2D, blitcmd);
936 tdfx_outl(par, DSTSIZE, area->width | (area->height << 16));
937 tdfx_outl(par, DSTXY, dx | (dy << 16));
938 tdfx_outl(par, LAUNCH_2D, sx | (sy << 16));
941 static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
943 struct tdfx_par *par = (struct tdfx_par *) info->par;
944 int size = image->height * ((image->width * image->depth + 7)>>3);
946 int i, stride = info->fix.line_length;
947 u32 bpp = info->var.bits_per_pixel;
948 u32 dstfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13);
949 u8 *chardata = (u8 *) image->data;
952 if (image->depth != 1) {
953 //banshee_make_room(par, 6 + ((size + 3) >> 2));
954 //srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000;
955 cfb_imageblit(info, image);
958 banshee_make_room(par, 8);
959 switch (info->fix.visual) {
960 case FB_VISUAL_PSEUDOCOLOR:
961 tdfx_outl(par, COLORFORE, image->fg_color);
962 tdfx_outl(par, COLORBACK, image->bg_color);
964 case FB_VISUAL_TRUECOLOR:
966 tdfx_outl(par, COLORFORE, ((u32*)(info->pseudo_palette))[image->fg_color]);
967 tdfx_outl(par, COLORBACK, ((u32*)(info->pseudo_palette))[image->bg_color]);
970 srcfmt = 0x400000 | BIT(20);
976 tdfx_outl(par, SRCXY, 0);
977 tdfx_outl(par, DSTXY, image->dx | (image->dy << 16));
978 tdfx_outl(par, COMMAND_2D, COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24));
979 tdfx_outl(par, SRCFORMAT, srcfmt);
980 tdfx_outl(par, DSTFORMAT, dstfmt);
981 tdfx_outl(par, DSTSIZE, image->width | (image->height << 16));
983 /* A count of how many free FIFO entries we've requested.
984 * When this goes negative, we need to request more. */
987 /* Send four bytes at a time of data */
988 for (i = (size >> 2) ; i > 0; i--) {
989 if(--fifo_free < 0) {
991 banshee_make_room(par,fifo_free);
993 tdfx_outl(par, LAUNCH_2D,*(u32*)chardata);
997 /* Send the leftovers now */
998 banshee_make_room(par,3);
1002 case 1: tdfx_outl(par, LAUNCH_2D,*chardata); break;
1003 case 2: tdfx_outl(par, LAUNCH_2D,*(u16*)chardata); break;
1004 case 3: tdfx_outl(par, LAUNCH_2D,*(u16*)chardata | ((chardata[3]) << 24)); break;
1007 #endif /* CONFIG_FB_3DFX_ACCEL */
1009 #ifdef TDFX_HARDWARE_CURSOR
1010 static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1012 struct tdfx_par *par = (struct tdfx_par *) info->par;
1013 unsigned long flags;
1016 * If the cursor is not be changed this means either we want the
1017 * current cursor state (if enable is set) or we want to query what
1018 * we can do with the cursor (if enable is not set)
1020 if (!cursor->set) return 0;
1022 /* Too large of a cursor :-( */
1023 if (cursor->image.width > 64 || cursor->image.height > 64)
1027 * If we are going to be changing things we should disable
1030 if (info->cursor.enable) {
1031 spin_lock_irqsave(&par->DAClock, flags);
1032 info->cursor.enable = 0;
1033 del_timer(&(par->hwcursor.timer));
1034 tdfx_outl(par, VIDPROCCFG, par->hwcursor.disable);
1035 spin_unlock_irqrestore(&par->DAClock, flags);
1038 /* Disable the Cursor */
1039 if ((cursor->set && FB_CUR_SETCUR) && !cursor->enable)
1042 /* fix cursor color - XFree86 forgets to restore it properly */
1043 if (cursor->set && FB_CUR_SETCMAP) {
1044 struct fb_cmap cmap = cursor->image.cmap;
1045 unsigned long bg_color, fg_color;
1047 cmap.len = 2; /* Voodoo 3+ only support 2 color cursors */
1048 fg_color = ((cmap.red[cmap.start] << 16) |
1049 (cmap.green[cmap.start] << 8) |
1050 (cmap.blue[cmap.start]));
1051 bg_color = ((cmap.red[cmap.start+1] << 16) |
1052 (cmap.green[cmap.start+1] << 8) |
1053 (cmap.blue[cmap.start+1]));
1054 fb_copy_cmap(&cmap, &info->cursor.image.cmap);
1055 spin_lock_irqsave(&par->DAClock, flags);
1056 banshee_make_room(par, 2);
1057 tdfx_outl(par, HWCURC0, bg_color);
1058 tdfx_outl(par, HWCURC1, fg_color);
1059 spin_unlock_irqrestore(&par->DAClock, flags);
1062 if (cursor->set && FB_CUR_SETPOS) {
1065 x = cursor->image.dx;
1066 y = cursor->image.dy;
1067 y -= info->var.yoffset;
1068 info->cursor.image.dx = x;
1069 info->cursor.image.dy = y;
1072 spin_lock_irqsave(&par->DAClock, flags);
1073 banshee_make_room(par, 1);
1074 tdfx_outl(par, HWCURLOC, (y << 16) + x);
1075 spin_unlock_irqrestore(&par->DAClock, flags);
1078 /* Not supported so we fake it */
1079 if (cursor->set && FB_CUR_SETHOT) {
1080 info->cursor.hot.x = cursor->hot.x;
1081 info->cursor.hot.y = cursor->hot.y;
1084 if (cursor->set && FB_CUR_SETSHAPE) {
1086 * Voodoo 3 and above cards use 2 monochrome cursor patterns.
1087 * The reason is so the card can fetch 8 words at a time
1088 * and are stored on chip for use for the next 8 scanlines.
1089 * This reduces the number of times for access to draw the
1090 * cursor for each screen refresh.
1091 * Each pattern is a bitmap of 64 bit wide and 64 bit high
1092 * (total of 8192 bits or 1024 Kbytes). The two patterns are
1093 * stored in such a way that pattern 0 always resides in the
1094 * lower half (least significant 64 bits) of a 128 bit word
1095 * and pattern 1 the upper half. If you examine the data of
1096 * the cursor image the graphics card uses then from the
1097 * begining you see line one of pattern 0, line one of
1098 * pattern 1, line two of pattern 0, line two of pattern 1,
1099 * etc etc. The linear stride for the cursor is always 16 bytes
1100 * (128 bits) which is the maximum cursor width times two for
1101 * the two monochrome patterns.
1103 u8 *cursorbase = (u8 *) info->cursor.image.data;
1104 char *bitmap = (char *)cursor->image.data;
1105 char *mask = (char *) cursor->mask;
1108 for (i = 0; i < 64; i++) {
1109 if (i < cursor->image.height) {
1110 j = (cursor->image.width + 7) >> 3;
1114 /* Pattern 0. Copy the cursor bitmap to it */
1115 fb_writeb(*bitmap, cursorbase + h);
1117 /* Pattern 1. Copy the cursor mask to it */
1118 fb_writeb(*mask, cursorbase + h + 8);
1123 fb_writeb(0, cursorbase + h);
1124 fb_writeb(~0, cursorbase + h + 8);
1128 fb_writel(0, cursorbase + h);
1129 fb_writel(0, cursorbase + h + 4);
1130 fb_writel(~0, cursorbase + h + 8);
1131 fb_writel(~0, cursorbase + h + 12);
1136 /* Turn the cursor on */
1138 info->cursor = *cursor;
1139 mod_timer(&par->hwcursor.timer, jiffies+HZ/2);
1140 spin_lock_irqsave(&par->DAClock, flags);
1141 banshee_make_room(par, 1);
1142 tdfx_outl(par, VIDPROCCFG, par->hwcursor.enable);
1143 spin_unlock_irqrestore(&par->DAClock, flags);
1149 * tdfxfb_probe - Device Initializiation
1151 * @pdev: PCI Device to initialize
1152 * @id: PCI Device ID
1154 * Initializes and allocates resources for PCI device @pdev.
1157 static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1158 const struct pci_device_id *id)
1160 struct tdfx_par *default_par;
1161 struct fb_info *info;
1162 int size, err, lpitch;
1164 if ((err = pci_enable_device(pdev))) {
1165 printk(KERN_WARNING "tdfxfb: Can't enable pdev: %d\n", err);
1169 size = sizeof(struct tdfx_par)+256*sizeof(u32);
1171 info = framebuffer_alloc(size, &pdev->dev);
1173 if (!info) return -ENOMEM;
1175 default_par = info->par;
1177 /* Configure the default fb_fix_screeninfo first */
1178 switch (pdev->device) {
1179 case PCI_DEVICE_ID_3DFX_BANSHEE:
1180 strcat(tdfx_fix.id, " Banshee");
1181 default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK;
1183 case PCI_DEVICE_ID_3DFX_VOODOO3:
1184 strcat(tdfx_fix.id, " Voodoo3");
1185 default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK;
1187 case PCI_DEVICE_ID_3DFX_VOODOO5:
1188 strcat(tdfx_fix.id, " Voodoo5");
1189 default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK;
1193 tdfx_fix.mmio_start = pci_resource_start(pdev, 0);
1194 tdfx_fix.mmio_len = pci_resource_len(pdev, 0);
1195 default_par->regbase_virt = ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
1196 if (!default_par->regbase_virt) {
1197 printk("fb: Can't remap %s register area.\n", tdfx_fix.id);
1201 if (!request_mem_region(pci_resource_start(pdev, 0),
1202 pci_resource_len(pdev, 0), "tdfx regbase")) {
1203 printk(KERN_WARNING "tdfxfb: Can't reserve regbase\n");
1207 tdfx_fix.smem_start = pci_resource_start(pdev, 1);
1208 if (!(tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device))) {
1209 printk("fb: Can't count %s memory.\n", tdfx_fix.id);
1210 release_mem_region(pci_resource_start(pdev, 0),
1211 pci_resource_len(pdev, 0));
1215 if (!request_mem_region(pci_resource_start(pdev, 1),
1216 pci_resource_len(pdev, 1), "tdfx smem")) {
1217 printk(KERN_WARNING "tdfxfb: Can't reserve smem\n");
1218 release_mem_region(pci_resource_start(pdev, 0),
1219 pci_resource_len(pdev, 0));
1223 info->screen_base = ioremap_nocache(tdfx_fix.smem_start,
1225 if (!info->screen_base) {
1226 printk("fb: Can't remap %s framebuffer.\n", tdfx_fix.id);
1227 release_mem_region(pci_resource_start(pdev, 1),
1228 pci_resource_len(pdev, 1));
1229 release_mem_region(pci_resource_start(pdev, 0),
1230 pci_resource_len(pdev, 0));
1234 default_par->iobase = pci_resource_start(pdev, 2);
1236 if (!request_region(pci_resource_start(pdev, 2),
1237 pci_resource_len(pdev, 2), "tdfx iobase")) {
1238 printk(KERN_WARNING "tdfxfb: Can't reserve iobase\n");
1239 release_mem_region(pci_resource_start(pdev, 1),
1240 pci_resource_len(pdev, 1));
1241 release_mem_region(pci_resource_start(pdev, 0),
1242 pci_resource_len(pdev, 0));
1246 printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10);
1248 tdfx_fix.ypanstep = nopan ? 0 : 1;
1249 tdfx_fix.ywrapstep = nowrap ? 0 : 1;
1251 info->fbops = &tdfxfb_ops;
1252 info->fix = tdfx_fix;
1253 info->pseudo_palette = (void *)(default_par + 1);
1254 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1255 #ifdef CONFIG_FB_3DFX_ACCEL
1256 info->flags |= FBINFO_HWACCEL_FILLRECT |
1257 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_IMAGEBLIT;
1261 mode_option = "640x480@60";
1263 err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8);
1264 if (!err || err == 4)
1265 info->var = tdfx_var;
1267 /* maximize virtual vertical length */
1268 lpitch = info->var.xres_virtual * ((info->var.bits_per_pixel + 7) >> 3);
1269 info->var.yres_virtual = info->fix.smem_len/lpitch;
1270 if (info->var.yres_virtual < info->var.yres)
1273 #ifdef CONFIG_FB_3DFX_ACCEL
1275 * FIXME: Limit var->yres_virtual to 4096 because of screen artifacts
1276 * during scrolling. This is only present if 2D acceleration is
1279 if (info->var.yres_virtual > 4096)
1280 info->var.yres_virtual = 4096;
1281 #endif /* CONFIG_FB_3DFX_ACCEL */
1283 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
1284 printk(KERN_WARNING "tdfxfb: Can't allocate color map\n");
1288 if (register_framebuffer(info) < 0) {
1289 printk("tdfxfb: can't register framebuffer\n");
1290 fb_dealloc_cmap(&info->cmap);
1296 pci_set_drvdata(pdev, info);
1301 * Cleanup after anything that was remapped/allocated.
1303 if (default_par->regbase_virt)
1304 iounmap(default_par->regbase_virt);
1305 if (info->screen_base)
1306 iounmap(info->screen_base);
1307 framebuffer_release(info);
1312 void tdfxfb_setup(char *options)
1316 if (!options || !*options)
1319 while ((this_opt = strsep(&options, ",")) != NULL) {
1322 if(!strcmp(this_opt, "nopan")) {
1324 } else if(!strcmp(this_opt, "nowrap")) {
1327 mode_option = this_opt;
1334 * tdfxfb_remove - Device removal
1336 * @pdev: PCI Device to cleanup
1338 * Releases all resources allocated during the course of the driver's
1339 * lifetime for the PCI device @pdev.
1342 static void __devexit tdfxfb_remove(struct pci_dev *pdev)
1344 struct fb_info *info = pci_get_drvdata(pdev);
1345 struct tdfx_par *par = (struct tdfx_par *) info->par;
1347 unregister_framebuffer(info);
1348 iounmap(par->regbase_virt);
1349 iounmap(info->screen_base);
1351 /* Clean up after reserved regions */
1352 release_region(pci_resource_start(pdev, 2),
1353 pci_resource_len(pdev, 2));
1354 release_mem_region(pci_resource_start(pdev, 1),
1355 pci_resource_len(pdev, 1));
1356 release_mem_region(pci_resource_start(pdev, 0),
1357 pci_resource_len(pdev, 0));
1358 pci_set_drvdata(pdev, NULL);
1359 framebuffer_release(info);
1362 static int __init tdfxfb_init(void)
1365 char *option = NULL;
1367 if (fb_get_options("tdfxfb", &option))
1370 tdfxfb_setup(option);
1372 return pci_register_driver(&tdfxfb_driver);
1375 static void __exit tdfxfb_exit(void)
1377 pci_unregister_driver(&tdfxfb_driver);
1380 MODULE_AUTHOR("Hannu Mallat <hmallat@cc.hut.fi>");
1381 MODULE_DESCRIPTION("3Dfx framebuffer device driver");
1382 MODULE_LICENSE("GPL");
1384 module_init(tdfxfb_init);
1385 module_exit(tdfxfb_exit);