drivers/watchdog/hpwdt.c

   1 /*
   2  *      HP WatchDog Driver
   3  *      based on
   4  *
   5  *      SoftDog 0.05:   A Software Watchdog Device
   6  *
   7  *      (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
   8  *      Thomas Mingarelli <thomas.mingarelli@hp.com>
   9  *
  10  *      This program is free software; you can redistribute it and/or
  11  *      modify it under the terms of the GNU General Public License
  12  *      version 2 as published by the Free Software Foundation
  13  *
  14  */
  15
  16 #include <linux/device.h>
  17 #include <linux/fs.h>
  18 #include <linux/init.h>
  19 #include <linux/io.h>
  20 #include <linux/bitops.h>
  21 #include <linux/kernel.h>
  22 #include <linux/miscdevice.h>
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci_ids.h>
  27 #include <linux/types.h>
  28 #include <linux/uaccess.h>
  29 #include <linux/watchdog.h>
  30 #ifdef CONFIG_HPWDT_NMI_DECODING
  31 #include <linux/dmi.h>
  32 #include <linux/spinlock.h>
  33 #include <linux/nmi.h>
  34 #include <linux/kdebug.h>
  35 #include <linux/notifier.h>
  36 #include <asm/cacheflush.h>
  37 #endif /* CONFIG_HPWDT_NMI_DECODING */
  38
  39 #define HPWDT_VERSION                   "1.2.0"
  40 #define SECS_TO_TICKS(secs)             ((secs) * 1000 / 128)
  41 #define TICKS_TO_SECS(ticks)            ((ticks) * 128 / 1000)
  42 #define HPWDT_MAX_TIMER                 TICKS_TO_SECS(65535)
  43 #define DEFAULT_MARGIN                  30
  44
  45 static unsigned int soft_margin = DEFAULT_MARGIN;       /* in seconds */
  46 static unsigned int reload;                     /* the computed soft_margin */
  47 static int nowayout = WATCHDOG_NOWAYOUT;
  48 static char expect_release;
  49 static unsigned long hpwdt_is_open;
  50
  51 static void __iomem *pci_mem_addr;              /* the PCI-memory address */
  52 static unsigned long __iomem *hpwdt_timer_reg;
  53 static unsigned long __iomem *hpwdt_timer_con;
  54
  55 static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices) = {
  56         { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },   /* iLO2 */
  57         { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },       /* iLO3 */
  58         {0},                    /* terminate list */
  59 };
  60 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  61
  62 #ifdef CONFIG_HPWDT_NMI_DECODING
  63 #define PCI_BIOS32_SD_VALUE             0x5F32335F      /* "_32_" */
  64 #define CRU_BIOS_SIGNATURE_VALUE        0x55524324
  65 #define PCI_BIOS32_PARAGRAPH_LEN        16
  66 #define PCI_ROM_BASE1                   0x000F0000
  67 #define ROM_SIZE                        0x10000
  68
  69 struct bios32_service_dir {
  70         u32 signature;
  71         u32 entry_point;
  72         u8 revision;
  73         u8 length;
  74         u8 checksum;
  75         u8 reserved[5];
  76 };
  77
  78 /* type 212 */
  79 struct smbios_cru64_info {
  80         u8 type;
  81         u8 byte_length;
  82         u16 handle;
  83         u32 signature;
  84         u64 physical_address;
  85         u32 double_length;
  86         u32 double_offset;
  87 };
  88 #define SMBIOS_CRU64_INFORMATION        212
  89
  90 struct cmn_registers {
  91         union {
  92                 struct {
  93                         u8 ral;
  94                         u8 rah;
  95                         u16 rea2;
  96                 };
  97                 u32 reax;
  98         } u1;
  99         union {
 100                 struct {
 101                         u8 rbl;
 102                         u8 rbh;
 103                         u8 reb2l;
 104                         u8 reb2h;
 105                 };
 106                 u32 rebx;
 107         } u2;
 108         union {
 109                 struct {
 110                         u8 rcl;
 111                         u8 rch;
 112                         u16 rec2;
 113                 };
 114                 u32 recx;
 115         } u3;
 116         union {
 117                 struct {
 118                         u8 rdl;
 119                         u8 rdh;
 120                         u16 red2;
 121                 };
 122                 u32 redx;
 123         } u4;
 124
 125         u32 resi;
 126         u32 redi;
 127         u16 rds;
 128         u16 res;
 129         u32 reflags;
 130 }  __attribute__((packed));
 131
 132 static unsigned int hpwdt_nmi_decoding;
 133 static unsigned int allow_kdump;
 134 static unsigned int priority;           /* hpwdt at end of die_notify list */
 135 static DEFINE_SPINLOCK(rom_lock);
 136 static void *cru_rom_addr;
 137 static struct cmn_registers cmn_regs;
 138
 139 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
 140                                                 unsigned long *pRomEntry);
 141
 142 #ifdef CONFIG_X86_32
 143 /* --32 Bit Bios------------------------------------------------------------ */
 144
 145 #define HPWDT_ARCH      32
 146
 147 asm(".text                          \n\t"
 148     ".align 4                       \n"
 149     "asminline_call:                \n\t"
 150     "pushl       %ebp               \n\t"
 151     "movl        %esp, %ebp         \n\t"
 152     "pusha                          \n\t"
 153     "pushf                          \n\t"
 154     "push        %es                \n\t"
 155     "push        %ds                \n\t"
 156     "pop         %es                \n\t"
 157     "movl        8(%ebp),%eax       \n\t"
 158     "movl        4(%eax),%ebx       \n\t"
 159     "movl        8(%eax),%ecx       \n\t"
 160     "movl        12(%eax),%edx      \n\t"
 161     "movl        16(%eax),%esi      \n\t"
 162     "movl        20(%eax),%edi      \n\t"
 163     "movl        (%eax),%eax        \n\t"
 164     "push        %cs                \n\t"
 165     "call        *12(%ebp)          \n\t"
 166     "pushf                          \n\t"
 167     "pushl       %eax               \n\t"
 168     "movl        8(%ebp),%eax       \n\t"
 169     "movl        %ebx,4(%eax)       \n\t"
 170     "movl        %ecx,8(%eax)       \n\t"
 171     "movl        %edx,12(%eax)      \n\t"
 172     "movl        %esi,16(%eax)      \n\t"
 173     "movl        %edi,20(%eax)      \n\t"
 174     "movw        %ds,24(%eax)       \n\t"
 175     "movw        %es,26(%eax)       \n\t"
 176     "popl        %ebx               \n\t"
 177     "movl        %ebx,(%eax)        \n\t"
 178     "popl        %ebx               \n\t"
 179     "movl        %ebx,28(%eax)      \n\t"
 180     "pop         %es                \n\t"
 181     "popf                           \n\t"
 182     "popa                           \n\t"
 183     "leave                          \n\t"
 184     "ret                            \n\t"
 185     ".previous");
 186
 187
 188 /*
 189  *      cru_detect
 190  *
 191  *      Routine Description:
 192  *      This function uses the 32-bit BIOS Service Directory record to
 193  *      search for a $CRU record.
 194  *
 195  *      Return Value:
 196  *      0        :  SUCCESS
 197  *      <0       :  FAILURE
 198  */
 199 static int __devinit cru_detect(unsigned long map_entry,
 200         unsigned long map_offset)
 201 {
 202         void *bios32_map;
 203         unsigned long *bios32_entrypoint;
 204         unsigned long cru_physical_address;
 205         unsigned long cru_length;
 206         unsigned long physical_bios_base = 0;
 207         unsigned long physical_bios_offset = 0;
 208         int retval = -ENODEV;
 209
 210         bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
 211
 212         if (bios32_map == NULL)
 213                 return -ENODEV;
 214
 215         bios32_entrypoint = bios32_map + map_offset;
 216
 217         cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
 218
 219         set_memory_x((unsigned long)bios32_map, 2);
 220         asminline_call(&cmn_regs, bios32_entrypoint);
 221
 222         if (cmn_regs.u1.ral != 0) {
 223                 printk(KERN_WARNING
 224                         "hpwdt: Call succeeded but with an error: 0x%x\n",
 225                         cmn_regs.u1.ral);
 226         } else {
 227                 physical_bios_base = cmn_regs.u2.rebx;
 228                 physical_bios_offset = cmn_regs.u4.redx;
 229                 cru_length = cmn_regs.u3.recx;
 230                 cru_physical_address =
 231                         physical_bios_base + physical_bios_offset;
 232
 233                 /* If the values look OK, then map it in. */
 234                 if ((physical_bios_base + physical_bios_offset)) {
 235                         cru_rom_addr =
 236                                 ioremap(cru_physical_address, cru_length);
 237                         if (cru_rom_addr) {
 238                                 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 239                                         (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
 240                                 retval = 0;
 241                         }
 242                 }
 243
 244                 printk(KERN_DEBUG "hpwdt: CRU Base Address:   0x%lx\n",
 245                         physical_bios_base);
 246                 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
 247                         physical_bios_offset);
 248                 printk(KERN_DEBUG "hpwdt: CRU Length:         0x%lx\n",
 249                         cru_length);
 250                 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
 251                         &cru_rom_addr);
 252         }
 253         iounmap(bios32_map);
 254         return retval;
 255 }
 256
 257 /*
 258  *      bios_checksum
 259  */
 260 static int __devinit bios_checksum(const char __iomem *ptr, int len)
 261 {
 262         char sum = 0;
 263         int i;
 264
 265         /*
 266          * calculate checksum of size bytes. This should add up
 267          * to zero if we have a valid header.
 268          */
 269         for (i = 0; i < len; i++)
 270                 sum += ptr[i];
 271
 272         return ((sum == 0) && (len > 0));
 273 }
 274
 275 /*
 276  *      bios32_present
 277  *
 278  *      Routine Description:
 279  *      This function finds the 32-bit BIOS Service Directory
 280  *
 281  *      Return Value:
 282  *      0        :  SUCCESS
 283  *      <0       :  FAILURE
 284  */
 285 static int __devinit bios32_present(const char __iomem *p)
 286 {
 287         struct bios32_service_dir *bios_32_ptr;
 288         int length;
 289         unsigned long map_entry, map_offset;
 290
 291         bios_32_ptr = (struct bios32_service_dir *) p;
 292
 293         /*
 294          * Search for signature by checking equal to the swizzled value
 295          * instead of calling another routine to perform a strcmp.
 296          */
 297         if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
 298                 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
 299                 if (bios_checksum(p, length)) {
 300                         /*
 301                          * According to the spec, we're looking for the
 302                          * first 4KB-aligned address below the entrypoint
 303                          * listed in the header. The Service Directory code
 304                          * is guaranteed to occupy no more than 2 4KB pages.
 305                          */
 306                         map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
 307                         map_offset = bios_32_ptr->entry_point - map_entry;
 308
 309                         return cru_detect(map_entry, map_offset);
 310                 }
 311         }
 312         return -ENODEV;
 313 }
 314
 315 static int __devinit detect_cru_service(void)
 316 {
 317         char __iomem *p, *q;
 318         int rc = -1;
 319
 320         /*
 321          * Search from 0x0f0000 through 0x0fffff, inclusive.
 322          */
 323         p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
 324         if (p == NULL)
 325                 return -ENOMEM;
 326
 327         for (q = p; q < p + ROM_SIZE; q += 16) {
 328                 rc = bios32_present(q);
 329                 if (!rc)
 330                         break;
 331         }
 332         iounmap(p);
 333         return rc;
 334 }
 335 /* ------------------------------------------------------------------------- */
 336 #endif /* CONFIG_X86_32 */
 337 #ifdef CONFIG_X86_64
 338 /* --64 Bit Bios------------------------------------------------------------ */
 339
 340 #define HPWDT_ARCH      64
 341
 342 asm(".text                      \n\t"
 343     ".align 4                   \n"
 344     "asminline_call:            \n\t"
 345     "pushq      %rbp            \n\t"
 346     "movq       %rsp, %rbp      \n\t"
 347     "pushq      %rax            \n\t"
 348     "pushq      %rbx            \n\t"
 349     "pushq      %rdx            \n\t"
 350     "pushq      %r12            \n\t"
 351     "pushq      %r9             \n\t"
 352     "movq       %rsi, %r12      \n\t"
 353     "movq       %rdi, %r9       \n\t"
 354     "movl       4(%r9),%ebx     \n\t"
 355     "movl       8(%r9),%ecx     \n\t"
 356     "movl       12(%r9),%edx    \n\t"
 357     "movl       16(%r9),%esi    \n\t"
 358     "movl       20(%r9),%edi    \n\t"
 359     "movl       (%r9),%eax      \n\t"
 360     "call       *%r12           \n\t"
 361     "pushfq                     \n\t"
 362     "popq        %r12           \n\t"
 363     "movl       %eax, (%r9)     \n\t"
 364     "movl       %ebx, 4(%r9)    \n\t"
 365     "movl       %ecx, 8(%r9)    \n\t"
 366     "movl       %edx, 12(%r9)   \n\t"
 367     "movl       %esi, 16(%r9)   \n\t"
 368     "movl       %edi, 20(%r9)   \n\t"
 369     "movq       %r12, %rax      \n\t"
 370     "movl       %eax, 28(%r9)   \n\t"
 371     "popq       %r9             \n\t"
 372     "popq       %r12            \n\t"
 373     "popq       %rdx            \n\t"
 374     "popq       %rbx            \n\t"
 375     "popq       %rax            \n\t"
 376     "leave                      \n\t"
 377     "ret                        \n\t"
 378     ".previous");
 379
 380 /*
 381  *      dmi_find_cru
 382  *
 383  *      Routine Description:
 384  *      This function checks whether or not a SMBIOS/DMI record is
 385  *      the 64bit CRU info or not
 386  */
 387 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
 388 {
 389         struct smbios_cru64_info *smbios_cru64_ptr;
 390         unsigned long cru_physical_address;
 391
 392         if (dm->type == SMBIOS_CRU64_INFORMATION) {
 393                 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
 394                 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
 395                         cru_physical_address =
 396                                 smbios_cru64_ptr->physical_address +
 397                                 smbios_cru64_ptr->double_offset;
 398                         cru_rom_addr = ioremap(cru_physical_address,
 399                                 smbios_cru64_ptr->double_length);
 400                         set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 401                                 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
 402                 }
 403         }
 404 }
 405
 406 static int __devinit detect_cru_service(void)
 407 {
 408         cru_rom_addr = NULL;
 409
 410         dmi_walk(dmi_find_cru, NULL);
 411
 412         /* if cru_rom_addr has been set then we found a CRU service */
 413         return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
 414 }
 415 /* ------------------------------------------------------------------------- */
 416 #endif /* CONFIG_X86_64 */
 417 #endif /* CONFIG_HPWDT_NMI_DECODING */
 418
 419 /*
 420  *      Watchdog operations
 421  */
 422 static void hpwdt_start(void)
 423 {
 424         reload = SECS_TO_TICKS(soft_margin);
 425         iowrite16(reload, hpwdt_timer_reg);
 426         iowrite16(0x85, hpwdt_timer_con);
 427 }
 428
 429 static void hpwdt_stop(void)
 430 {
 431         unsigned long data;
 432
 433         data = ioread16(hpwdt_timer_con);
 434         data &= 0xFE;
 435         iowrite16(data, hpwdt_timer_con);
 436 }
 437
 438 static void hpwdt_ping(void)
 439 {
 440         iowrite16(reload, hpwdt_timer_reg);
 441 }
 442
 443 static int hpwdt_change_timer(int new_margin)
 444 {
 445         if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
 446                 printk(KERN_WARNING
 447                         "hpwdt: New value passed in is invalid: %d seconds.\n",
 448                         new_margin);
 449                 return -EINVAL;
 450         }
 451
 452         soft_margin = new_margin;
 453         printk(KERN_DEBUG
 454                 "hpwdt: New timer passed in is %d seconds.\n",
 455                 new_margin);
 456         reload = SECS_TO_TICKS(soft_margin);
 457
 458         return 0;
 459 }
 460
 461 static int hpwdt_time_left(void)
 462 {
 463         return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
 464 }
 465
 466 #ifdef CONFIG_HPWDT_NMI_DECODING
 467 /*
 468  *      NMI Handler
 469  */
 470 static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
 471                                 void *data)
 472 {
 473         unsigned long rom_pl;
 474         static int die_nmi_called;
 475
 476         if (ulReason != DIE_NMIUNKNOWN)
 477                 goto out;
 478
 479         if (!hpwdt_nmi_decoding)
 480                 goto out;
 481
 482         spin_lock_irqsave(&rom_lock, rom_pl);
 483         if (!die_nmi_called)
 484                 asminline_call(&cmn_regs, cru_rom_addr);
 485         die_nmi_called = 1;
 486         spin_unlock_irqrestore(&rom_lock, rom_pl);
 487         if (cmn_regs.u1.ral == 0) {
 488                 printk(KERN_WARNING "hpwdt: An NMI occurred, "
 489                         "but unable to determine source.\n");
 490         } else {
 491                 if (allow_kdump)
 492                         hpwdt_stop();
 493                 panic("An NMI occurred, please see the Integrated "
 494                         "Management Log for details.\n");
 495         }
 496 out:
 497         return NOTIFY_OK;
 498 }
 499 #endif /* CONFIG_HPWDT_NMI_DECODING */
 500
 501 /*
 502  *      /dev/watchdog handling
 503  */
 504 static int hpwdt_open(struct inode *inode, struct file *file)
 505 {
 506         /* /dev/watchdog can only be opened once */
 507         if (test_and_set_bit(0, &hpwdt_is_open))
 508                 return -EBUSY;
 509
 510         /* Start the watchdog */
 511         hpwdt_start();
 512         hpwdt_ping();
 513
 514         return nonseekable_open(inode, file);
 515 }
 516
 517 static int hpwdt_release(struct inode *inode, struct file *file)
 518 {
 519         /* Stop the watchdog */
 520         if (expect_release == 42) {
 521                 hpwdt_stop();
 522         } else {
 523                 printk(KERN_CRIT
 524                         "hpwdt: Unexpected close, not stopping watchdog!\n");
 525                 hpwdt_ping();
 526         }
 527
 528         expect_release = 0;
 529
 530         /* /dev/watchdog is being closed, make sure it can be re-opened */
 531         clear_bit(0, &hpwdt_is_open);
 532
 533         return 0;
 534 }
 535
 536 static ssize_t hpwdt_write(struct file *file, const char __user *data,
 537         size_t len, loff_t *ppos)
 538 {
 539         /* See if we got the magic character 'V' and reload the timer */
 540         if (len) {
 541                 if (!nowayout) {
 542                         size_t i;
 543
 544                         /* note: just in case someone wrote the magic character
 545                          * five months ago... */
 546                         expect_release = 0;
 547
 548                         /* scan to see whether or not we got the magic char. */
 549                         for (i = 0; i != len; i++) {
 550                                 char c;
 551                                 if (get_user(c, data + i))
 552                                         return -EFAULT;
 553                                 if (c == 'V')
 554                                         expect_release = 42;
 555                         }
 556                 }
 557
 558                 /* someone wrote to us, we should reload the timer */
 559                 hpwdt_ping();
 560         }
 561
 562         return len;
 563 }
 564
 565 static const struct watchdog_info ident = {
 566         .options = WDIOF_SETTIMEOUT |
 567                    WDIOF_KEEPALIVEPING |
 568                    WDIOF_MAGICCLOSE,
 569         .identity = "HP iLO2+ HW Watchdog Timer",
 570 };
 571
 572 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
 573         unsigned long arg)
 574 {
 575         void __user *argp = (void __user *)arg;
 576         int __user *p = argp;
 577         int new_margin;
 578         int ret = -ENOTTY;
 579
 580         switch (cmd) {
 581         case WDIOC_GETSUPPORT:
 582                 ret = 0;
 583                 if (copy_to_user(argp, &ident, sizeof(ident)))
 584                         ret = -EFAULT;
 585                 break;
 586
 587         case WDIOC_GETSTATUS:
 588         case WDIOC_GETBOOTSTATUS:
 589                 ret = put_user(0, p);
 590                 break;
 591
 592         case WDIOC_KEEPALIVE:
 593                 hpwdt_ping();
 594                 ret = 0;
 595                 break;
 596
 597         case WDIOC_SETTIMEOUT:
 598                 ret = get_user(new_margin, p);
 599                 if (ret)
 600                         break;
 601
 602                 ret = hpwdt_change_timer(new_margin);
 603                 if (ret)
 604                         break;
 605
 606                 hpwdt_ping();
 607                 /* Fall */
 608         case WDIOC_GETTIMEOUT:
 609                 ret = put_user(soft_margin, p);
 610                 break;
 611
 612         case WDIOC_GETTIMELEFT:
 613                 ret = put_user(hpwdt_time_left(), p);
 614                 break;
 615         }
 616         return ret;
 617 }
 618
 619 /*
 620  *      Kernel interfaces
 621  */
 622 static const struct file_operations hpwdt_fops = {
 623         .owner = THIS_MODULE,
 624         .llseek = no_llseek,
 625         .write = hpwdt_write,
 626         .unlocked_ioctl = hpwdt_ioctl,
 627         .open = hpwdt_open,
 628         .release = hpwdt_release,
 629 };
 630
 631 static struct miscdevice hpwdt_miscdev = {
 632         .minor = WATCHDOG_MINOR,
 633         .name = "watchdog",
 634         .fops = &hpwdt_fops,
 635 };
 636
 637 #ifdef CONFIG_HPWDT_NMI_DECODING
 638 static struct notifier_block die_notifier = {
 639         .notifier_call = hpwdt_pretimeout,
 640         .priority = 0,
 641 };
 642 #endif /* CONFIG_HPWDT_NMI_DECODING */
 643
 644 /*
 645  *      Init & Exit
 646  */
 647
 648 #ifdef CONFIG_HPWDT_NMI_DECODING
 649 #ifdef CONFIG_X86_LOCAL_APIC
 650 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 651 {
 652         /*
 653          * If nmi_watchdog is turned off then we can turn on
 654          * our nmi decoding capability.
 655          */
 656         hpwdt_nmi_decoding = 1;
 657 }
 658 #else
 659 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 660 {
 661         dev_warn(&dev->dev, "NMI decoding is disabled. "
 662                 "Your kernel does not support a NMI Watchdog.\n");
 663 }
 664 #endif /* CONFIG_X86_LOCAL_APIC */
 665
 666 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
 667 {
 668         int retval;
 669
 670         /*
 671          * We need to map the ROM to get the CRU service.
 672          * For 32 bit Operating Systems we need to go through the 32 Bit
 673          * BIOS Service Directory
 674          * For 64 bit Operating Systems we get that service through SMBIOS.
 675          */
 676         retval = detect_cru_service();
 677         if (retval < 0) {
 678                 dev_warn(&dev->dev,
 679                         "Unable to detect the %d Bit CRU Service.\n",
 680                         HPWDT_ARCH);
 681                 return retval;
 682         }
 683
 684         /*
 685          * We know this is the only CRU call we need to make so lets keep as
 686          * few instructions as possible once the NMI comes in.
 687          */
 688         cmn_regs.u1.rah = 0x0D;
 689         cmn_regs.u1.ral = 0x02;
 690
 691         /*
 692          * If the priority is set to 1, then we will be put first on the
 693          * die notify list to handle a critical NMI. The default is to
 694          * be last so other users of the NMI signal can function.
 695          */
 696         if (priority)
 697                 die_notifier.priority = 0x7FFFFFFF;
 698
 699         retval = register_die_notifier(&die_notifier);
 700         if (retval != 0) {
 701                 dev_warn(&dev->dev,
 702                         "Unable to register a die notifier (err=%d).\n",
 703                         retval);
 704                 if (cru_rom_addr)
 705                         iounmap(cru_rom_addr);
 706         }
 707
 708         dev_info(&dev->dev,
 709                         "HP Watchdog Timer Driver: NMI decoding initialized"
 710                         ", allow kernel dump: %s (default = 0/OFF)"
 711                         ", priority: %s (default = 0/LAST).\n",
 712                         (allow_kdump == 0) ? "OFF" : "ON",
 713                         (priority == 0) ? "LAST" : "FIRST");
 714         return 0;
 715 }
 716
 717 static void hpwdt_exit_nmi_decoding(void)
 718 {
 719         unregister_die_notifier(&die_notifier);
 720         if (cru_rom_addr)
 721                 iounmap(cru_rom_addr);
 722 }
 723 #else /* !CONFIG_HPWDT_NMI_DECODING */
 724 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 725 {
 726 }
 727
 728 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
 729 {
 730         return 0;
 731 }
 732
 733 static void hpwdt_exit_nmi_decoding(void)
 734 {
 735 }
 736 #endif /* CONFIG_HPWDT_NMI_DECODING */
 737
 738 static int __devinit hpwdt_init_one(struct pci_dev *dev,
 739                                         const struct pci_device_id *ent)
 740 {
 741         int retval;
 742
 743         /*
 744          * Check if we can do NMI decoding or not
 745          */
 746         hpwdt_check_nmi_decoding(dev);
 747
 748         /*
 749          * First let's find out if we are on an iLO2+ server. We will
 750          * not run on a legacy ASM box.
 751          * So we only support the G5 ProLiant servers and higher.
 752          */
 753         if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
 754                 dev_warn(&dev->dev,
 755                         "This server does not have an iLO2+ ASIC.\n");
 756                 return -ENODEV;
 757         }
 758
 759         if (pci_enable_device(dev)) {
 760                 dev_warn(&dev->dev,
 761                         "Not possible to enable PCI Device: 0x%x:0x%x.\n",
 762                         ent->vendor, ent->device);
 763                 return -ENODEV;
 764         }
 765
 766         pci_mem_addr = pci_iomap(dev, 1, 0x80);
 767         if (!pci_mem_addr) {
 768                 dev_warn(&dev->dev,
 769                         "Unable to detect the iLO2+ server memory.\n");
 770                 retval = -ENOMEM;
 771                 goto error_pci_iomap;
 772         }
 773         hpwdt_timer_reg = pci_mem_addr + 0x70;
 774         hpwdt_timer_con = pci_mem_addr + 0x72;
 775
 776         /* Make sure that we have a valid soft_margin */
 777         if (hpwdt_change_timer(soft_margin))
 778                 hpwdt_change_timer(DEFAULT_MARGIN);
 779
 780         /* Initialize NMI Decoding functionality */
 781         retval = hpwdt_init_nmi_decoding(dev);
 782         if (retval != 0)
 783                 goto error_init_nmi_decoding;
 784
 785         retval = misc_register(&hpwdt_miscdev);
 786         if (retval < 0) {
 787                 dev_warn(&dev->dev,
 788                         "Unable to register miscdev on minor=%d (err=%d).\n",
 789                         WATCHDOG_MINOR, retval);
 790                 goto error_misc_register;
 791         }
 792
 793         dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
 794                         ", timer margin: %d seconds (nowayout=%d).\n",
 795                         HPWDT_VERSION, soft_margin, nowayout);
 796         return 0;
 797
 798 error_misc_register:
 799         hpwdt_exit_nmi_decoding();
 800 error_init_nmi_decoding:
 801         pci_iounmap(dev, pci_mem_addr);
 802 error_pci_iomap:
 803         pci_disable_device(dev);
 804         return retval;
 805 }
 806
 807 static void __devexit hpwdt_exit(struct pci_dev *dev)
 808 {
 809         if (!nowayout)
 810                 hpwdt_stop();
 811
 812         misc_deregister(&hpwdt_miscdev);
 813         hpwdt_exit_nmi_decoding();
 814         pci_iounmap(dev, pci_mem_addr);
 815         pci_disable_device(dev);
 816 }
 817
 818 static struct pci_driver hpwdt_driver = {
 819         .name = "hpwdt",
 820         .id_table = hpwdt_devices,
 821         .probe = hpwdt_init_one,
 822         .remove = __devexit_p(hpwdt_exit),
 823 };
 824
 825 static void __exit hpwdt_cleanup(void)
 826 {
 827         pci_unregister_driver(&hpwdt_driver);
 828 }
 829
 830 static int __init hpwdt_init(void)
 831 {
 832         return pci_register_driver(&hpwdt_driver);
 833 }
 834
 835 MODULE_AUTHOR("Tom Mingarelli");
 836 MODULE_DESCRIPTION("hp watchdog driver");
 837 MODULE_LICENSE("GPL");
 838 MODULE_VERSION(HPWDT_VERSION);
 839 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 840
 841 module_param(soft_margin, int, 0);
 842 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
 843
 844 module_param(nowayout, int, 0);
 845 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
 846                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 847
 848 #ifdef CONFIG_HPWDT_NMI_DECODING
 849 module_param(allow_kdump, int, 0);
 850 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
 851
 852 module_param(priority, int, 0);
 853 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
 854                 " (default = 0/Last)\n");
 855 #endif /* !CONFIG_HPWDT_NMI_DECODING */
 856
 857 module_init(hpwdt_init);
 858 module_exit(hpwdt_cleanup);