2 * of_xilinx_wdt.c 1.01 A Watchdog Device Driver for Xilinx xps_timebase_wdt
4 * (C) Copyright 2011 (Alejandro Cabrera <aldaya@gmail.com>)
6 * -----------------------
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
13 * -----------------------
14 * 30-May-2011 Alejandro Cabrera <aldaya@gmail.com>
15 * - If "xlnx,wdt-enable-once" wasn't found on device tree the
16 * module will use CONFIG_WATCHDOG_NOWAYOUT
17 * - If the device tree parameters ("clock-frequency" and
18 * "xlnx,wdt-interval") wasn't found the driver won't
19 * know the wdt reset interval
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/kernel.h>
26 #include <linux/miscdevice.h>
27 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/watchdog.h>
31 #include <linux/uaccess.h>
33 #include <linux/of_device.h>
34 #include <linux/of_address.h>
36 /* Register offsets for the Wdt device */
37 #define XWT_TWCSR0_OFFSET 0x0 /* Control/Status Register0 */
38 #define XWT_TWCSR1_OFFSET 0x4 /* Control/Status Register1 */
39 #define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */
41 /* Control/Status Register Masks */
42 #define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */
43 #define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */
44 #define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */
46 /* Control/Status Register 0/1 bits */
47 #define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */
49 /* SelfTest constants */
50 #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000
51 #define XWT_TIMER_FAILED 0xFFFFFFFF
53 #define WATCHDOG_NAME "Xilinx Watchdog"
54 #define PFX WATCHDOG_NAME ": "
64 static struct xwdt_device xdev;
67 static u32 control_status_reg;
68 static u8 expect_close;
70 static unsigned long driver_open;
72 static DEFINE_SPINLOCK(spinlock);
74 static void xwdt_start(void)
78 /* Clean previous status and enable the watchdog timer */
79 control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
80 control_status_reg |= (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK);
82 iowrite32((control_status_reg | XWT_CSR0_EWDT1_MASK),
83 xdev.base + XWT_TWCSR0_OFFSET);
85 iowrite32(XWT_CSRX_EWDT2_MASK, xdev.base + XWT_TWCSR1_OFFSET);
87 spin_unlock(&spinlock);
90 static void xwdt_stop(void)
94 control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
96 iowrite32((control_status_reg & ~XWT_CSR0_EWDT1_MASK),
97 xdev.base + XWT_TWCSR0_OFFSET);
99 iowrite32(0, xdev.base + XWT_TWCSR1_OFFSET);
101 spin_unlock(&spinlock);
102 printk(KERN_INFO PFX "Stopped!\n");
105 static void xwdt_keepalive(void)
107 spin_lock(&spinlock);
109 control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
110 control_status_reg |= (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK);
111 iowrite32(control_status_reg, xdev.base + XWT_TWCSR0_OFFSET);
113 spin_unlock(&spinlock);
116 static void xwdt_get_status(int *status)
120 spin_lock(&spinlock);
122 control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
123 new_status = ((control_status_reg &
124 (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK)) != 0);
125 spin_unlock(&spinlock);
129 *status |= WDIOF_CARDRESET;
132 static u32 xwdt_selftest(void)
138 spin_lock(&spinlock);
140 timer_value1 = ioread32(xdev.base + XWT_TBR_OFFSET);
141 timer_value2 = ioread32(xdev.base + XWT_TBR_OFFSET);
144 ((i <= XWT_MAX_SELFTEST_LOOP_COUNT) &&
145 (timer_value2 == timer_value1)); i++) {
146 timer_value2 = ioread32(xdev.base + XWT_TBR_OFFSET);
149 spin_unlock(&spinlock);
151 if (timer_value2 != timer_value1)
152 return ~XWT_TIMER_FAILED;
154 return XWT_TIMER_FAILED;
157 static int xwdt_open(struct inode *inode, struct file *file)
159 /* Only one process can handle the wdt at a time */
160 if (test_and_set_bit(0, &driver_open))
163 /* Make sure that the module are always loaded...*/
165 __module_get(THIS_MODULE);
168 printk(KERN_INFO PFX "Started...\n");
170 return nonseekable_open(inode, file);
173 static int xwdt_release(struct inode *inode, struct file *file)
175 if (expect_close == 42) {
179 "Unexpected close, not stopping watchdog!\n");
183 clear_bit(0, &driver_open);
190 * @file: file handle to the watchdog
191 * @buf: buffer to write (unused as data does not matter here
192 * @count: count of bytes
193 * @ppos: pointer to the position to write. No seeks allowed
195 * A write to a watchdog device is defined as a keepalive signal. Any
196 * write of data will do, as we don't define content meaning.
198 static ssize_t xwdt_write(struct file *file, const char __user *buf,
199 size_t len, loff_t *ppos)
202 if (!xdev.nowayout) {
205 /* In case it was set long ago */
208 for (i = 0; i != len; i++) {
211 if (get_user(c, buf + i))
222 static const struct watchdog_info ident = {
223 .options = WDIOF_MAGICCLOSE |
225 .firmware_version = 1,
226 .identity = WATCHDOG_NAME,
231 * @file: file handle to the device
232 * @cmd: watchdog command
233 * @arg: argument pointer
235 * The watchdog API defines a common set of functions for all watchdogs
236 * according to their available features.
238 static long xwdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
243 struct watchdog_info __user *ident;
247 uarg.i = (int __user *)arg;
250 case WDIOC_GETSUPPORT:
251 return copy_to_user(uarg.ident, &ident,
252 sizeof(ident)) ? -EFAULT : 0;
254 case WDIOC_GETBOOTSTATUS:
255 return put_user(xdev.boot_status, uarg.i);
257 case WDIOC_GETSTATUS:
258 xwdt_get_status(&status);
259 return put_user(status, uarg.i);
261 case WDIOC_KEEPALIVE:
265 case WDIOC_GETTIMEOUT:
269 return put_user(timeout, uarg.i);
276 static const struct file_operations xwdt_fops = {
277 .owner = THIS_MODULE,
281 .release = xwdt_release,
282 .unlocked_ioctl = xwdt_ioctl,
285 static struct miscdevice xwdt_miscdev = {
286 .minor = WATCHDOG_MINOR,
291 static int __devinit xwdt_probe(struct platform_device *pdev)
299 pfreq = (u32 *)of_get_property(pdev->dev.of_node->parent,
300 "clock-frequency", NULL);
303 printk(KERN_WARNING PFX
304 "The watchdog clock frequency cannot be obtained!\n");
308 rc = of_address_to_resource(pdev->dev.of_node, 0, &xdev.res);
310 printk(KERN_WARNING PFX "invalid address!\n");
314 tmptr = (u32 *)of_get_property(pdev->dev.of_node,
315 "xlnx,wdt-interval", NULL);
317 printk(KERN_WARNING PFX "Parameter \"xlnx,wdt-interval\""
318 " not found in device tree!\n");
321 xdev.wdt_interval = *tmptr;
324 tmptr = (u32 *)of_get_property(pdev->dev.of_node,
325 "xlnx,wdt-enable-once", NULL);
327 printk(KERN_WARNING PFX "Parameter \"xlnx,wdt-enable-once\""
328 " not found in device tree!\n");
329 xdev.nowayout = WATCHDOG_NOWAYOUT;
333 * Twice of the 2^wdt_interval / freq because the first wdt overflow is
334 * ignored (interrupt), reset is only generated at second wdt overflow
337 timeout = 2 * ((1<<xdev.wdt_interval) / *pfreq);
339 if (!request_mem_region(xdev.res.start,
340 xdev.res.end - xdev.res.start + 1, WATCHDOG_NAME)) {
342 printk(KERN_ERR PFX "memory request failure!\n");
346 xdev.base = ioremap(xdev.res.start, xdev.res.end - xdev.res.start + 1);
347 if (xdev.base == NULL) {
349 printk(KERN_ERR PFX "ioremap failure!\n");
353 rc = xwdt_selftest();
354 if (rc == XWT_TIMER_FAILED) {
355 printk(KERN_ERR PFX "SelfTest routine error!\n");
359 xwdt_get_status(&xdev.boot_status);
361 rc = misc_register(&xwdt_miscdev);
364 "cannot register miscdev on minor=%d (err=%d)\n",
365 xwdt_miscdev.minor, rc);
371 "driver loaded (timeout=? sec, nowayout=%d)\n",
375 "driver loaded (timeout=%d sec, nowayout=%d)\n",
376 timeout, xdev.nowayout);
379 clear_bit(0, &driver_open);
386 release_mem_region(xdev.res.start, resource_size(&xdev.res));
391 static int __devexit xwdt_remove(struct platform_device *dev)
393 misc_deregister(&xwdt_miscdev);
395 release_mem_region(xdev.res.start, resource_size(&xdev.res));
400 /* Match table for of_platform binding */
401 static struct of_device_id __devinitdata xwdt_of_match[] = {
402 { .compatible = "xlnx,xps-timebase-wdt-1.01.a", },
405 MODULE_DEVICE_TABLE(of, xwdt_of_match);
407 static struct platform_driver xwdt_driver = {
409 .remove = __devexit_p(xwdt_remove),
411 .owner = THIS_MODULE,
412 .name = WATCHDOG_NAME,
413 .of_match_table = xwdt_of_match,
417 static int __init xwdt_init(void)
419 return platform_driver_register(&xwdt_driver);
422 static void __exit xwdt_exit(void)
424 platform_driver_unregister(&xwdt_driver);
427 module_init(xwdt_init);
428 module_exit(xwdt_exit);
430 MODULE_AUTHOR("Alejandro Cabrera <aldaya@gmail.com>");
431 MODULE_DESCRIPTION("Xilinx Watchdog driver");
432 MODULE_LICENSE("GPL");
433 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);