2 * Copyright 2017 Facebook, Inc.
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
21 #include <folly/Portability.h>
30 * Identification of an Intel CPU.
31 * Supports CPUID feature flags (EAX=1) and extended features (EAX=7, ECX=0).
32 * Values from http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html
36 // Always inline in order for this to be usable from a __ifunc__.
37 // In shared library mode, a __ifunc__ runs at relocation time, while the
38 // PLT hasn't been fully populated yet; thus, ifuncs cannot use symbols
39 // with potentially external linkage. (This issue is less likely in opt
40 // mode since inlining happens more likely, and it doesn't happen for
41 // statically linked binaries which don't depend on the PLT)
42 FOLLY_ALWAYS_INLINE CpuId() {
45 __cpuid(static_cast<int*>(reg), 0);
48 __cpuid(static_cast<int*>(reg), 1);
49 f1c_ = uint32_t(reg[2]);
50 f1d_ = uint32_t(reg[3]);
53 __cpuidex(static_cast<int*>(reg), 7, 0);
54 f7b_ = uint32_t(reg[1]);
55 f7c_ = uint32_t(reg[2]);
57 #elif defined(__i386__) && defined(__PIC__) && !defined(__clang__) && \
59 // The following block like the normal cpuid branch below, but gcc
60 // reserves ebx for use of its pic register so we must specially
61 // handle the save and restore to avoid clobbering the register
76 : "=a"(f1a), "=c"(f1c_), "=d"(f1d_)
84 "movl %%ebx, %%eax\n\r"
86 : "=a"(f7b_), "=c"(f7c_)
90 #elif FOLLY_X64 || defined(__i386__)
92 __asm__("cpuid" : "=a"(n) : "a"(0) : "ebx", "ecx", "edx");
95 __asm__("cpuid" : "=a"(f1a), "=c"(f1c_), "=d"(f1d_) : "a"(1) : "ebx");
100 : "=a"(f7a), "=b"(f7b_), "=c"(f7c_)
107 #define X(name, r, bit) \
108 FOLLY_ALWAYS_INLINE bool name() const { \
109 return ((r) & (1U << bit)) != 0; \
112 // cpuid(1): Processor Info and Feature Bits.
113 #define C(name, bit) X(name, f1c_, bit)
144 #define D(name, bit) X(name, f1d_, bit)
176 // cpuid(7): Extended Features.
177 #define B(name, bit) X(name, f7b_, bit)
203 #define C(name, bit) X(name, f7c_, bit)