5 * We need the APIC definitions automatically as part of 'smp.h'
7 #include <linux/threads.h>
8 #include <linux/cpumask.h>
9 #include <linux/bitops.h>
10 extern int disable_apic;
12 #ifdef CONFIG_X86_LOCAL_APIC
13 #include <asm/fixmap.h>
14 #include <asm/mpspec.h>
15 #ifdef CONFIG_X86_IO_APIC
16 #include <asm/io_apic.h>
19 #include <asm/thread_info.h>
28 extern cpumask_t cpu_present_mask;
29 extern cpumask_t cpu_possible_map;
30 extern cpumask_t cpu_online_map;
31 extern cpumask_t cpu_callout_map;
32 extern cpumask_t cpu_initialized;
35 * Private routines/data
38 extern void smp_alloc_memory(void);
39 extern volatile unsigned long smp_invalidate_needed;
41 extern void lock_ipi_call_lock(void);
42 extern void unlock_ipi_call_lock(void);
43 extern int smp_num_siblings;
44 extern void smp_send_reschedule(int cpu);
45 void smp_stop_cpu(void);
46 extern int smp_call_function_single(int cpuid, void (*func) (void *info),
47 void *info, int retry, int wait);
49 extern cpumask_t cpu_sibling_map[NR_CPUS];
50 extern cpumask_t cpu_core_map[NR_CPUS];
51 extern u8 cpu_llc_id[NR_CPUS];
53 #define SMP_TRAMPOLINE_BASE 0x6000
56 * On x86 all CPUs are mapped 1:1 to the APIC space.
57 * This simplifies scheduling and IPI sending and
58 * compresses data structures.
61 static inline int num_booting_cpus(void)
63 return cpus_weight(cpu_callout_map);
66 #define raw_smp_processor_id() read_pda(cpunumber)
68 static inline int hard_smp_processor_id(void)
70 /* we don't want to mark this access volatile - bad code generation */
71 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
74 extern int safe_smp_processor_id(void);
75 extern int __cpu_disable(void);
76 extern void __cpu_die(unsigned int cpu);
77 extern void prefill_possible_map(void);
78 extern unsigned num_processors;
79 extern unsigned disabled_cpus;
81 #define NO_PROC_ID 0xFF /* No processor magic marker */
86 * Some lowlevel functions might want to know about
87 * the real APIC ID <-> CPU # mapping.
89 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
90 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
91 extern u8 bios_cpu_apicid[];
93 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
95 return cpus_addr(cpumask)[0];
98 static inline int cpu_present_to_apicid(int mps_cpu)
100 if (mps_cpu < NR_CPUS)
101 return (int)bios_cpu_apicid[mps_cpu];
107 #define stack_smp_processor_id() 0
108 #define safe_smp_processor_id() 0
109 #define cpu_logical_map(x) (x)
111 #include <asm/thread_info.h>
112 #define stack_smp_processor_id() \
114 struct thread_info *ti; \
115 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
120 static __inline int logical_smp_processor_id(void)
122 /* we don't want to mark this access volatile - bad code generation */
123 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
127 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
129 #define cpu_physical_id(cpu) boot_cpu_id
130 static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
131 void *info, int retry, int wait)
133 /* Disable interrupts here? */
137 #endif /* !CONFIG_SMP */