2 * Host communication command constants for ChromeOS EC
4 * Copyright (C) 2012 Google, Inc
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * The ChromeOS EC multi function device is used to mux all the requests
16 * to the EC device for its multiple features: keyboard controller,
17 * battery charging and regulator control, firmware update.
19 * NOTE: This file is copied verbatim from the ChromeOS EC Open Source
20 * project in an attempt to make future updates easy to make.
23 #ifndef __CROS_EC_COMMANDS_H
24 #define __CROS_EC_COMMANDS_H
27 * Current version of this protocol
29 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
30 * determined in other ways. Remove this once the kernel code no longer
33 #define EC_PROTO_VERSION 0x00000002
35 /* Command version mask */
36 #define EC_VER_MASK(version) (1UL << (version))
38 /* I/O addresses for ACPI commands */
39 #define EC_LPC_ADDR_ACPI_DATA 0x62
40 #define EC_LPC_ADDR_ACPI_CMD 0x66
42 /* I/O addresses for host command */
43 #define EC_LPC_ADDR_HOST_DATA 0x200
44 #define EC_LPC_ADDR_HOST_CMD 0x204
46 /* I/O addresses for host command args and params */
47 /* Protocol version 2 */
48 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
49 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is
50 * EC_PROTO2_MAX_PARAM_SIZE */
51 /* Protocol version 3 */
52 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
53 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
55 /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
56 * and they tell the kernel that so we have to think of it as two parts. */
57 #define EC_HOST_CMD_REGION0 0x800
58 #define EC_HOST_CMD_REGION1 0x880
59 #define EC_HOST_CMD_REGION_SIZE 0x80
61 /* EC command register bit functions */
62 #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */
63 #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */
64 #define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */
65 #define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */
66 #define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */
67 #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */
68 #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */
70 #define EC_LPC_ADDR_MEMMAP 0x900
71 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
72 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
74 /* The offset address of each type of data in mapped memory. */
75 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
76 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
77 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
78 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
79 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
80 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
81 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
82 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
83 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
84 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
85 /* Unused 0x28 - 0x2f */
86 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
87 /* Unused 0x31 - 0x33 */
88 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */
89 /* Reserve 0x38 - 0x3f for additional host event-related stuff */
90 /* Battery values are all 32 bits */
91 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
92 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
93 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
94 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */
95 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
96 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
97 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
98 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
99 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
100 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
101 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
102 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
103 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
104 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
105 /* Unused 0x84 - 0x8f */
106 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
108 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometer data 0x92 - 0x9f */
109 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
110 /* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */
113 /* Define the format of the accelerometer mapped memory status byte. */
114 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
115 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4)
116 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7)
118 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
119 #define EC_TEMP_SENSOR_ENTRIES 16
121 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
123 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
125 #define EC_TEMP_SENSOR_B_ENTRIES 8
127 /* Special values for mapped temperature sensors */
128 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff
129 #define EC_TEMP_SENSOR_ERROR 0xfe
130 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd
131 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
133 * The offset of temperature value stored in mapped memory. This allows
134 * reporting a temperature range of 200K to 454K = -73C to 181C.
136 #define EC_TEMP_SENSOR_OFFSET 200
139 * Number of ALS readings at EC_MEMMAP_ALS
141 #define EC_ALS_ENTRIES 2
144 * The default value a temperature sensor will return when it is present but
145 * has not been read this boot. This is a reasonable number to avoid
146 * triggering alarms on the host.
148 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
150 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
151 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
152 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
154 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
155 #define EC_BATT_FLAG_AC_PRESENT 0x01
156 #define EC_BATT_FLAG_BATT_PRESENT 0x02
157 #define EC_BATT_FLAG_DISCHARGING 0x04
158 #define EC_BATT_FLAG_CHARGING 0x08
159 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
161 /* Switch flags at EC_MEMMAP_SWITCHES */
162 #define EC_SWITCH_LID_OPEN 0x01
163 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
164 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
165 /* Was recovery requested via keyboard; now unused. */
166 #define EC_SWITCH_IGNORE1 0x08
167 /* Recovery requested via dedicated signal (from servo board) */
168 #define EC_SWITCH_DEDICATED_RECOVERY 0x10
169 /* Was fake developer mode switch; now unused. Remove in next refactor. */
170 #define EC_SWITCH_IGNORE0 0x20
172 /* Host command interface flags */
173 /* Host command interface supports LPC args (LPC interface only) */
174 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
175 /* Host command interface supports version 3 protocol */
176 #define EC_HOST_CMD_FLAG_VERSION_3 0x02
178 /* Wireless switch flags */
179 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
180 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
181 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
182 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
183 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
186 * This header file is used in coreboot both in C and ACPI code. The ACPI code
187 * is pre-processed to handle constants but the ASL compiler is unable to
188 * handle actual C code so keep it separate.
193 * Define __packed if someone hasn't beat us to it. Linux kernel style
194 * checking prefers __packed over __attribute__((packed)).
197 #define __packed __attribute__((packed))
200 /* LPC command status byte masks */
201 /* EC has written a byte in the data register and host hasn't read it yet */
202 #define EC_LPC_STATUS_TO_HOST 0x01
203 /* Host has written a command/data byte and the EC hasn't read it yet */
204 #define EC_LPC_STATUS_FROM_HOST 0x02
205 /* EC is processing a command */
206 #define EC_LPC_STATUS_PROCESSING 0x04
207 /* Last write to EC was a command, not data */
208 #define EC_LPC_STATUS_LAST_CMD 0x08
209 /* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */
210 #define EC_LPC_STATUS_BURST_MODE 0x10
211 /* SCI event is pending (requesting SCI query) */
212 #define EC_LPC_STATUS_SCI_PENDING 0x20
213 /* SMI event is pending (requesting SMI query) */
214 #define EC_LPC_STATUS_SMI_PENDING 0x40
216 #define EC_LPC_STATUS_RESERVED 0x80
219 * EC is busy. This covers both the EC processing a command, and the host has
220 * written a new command but the EC hasn't picked it up yet.
222 #define EC_LPC_STATUS_BUSY_MASK \
223 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
225 /* Host command response codes */
228 EC_RES_INVALID_COMMAND = 1,
230 EC_RES_INVALID_PARAM = 3,
231 EC_RES_ACCESS_DENIED = 4,
232 EC_RES_INVALID_RESPONSE = 5,
233 EC_RES_INVALID_VERSION = 6,
234 EC_RES_INVALID_CHECKSUM = 7,
235 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */
236 EC_RES_UNAVAILABLE = 9, /* No response available */
237 EC_RES_TIMEOUT = 10, /* We got a timeout */
238 EC_RES_OVERFLOW = 11, /* Table / data overflow */
239 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */
240 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */
241 EC_RES_RESPONSE_TOO_BIG = 14 /* Response was too big to handle */
245 * Host event codes. Note these are 1-based, not 0-based, because ACPI query
246 * EC command uses code 0 to mean "no event pending". We explicitly specify
247 * each value in the enum listing so they won't change if we delete/insert an
248 * item or rearrange the list (it needs to be stable across platforms, not
249 * just within a single compiled instance).
251 enum host_event_code {
252 EC_HOST_EVENT_LID_CLOSED = 1,
253 EC_HOST_EVENT_LID_OPEN = 2,
254 EC_HOST_EVENT_POWER_BUTTON = 3,
255 EC_HOST_EVENT_AC_CONNECTED = 4,
256 EC_HOST_EVENT_AC_DISCONNECTED = 5,
257 EC_HOST_EVENT_BATTERY_LOW = 6,
258 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
259 EC_HOST_EVENT_BATTERY = 8,
260 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
261 EC_HOST_EVENT_THERMAL_OVERLOAD = 10,
262 EC_HOST_EVENT_THERMAL = 11,
263 EC_HOST_EVENT_USB_CHARGER = 12,
264 EC_HOST_EVENT_KEY_PRESSED = 13,
266 * EC has finished initializing the host interface. The host can check
267 * for this event following sending a EC_CMD_REBOOT_EC command to
268 * determine when the EC is ready to accept subsequent commands.
270 EC_HOST_EVENT_INTERFACE_READY = 14,
271 /* Keyboard recovery combo has been pressed */
272 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
274 /* Shutdown due to thermal overload */
275 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
276 /* Shutdown due to battery level too low */
277 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
279 /* Suggest that the AP throttle itself */
280 EC_HOST_EVENT_THROTTLE_START = 18,
281 /* Suggest that the AP resume normal speed */
282 EC_HOST_EVENT_THROTTLE_STOP = 19,
284 /* Hang detect logic detected a hang and host event timeout expired */
285 EC_HOST_EVENT_HANG_DETECT = 20,
286 /* Hang detect logic detected a hang and warm rebooted the AP */
287 EC_HOST_EVENT_HANG_REBOOT = 21,
290 * The high bit of the event mask is not used as a host event code. If
291 * it reads back as set, then the entire event mask should be
292 * considered invalid by the host. This can happen when reading the
293 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
294 * not initialized on the EC, or improperly configured on the host.
296 EC_HOST_EVENT_INVALID = 32
298 /* Host event mask */
299 #define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1))
301 /* Arguments at EC_LPC_ADDR_HOST_ARGS */
302 struct ec_lpc_host_args {
304 uint8_t command_version;
307 * Checksum; sum of command + flags + command_version + data_size +
308 * all params/response data bytes.
313 /* Flags for ec_lpc_host_args.flags */
315 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
318 * If EC gets a command and this flag is not set, this is an old-style command.
319 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
320 * unknown length. EC must respond with an old-style response (that is,
321 * withouth setting EC_HOST_ARGS_FLAG_TO_HOST).
323 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
325 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response.
327 * If EC responds to a command and this flag is not set, this is an old-style
328 * response. Command version is 0 and response data from EC is at
329 * EC_LPC_ADDR_OLD_PARAM with unknown length.
331 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02
333 /*****************************************************************************/
335 * Byte codes returned by EC over SPI interface.
337 * These can be used by the AP to debug the EC interface, and to determine
338 * when the EC is not in a state where it will ever get around to responding
341 * Example of sequence of bytes read from EC for a current good transfer:
342 * 1. - - AP asserts chip select (CS#)
343 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
344 * 3. - - EC starts handling CS# interrupt
345 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
346 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
347 * bytes looking for EC_SPI_FRAME_START
348 * 6. - - EC finishes processing and sets up response
349 * 7. EC_SPI_FRAME_START - AP reads frame byte
350 * 8. (response packet) - AP reads response packet
351 * 9. EC_SPI_PAST_END - Any additional bytes read by AP
352 * 10 - - AP deasserts chip select
353 * 11 - - EC processes CS# interrupt and sets up DMA for
356 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
357 * the following byte values:
363 * Then the EC found an error in the request, or was not ready for the request
364 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START,
365 * because the EC is unable to tell when the AP is done sending its request.
369 * Framing byte which precedes a response packet from the EC. After sending a
370 * request, the AP will clock in bytes until it sees the framing byte, then
371 * clock in the response packet.
373 #define EC_SPI_FRAME_START 0xec
376 * Padding bytes which are clocked out after the end of a response packet.
378 #define EC_SPI_PAST_END 0xed
381 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects
382 * that the AP will send a valid packet header (starting with
383 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
385 #define EC_SPI_RX_READY 0xf8
388 * EC has started receiving the request from the AP, but hasn't started
391 #define EC_SPI_RECEIVING 0xf9
393 /* EC has received the entire request from the AP and is processing it. */
394 #define EC_SPI_PROCESSING 0xfa
397 * EC received bad data from the AP, such as a packet header with an invalid
398 * length. EC will ignore all data until chip select deasserts.
400 #define EC_SPI_RX_BAD_DATA 0xfb
403 * EC received data from the AP before it was ready. That is, the AP asserted
404 * chip select and started clocking data before the EC was ready to receive it.
405 * EC will ignore all data until chip select deasserts.
407 #define EC_SPI_NOT_READY 0xfc
410 * EC was ready to receive a request from the AP. EC has treated the byte sent
411 * by the AP as part of a request packet, or (for old-style ECs) is processing
412 * a fully received packet but is not ready to respond yet.
414 #define EC_SPI_OLD_READY 0xfd
416 /*****************************************************************************/
419 * Protocol version 2 for I2C and SPI send a request this way:
421 * 0 EC_CMD_VERSION0 + (command version)
423 * 2 Length of params = N
424 * 3..N+2 Params, if any
425 * N+3 8-bit checksum of bytes 0..N+2
427 * The corresponding response is:
429 * 0 Result code (EC_RES_*)
430 * 1 Length of params = M
431 * 2..M+1 Params, if any
432 * M+2 8-bit checksum of bytes 0..M+1
434 #define EC_PROTO2_REQUEST_HEADER_BYTES 3
435 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1
436 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
437 EC_PROTO2_REQUEST_TRAILER_BYTES)
439 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2
440 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
441 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
442 EC_PROTO2_RESPONSE_TRAILER_BYTES)
444 /* Parameter length was limited by the LPC interface */
445 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
447 /* Maximum request and response packet sizes for protocol version 2 */
448 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
449 EC_PROTO2_MAX_PARAM_SIZE)
450 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
451 EC_PROTO2_MAX_PARAM_SIZE)
453 /*****************************************************************************/
456 * Value written to legacy command port / prefix byte to indicate protocol
457 * 3+ structs are being used. Usage is bus-dependent.
459 #define EC_COMMAND_PROTOCOL_3 0xda
461 #define EC_HOST_REQUEST_VERSION 3
463 /* Version 3 request from host */
464 struct ec_host_request {
465 /* Struct version (=3)
467 * EC will return EC_RES_INVALID_HEADER if it receives a header with a
468 * version it doesn't know how to parse.
470 uint8_t struct_version;
473 * Checksum of request and data; sum of all bytes including checksum
481 /* Command version */
482 uint8_t command_version;
484 /* Unused byte in current protocol version; set to 0 */
487 /* Length of data which follows this header */
491 #define EC_HOST_RESPONSE_VERSION 3
493 /* Version 3 response from EC */
494 struct ec_host_response {
495 /* Struct version (=3) */
496 uint8_t struct_version;
499 * Checksum of response and data; sum of all bytes including checksum
504 /* Result code (EC_RES_*) */
507 /* Length of data which follows this header */
510 /* Unused bytes in current protocol version; set to 0 */
514 /*****************************************************************************/
518 * Each command is an 16-bit command value. Commands which take params or
519 * return response data specify structs for that data. If no struct is
520 * specified, the command does not input or output data, respectively.
521 * Parameter/response length is implicit in the structs. Some underlying
522 * communication protocols (I2C, SPI) may add length or checksum headers, but
523 * those are implementation-dependent and not defined here.
526 /*****************************************************************************/
527 /* General / test commands */
530 * Get protocol version, used to deal with non-backward compatible protocol
533 #define EC_CMD_PROTO_VERSION 0x00
535 struct ec_response_proto_version {
540 * Hello. This is a simple command to test the EC is responsive to
543 #define EC_CMD_HELLO 0x01
545 struct ec_params_hello {
546 uint32_t in_data; /* Pass anything here */
549 struct ec_response_hello {
550 uint32_t out_data; /* Output will be in_data + 0x01020304 */
553 /* Get version number */
554 #define EC_CMD_GET_VERSION 0x02
556 enum ec_current_image {
557 EC_IMAGE_UNKNOWN = 0,
562 struct ec_response_get_version {
563 /* Null-terminated version strings for RO, RW */
564 char version_string_ro[32];
565 char version_string_rw[32];
566 char reserved[32]; /* Was previously RW-B string */
567 uint32_t current_image; /* One of ec_current_image */
571 #define EC_CMD_READ_TEST 0x03
573 struct ec_params_read_test {
574 uint32_t offset; /* Starting value for read buffer */
575 uint32_t size; /* Size to read in bytes */
578 struct ec_response_read_test {
583 * Get build information
585 * Response is null-terminated string.
587 #define EC_CMD_GET_BUILD_INFO 0x04
590 #define EC_CMD_GET_CHIP_INFO 0x05
592 struct ec_response_get_chip_info {
593 /* Null-terminated strings */
596 char revision[32]; /* Mask version */
599 /* Get board HW version */
600 #define EC_CMD_GET_BOARD_VERSION 0x06
602 struct ec_response_board_version {
603 uint16_t board_version; /* A monotonously incrementing number. */
607 * Read memory-mapped data.
609 * This is an alternate interface to memory-mapped data for bus protocols
610 * which don't support direct-mapped memory - I2C, SPI, etc.
612 * Response is params.size bytes of data.
614 #define EC_CMD_READ_MEMMAP 0x07
616 struct ec_params_read_memmap {
617 uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */
618 uint8_t size; /* Size to read in bytes */
621 /* Read versions supported for a command */
622 #define EC_CMD_GET_CMD_VERSIONS 0x08
624 struct ec_params_get_cmd_versions {
625 uint8_t cmd; /* Command to check */
628 struct ec_response_get_cmd_versions {
630 * Mask of supported versions; use EC_VER_MASK() to compare with a
633 uint32_t version_mask;
637 * Check EC communcations status (busy). This is needed on i2c/spi but not
638 * on lpc since it has its own out-of-band busy indicator.
640 * lpc must read the status from the command register. Attempting this on
641 * lpc will overwrite the args/parameter space and corrupt its data.
643 #define EC_CMD_GET_COMMS_STATUS 0x09
645 /* Avoid using ec_status which is for return values */
646 enum ec_comms_status {
647 EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */
650 struct ec_response_get_comms_status {
651 uint32_t flags; /* Mask of enum ec_comms_status */
654 /* Fake a variety of responses, purely for testing purposes. */
655 #define EC_CMD_TEST_PROTOCOL 0x0a
657 /* Tell the EC what to send back to us. */
658 struct ec_params_test_protocol {
664 /* Here it comes... */
665 struct ec_response_test_protocol {
669 /* Get prococol information */
670 #define EC_CMD_GET_PROTOCOL_INFO 0x0b
672 /* Flags for ec_response_get_protocol_info.flags */
673 /* EC_RES_IN_PROGRESS may be returned if a command is slow */
674 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)
676 struct ec_response_get_protocol_info {
677 /* Fields which exist if at least protocol version 3 supported */
679 /* Bitmask of protocol versions supported (1 << n means version n)*/
680 uint32_t protocol_versions;
682 /* Maximum request packet size, in bytes */
683 uint16_t max_request_packet_size;
685 /* Maximum response packet size, in bytes */
686 uint16_t max_response_packet_size;
688 /* Flags; see EC_PROTOCOL_INFO_* */
693 /*****************************************************************************/
694 /* Get/Set miscellaneous values */
696 /* The upper byte of .flags tells what to do (nothing means "get") */
697 #define EC_GSV_SET 0x80000000
699 /* The lower three bytes of .flags identifies the parameter, if that has
700 meaning for an individual command. */
701 #define EC_GSV_PARAM_MASK 0x00ffffff
703 struct ec_params_get_set_value {
708 struct ec_response_get_set_value {
713 /* More than one command can use these structs to get/set paramters. */
714 #define EC_CMD_GSV_PAUSE_IN_S5 0x0c
717 /*****************************************************************************/
721 #define EC_CMD_FLASH_INFO 0x10
723 /* Version 0 returns these fields */
724 struct ec_response_flash_info {
725 /* Usable flash size, in bytes */
728 * Write block size. Write offset and size must be a multiple
731 uint32_t write_block_size;
733 * Erase block size. Erase offset and size must be a multiple
736 uint32_t erase_block_size;
738 * Protection block size. Protection offset and size must be a
741 uint32_t protect_block_size;
744 /* Flags for version 1+ flash info command */
745 /* EC flash erases bits to 0 instead of 1 */
746 #define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
749 * Version 1 returns the same initial fields as version 0, with additional
752 * gcc anonymous structs don't seem to get along with the __packed directive;
753 * if they did we'd define the version 0 struct as a sub-struct of this one.
755 struct ec_response_flash_info_1 {
756 /* Version 0 fields; see above for description */
758 uint32_t write_block_size;
759 uint32_t erase_block_size;
760 uint32_t protect_block_size;
762 /* Version 1 adds these fields: */
764 * Ideal write size in bytes. Writes will be fastest if size is
765 * exactly this and offset is a multiple of this. For example, an EC
766 * may have a write buffer which can do half-page operations if data is
767 * aligned, and a slower word-at-a-time write mode.
769 uint32_t write_ideal_size;
771 /* Flags; see EC_FLASH_INFO_* */
778 * Response is params.size bytes of data.
780 #define EC_CMD_FLASH_READ 0x11
782 struct ec_params_flash_read {
783 uint32_t offset; /* Byte offset to read */
784 uint32_t size; /* Size to read in bytes */
788 #define EC_CMD_FLASH_WRITE 0x12
789 #define EC_VER_FLASH_WRITE 1
791 /* Version 0 of the flash command supported only 64 bytes of data */
792 #define EC_FLASH_WRITE_VER0_SIZE 64
794 struct ec_params_flash_write {
795 uint32_t offset; /* Byte offset to write */
796 uint32_t size; /* Size to write in bytes */
797 /* Followed by data to write */
801 #define EC_CMD_FLASH_ERASE 0x13
803 struct ec_params_flash_erase {
804 uint32_t offset; /* Byte offset to erase */
805 uint32_t size; /* Size to erase in bytes */
809 * Get/set flash protection.
811 * If mask!=0, sets/clear the requested bits of flags. Depending on the
812 * firmware write protect GPIO, not all flags will take effect immediately;
813 * some flags require a subsequent hard reset to take effect. Check the
814 * returned flags bits to see what actually happened.
816 * If mask=0, simply returns the current flags state.
818 #define EC_CMD_FLASH_PROTECT 0x15
819 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
821 /* Flags for flash protection */
822 /* RO flash code protected when the EC boots */
823 #define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0)
825 * RO flash code protected now. If this bit is set, at-boot status cannot
828 #define EC_FLASH_PROTECT_RO_NOW (1 << 1)
829 /* Entire flash code protected now, until reboot. */
830 #define EC_FLASH_PROTECT_ALL_NOW (1 << 2)
831 /* Flash write protect GPIO is asserted now */
832 #define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3)
833 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
834 #define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4)
836 * Error - flash protection is in inconsistent state. At least one bank of
837 * flash which should be protected is not protected. Usually fixed by
838 * re-requesting the desired flags, or by a hard reset if that fails.
840 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)
841 /* Entile flash code protected when the EC boots */
842 #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6)
844 struct ec_params_flash_protect {
845 uint32_t mask; /* Bits in flags to apply */
846 uint32_t flags; /* New flags to apply */
849 struct ec_response_flash_protect {
850 /* Current value of flash protect flags */
853 * Flags which are valid on this platform. This allows the caller
854 * to distinguish between flags which aren't set vs. flags which can't
855 * be set on this platform.
857 uint32_t valid_flags;
858 /* Flags which can be changed given the current protection state */
859 uint32_t writable_flags;
863 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
864 * write protect. These commands may be reused with version > 0.
867 /* Get the region offset/size */
868 #define EC_CMD_FLASH_REGION_INFO 0x16
869 #define EC_VER_FLASH_REGION_INFO 1
871 enum ec_flash_region {
872 /* Region which holds read-only EC image */
873 EC_FLASH_REGION_RO = 0,
874 /* Region which holds rewritable EC image */
877 * Region which should be write-protected in the factory (a superset of
878 * EC_FLASH_REGION_RO)
880 EC_FLASH_REGION_WP_RO,
881 /* Number of regions */
882 EC_FLASH_REGION_COUNT,
885 struct ec_params_flash_region_info {
886 uint32_t region; /* enum ec_flash_region */
889 struct ec_response_flash_region_info {
894 /* Read/write VbNvContext */
895 #define EC_CMD_VBNV_CONTEXT 0x17
896 #define EC_VER_VBNV_CONTEXT 1
897 #define EC_VBNV_BLOCK_SIZE 16
899 enum ec_vbnvcontext_op {
900 EC_VBNV_CONTEXT_OP_READ,
901 EC_VBNV_CONTEXT_OP_WRITE,
904 struct ec_params_vbnvcontext {
906 uint8_t block[EC_VBNV_BLOCK_SIZE];
909 struct ec_response_vbnvcontext {
910 uint8_t block[EC_VBNV_BLOCK_SIZE];
913 /*****************************************************************************/
916 /* Get fan target RPM */
917 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20
919 struct ec_response_pwm_get_fan_rpm {
923 /* Set target fan RPM */
924 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21
926 struct ec_params_pwm_set_fan_target_rpm {
930 /* Get keyboard backlight */
931 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22
933 struct ec_response_pwm_get_keyboard_backlight {
938 /* Set keyboard backlight */
939 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23
941 struct ec_params_pwm_set_keyboard_backlight {
945 /* Set target fan PWM duty cycle */
946 #define EC_CMD_PWM_SET_FAN_DUTY 0x24
948 struct ec_params_pwm_set_fan_duty {
952 /*****************************************************************************/
954 * Lightbar commands. This looks worse than it is. Since we only use one HOST
955 * command to say "talk to the lightbar", we put the "and tell it to do X" part
956 * into a subcommand. We'll make separate structs for subcommands with
957 * different input args, so that we know how much to expect.
959 #define EC_CMD_LIGHTBAR_CMD 0x28
965 #define LB_BATTERY_LEVELS 4
966 /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a
967 * host command, but the alignment is the same regardless. Keep it that way.
969 struct lightbar_params_v0 {
971 int32_t google_ramp_up;
972 int32_t google_ramp_down;
973 int32_t s3s0_ramp_up;
974 int32_t s0_tick_delay[2]; /* AC=0/1 */
975 int32_t s0a_tick_delay[2]; /* AC=0/1 */
976 int32_t s0s3_ramp_down;
977 int32_t s3_sleep_for;
979 int32_t s3_ramp_down;
983 uint8_t osc_min[2]; /* AC=0/1 */
984 uint8_t osc_max[2]; /* AC=0/1 */
985 uint8_t w_ofs[2]; /* AC=0/1 */
987 /* Brightness limits based on the backlight and AC. */
988 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
989 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
990 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
992 /* Battery level thresholds */
993 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
995 /* Map [AC][battery_level] to color index */
996 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
997 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1000 struct rgb_s color[8]; /* 0-3 are Google colors */
1003 struct lightbar_params_v1 {
1005 int32_t google_ramp_up;
1006 int32_t google_ramp_down;
1007 int32_t s3s0_ramp_up;
1008 int32_t s0_tick_delay[2]; /* AC=0/1 */
1009 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1010 int32_t s0s3_ramp_down;
1011 int32_t s3_sleep_for;
1013 int32_t s3_ramp_down;
1014 int32_t tap_tick_delay;
1015 int32_t tap_display_time;
1017 /* Tap-for-battery params */
1018 uint8_t tap_pct_red;
1019 uint8_t tap_pct_green;
1020 uint8_t tap_seg_min_on;
1021 uint8_t tap_seg_max_on;
1022 uint8_t tap_seg_osc;
1026 uint8_t osc_min[2]; /* AC=0/1 */
1027 uint8_t osc_max[2]; /* AC=0/1 */
1028 uint8_t w_ofs[2]; /* AC=0/1 */
1030 /* Brightness limits based on the backlight and AC. */
1031 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1032 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1033 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1035 /* Battery level thresholds */
1036 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1038 /* Map [AC][battery_level] to color index */
1039 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1040 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1043 struct rgb_s color[8]; /* 0-3 are Google colors */
1046 struct ec_params_lightbar {
1047 uint8_t cmd; /* Command (see enum lightbar_command) */
1051 } dump, off, on, init, get_seq, get_params_v0, get_params_v1,
1052 version, get_brightness, get_demo;
1056 } set_brightness, seq, demo;
1059 uint8_t ctrl, reg, value;
1063 uint8_t led, red, green, blue;
1070 struct lightbar_params_v0 set_params_v0;
1071 struct lightbar_params_v1 set_params_v1;
1075 struct ec_response_lightbar {
1087 } get_seq, get_brightness, get_demo;
1089 struct lightbar_params_v0 get_params_v0;
1090 struct lightbar_params_v1 get_params_v1;
1098 uint8_t red, green, blue;
1102 /* no return params */
1103 } off, on, init, set_brightness, seq, reg, set_rgb,
1104 demo, set_params_v0, set_params_v1;
1108 /* Lightbar commands */
1109 enum lightbar_command {
1110 LIGHTBAR_CMD_DUMP = 0,
1111 LIGHTBAR_CMD_OFF = 1,
1112 LIGHTBAR_CMD_ON = 2,
1113 LIGHTBAR_CMD_INIT = 3,
1114 LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
1115 LIGHTBAR_CMD_SEQ = 5,
1116 LIGHTBAR_CMD_REG = 6,
1117 LIGHTBAR_CMD_SET_RGB = 7,
1118 LIGHTBAR_CMD_GET_SEQ = 8,
1119 LIGHTBAR_CMD_DEMO = 9,
1120 LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
1121 LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
1122 LIGHTBAR_CMD_VERSION = 12,
1123 LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
1124 LIGHTBAR_CMD_GET_RGB = 14,
1125 LIGHTBAR_CMD_GET_DEMO = 15,
1126 LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
1127 LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
1131 /*****************************************************************************/
1132 /* LED control commands */
1134 #define EC_CMD_LED_CONTROL 0x29
1137 /* LED to indicate battery state of charge */
1138 EC_LED_ID_BATTERY_LED = 0,
1140 * LED to indicate system power state (on or in suspend).
1141 * May be on power button or on C-panel.
1143 EC_LED_ID_POWER_LED,
1144 /* LED on power adapter or its plug */
1145 EC_LED_ID_ADAPTER_LED,
1150 /* LED control flags */
1151 #define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */
1152 #define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */
1154 enum ec_led_colors {
1155 EC_LED_COLOR_RED = 0,
1158 EC_LED_COLOR_YELLOW,
1164 struct ec_params_led_control {
1165 uint8_t led_id; /* Which LED to control */
1166 uint8_t flags; /* Control flags */
1168 uint8_t brightness[EC_LED_COLOR_COUNT];
1171 struct ec_response_led_control {
1173 * Available brightness value range.
1175 * Range 0 means color channel not present.
1176 * Range 1 means on/off control.
1177 * Other values means the LED is control by PWM.
1179 uint8_t brightness_range[EC_LED_COLOR_COUNT];
1182 /*****************************************************************************/
1183 /* Verified boot commands */
1186 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
1187 * reused for other purposes with version > 0.
1190 /* Verified boot hash command */
1191 #define EC_CMD_VBOOT_HASH 0x2A
1193 struct ec_params_vboot_hash {
1194 uint8_t cmd; /* enum ec_vboot_hash_cmd */
1195 uint8_t hash_type; /* enum ec_vboot_hash_type */
1196 uint8_t nonce_size; /* Nonce size; may be 0 */
1197 uint8_t reserved0; /* Reserved; set 0 */
1198 uint32_t offset; /* Offset in flash to hash */
1199 uint32_t size; /* Number of bytes to hash */
1200 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */
1203 struct ec_response_vboot_hash {
1204 uint8_t status; /* enum ec_vboot_hash_status */
1205 uint8_t hash_type; /* enum ec_vboot_hash_type */
1206 uint8_t digest_size; /* Size of hash digest in bytes */
1207 uint8_t reserved0; /* Ignore; will be 0 */
1208 uint32_t offset; /* Offset in flash which was hashed */
1209 uint32_t size; /* Number of bytes hashed */
1210 uint8_t hash_digest[64]; /* Hash digest data */
1213 enum ec_vboot_hash_cmd {
1214 EC_VBOOT_HASH_GET = 0, /* Get current hash status */
1215 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */
1216 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */
1217 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */
1220 enum ec_vboot_hash_type {
1221 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
1224 enum ec_vboot_hash_status {
1225 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
1226 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
1227 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
1231 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
1232 * If one of these is specified, the EC will automatically update offset and
1233 * size to the correct values for the specified image (RO or RW).
1235 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
1236 #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd
1238 /*****************************************************************************/
1240 * Motion sense commands. We'll make separate structs for sub-commands with
1241 * different input args, so that we know how much to expect.
1243 #define EC_CMD_MOTION_SENSE_CMD 0x2B
1245 /* Motion sense commands */
1246 enum motionsense_command {
1248 * Dump command returns all motion sensor data including motion sense
1249 * module flags and individual sensor flags.
1251 MOTIONSENSE_CMD_DUMP = 0,
1254 * Info command returns data describing the details of a given sensor,
1255 * including enum motionsensor_type, enum motionsensor_location, and
1256 * enum motionsensor_chip.
1258 MOTIONSENSE_CMD_INFO = 1,
1261 * EC Rate command is a setter/getter command for the EC sampling rate
1262 * of all motion sensors in milliseconds.
1264 MOTIONSENSE_CMD_EC_RATE = 2,
1267 * Sensor ODR command is a setter/getter command for the output data
1268 * rate of a specific motion sensor in millihertz.
1270 MOTIONSENSE_CMD_SENSOR_ODR = 3,
1273 * Sensor range command is a setter/getter command for the range of
1274 * a specified motion sensor in +/-G's or +/- deg/s.
1276 MOTIONSENSE_CMD_SENSOR_RANGE = 4,
1279 * Setter/getter command for the keyboard wake angle. When the lid
1280 * angle is greater than this value, keyboard wake is disabled in S3,
1281 * and when the lid angle goes less than this value, keyboard wake is
1282 * enabled. Note, the lid angle measurement is an approximate,
1283 * un-calibrated value, hence the wake angle isn't exact.
1285 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
1287 /* Number of motionsense sub-commands. */
1288 MOTIONSENSE_NUM_CMDS
1291 enum motionsensor_id {
1292 EC_MOTION_SENSOR_ACCEL_BASE = 0,
1293 EC_MOTION_SENSOR_ACCEL_LID = 1,
1294 EC_MOTION_SENSOR_GYRO = 2,
1297 * Note, if more sensors are added and this count changes, the padding
1298 * in ec_response_motion_sense dump command must be modified.
1300 EC_MOTION_SENSOR_COUNT = 3
1303 /* List of motion sensor types. */
1304 enum motionsensor_type {
1305 MOTIONSENSE_TYPE_ACCEL = 0,
1306 MOTIONSENSE_TYPE_GYRO = 1,
1309 /* List of motion sensor locations. */
1310 enum motionsensor_location {
1311 MOTIONSENSE_LOC_BASE = 0,
1312 MOTIONSENSE_LOC_LID = 1,
1315 /* List of motion sensor chips. */
1316 enum motionsensor_chip {
1317 MOTIONSENSE_CHIP_KXCJ9 = 0,
1320 /* Module flag masks used for the dump sub-command. */
1321 #define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)
1323 /* Sensor flag masks used for the dump sub-command. */
1324 #define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)
1327 * Send this value for the data element to only perform a read. If you
1328 * send any other value, the EC will interpret it as data to set and will
1329 * return the actual value set.
1331 #define EC_MOTION_SENSE_NO_VALUE -1
1333 struct ec_params_motion_sense {
1336 /* Used for MOTIONSENSE_CMD_DUMP. */
1342 * Used for MOTIONSENSE_CMD_EC_RATE and
1343 * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
1346 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
1348 } ec_rate, kb_wake_angle;
1350 /* Used for MOTIONSENSE_CMD_INFO. */
1352 /* Should be element of enum motionsensor_id. */
1357 * Used for MOTIONSENSE_CMD_SENSOR_ODR and
1358 * MOTIONSENSE_CMD_SENSOR_RANGE.
1361 /* Should be element of enum motionsensor_id. */
1364 /* Rounding flag, true for round-up, false for down. */
1369 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
1371 } sensor_odr, sensor_range;
1375 struct ec_response_motion_sense {
1377 /* Used for MOTIONSENSE_CMD_DUMP. */
1379 /* Flags representing the motion sensor module. */
1380 uint8_t module_flags;
1382 /* Flags for each sensor in enum motionsensor_id. */
1383 uint8_t sensor_flags[EC_MOTION_SENSOR_COUNT];
1385 /* Array of all sensor data. Each sensor is 3-axis. */
1386 int16_t data[3*EC_MOTION_SENSOR_COUNT];
1389 /* Used for MOTIONSENSE_CMD_INFO. */
1391 /* Should be element of enum motionsensor_type. */
1394 /* Should be element of enum motionsensor_location. */
1397 /* Should be element of enum motionsensor_chip. */
1402 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
1403 * MOTIONSENSE_CMD_SENSOR_RANGE, and
1404 * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
1407 /* Current value of the parameter queried. */
1409 } ec_rate, sensor_odr, sensor_range, kb_wake_angle;
1413 /*****************************************************************************/
1414 /* USB charging control commands */
1416 /* Set USB port charging mode */
1417 #define EC_CMD_USB_CHARGE_SET_MODE 0x30
1419 struct ec_params_usb_charge_set_mode {
1420 uint8_t usb_port_id;
1424 /*****************************************************************************/
1425 /* Persistent storage for host */
1427 /* Maximum bytes that can be read/written in a single command */
1428 #define EC_PSTORE_SIZE_MAX 64
1430 /* Get persistent storage info */
1431 #define EC_CMD_PSTORE_INFO 0x40
1433 struct ec_response_pstore_info {
1434 /* Persistent storage size, in bytes */
1435 uint32_t pstore_size;
1436 /* Access size; read/write offset and size must be a multiple of this */
1437 uint32_t access_size;
1441 * Read persistent storage
1443 * Response is params.size bytes of data.
1445 #define EC_CMD_PSTORE_READ 0x41
1447 struct ec_params_pstore_read {
1448 uint32_t offset; /* Byte offset to read */
1449 uint32_t size; /* Size to read in bytes */
1452 /* Write persistent storage */
1453 #define EC_CMD_PSTORE_WRITE 0x42
1455 struct ec_params_pstore_write {
1456 uint32_t offset; /* Byte offset to write */
1457 uint32_t size; /* Size to write in bytes */
1458 uint8_t data[EC_PSTORE_SIZE_MAX];
1461 /*****************************************************************************/
1462 /* Real-time clock */
1464 /* RTC params and response structures */
1465 struct ec_params_rtc {
1469 struct ec_response_rtc {
1473 /* These use ec_response_rtc */
1474 #define EC_CMD_RTC_GET_VALUE 0x44
1475 #define EC_CMD_RTC_GET_ALARM 0x45
1477 /* These all use ec_params_rtc */
1478 #define EC_CMD_RTC_SET_VALUE 0x46
1479 #define EC_CMD_RTC_SET_ALARM 0x47
1481 /*****************************************************************************/
1482 /* Port80 log access */
1484 /* Maximum entries that can be read/written in a single command */
1485 #define EC_PORT80_SIZE_MAX 32
1487 /* Get last port80 code from previous boot */
1488 #define EC_CMD_PORT80_LAST_BOOT 0x48
1489 #define EC_CMD_PORT80_READ 0x48
1491 enum ec_port80_subcmd {
1492 EC_PORT80_GET_INFO = 0,
1493 EC_PORT80_READ_BUFFER,
1496 struct ec_params_port80_read {
1501 uint32_t num_entries;
1506 struct ec_response_port80_read {
1510 uint32_t history_size;
1514 uint16_t codes[EC_PORT80_SIZE_MAX];
1519 struct ec_response_port80_last_boot {
1523 /*****************************************************************************/
1524 /* Thermal engine commands. Note that there are two implementations. We'll
1525 * reuse the command number, but the data and behavior is incompatible.
1526 * Version 0 is what originally shipped on Link.
1527 * Version 1 separates the CPU thermal limits from the fan control.
1530 #define EC_CMD_THERMAL_SET_THRESHOLD 0x50
1531 #define EC_CMD_THERMAL_GET_THRESHOLD 0x51
1533 /* The version 0 structs are opaque. You have to know what they are for
1534 * the get/set commands to make any sense.
1537 /* Version 0 - set */
1538 struct ec_params_thermal_set_threshold {
1539 uint8_t sensor_type;
1540 uint8_t threshold_id;
1544 /* Version 0 - get */
1545 struct ec_params_thermal_get_threshold {
1546 uint8_t sensor_type;
1547 uint8_t threshold_id;
1550 struct ec_response_thermal_get_threshold {
1555 /* The version 1 structs are visible. */
1556 enum ec_temp_thresholds {
1557 EC_TEMP_THRESH_WARN = 0,
1558 EC_TEMP_THRESH_HIGH,
1559 EC_TEMP_THRESH_HALT,
1561 EC_TEMP_THRESH_COUNT
1564 /* Thermal configuration for one temperature sensor. Temps are in degrees K.
1565 * Zero values will be silently ignored by the thermal task.
1567 struct ec_thermal_config {
1568 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
1569 uint32_t temp_fan_off; /* no active cooling needed */
1570 uint32_t temp_fan_max; /* max active cooling needed */
1573 /* Version 1 - get config for one sensor. */
1574 struct ec_params_thermal_get_threshold_v1 {
1575 uint32_t sensor_num;
1577 /* This returns a struct ec_thermal_config */
1579 /* Version 1 - set config for one sensor.
1580 * Use read-modify-write for best results! */
1581 struct ec_params_thermal_set_threshold_v1 {
1582 uint32_t sensor_num;
1583 struct ec_thermal_config cfg;
1585 /* This returns no data */
1587 /****************************************************************************/
1589 /* Toggle automatic fan control */
1590 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52
1592 /* Get TMP006 calibration data */
1593 #define EC_CMD_TMP006_GET_CALIBRATION 0x53
1595 struct ec_params_tmp006_get_calibration {
1599 struct ec_response_tmp006_get_calibration {
1606 /* Set TMP006 calibration data */
1607 #define EC_CMD_TMP006_SET_CALIBRATION 0x54
1609 struct ec_params_tmp006_set_calibration {
1611 uint8_t reserved[3]; /* Reserved; set 0 */
1618 /* Read raw TMP006 data */
1619 #define EC_CMD_TMP006_GET_RAW 0x55
1621 struct ec_params_tmp006_get_raw {
1625 struct ec_response_tmp006_get_raw {
1626 int32_t t; /* In 1/100 K */
1627 int32_t v; /* In nV */
1630 /*****************************************************************************/
1631 /* MKBP - Matrix KeyBoard Protocol */
1636 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
1637 * expected response size.
1639 #define EC_CMD_MKBP_STATE 0x60
1641 /* Provide information about the matrix : number of rows and columns */
1642 #define EC_CMD_MKBP_INFO 0x61
1644 struct ec_response_mkbp_info {
1650 /* Simulate key press */
1651 #define EC_CMD_MKBP_SIMULATE_KEY 0x62
1653 struct ec_params_mkbp_simulate_key {
1659 /* Configure keyboard scanning */
1660 #define EC_CMD_MKBP_SET_CONFIG 0x64
1661 #define EC_CMD_MKBP_GET_CONFIG 0x65
1664 enum mkbp_config_flags {
1665 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */
1668 enum mkbp_config_valid {
1669 EC_MKBP_VALID_SCAN_PERIOD = 1 << 0,
1670 EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1,
1671 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3,
1672 EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4,
1673 EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5,
1674 EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6,
1675 EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7,
1678 /* Configuration for our key scanning algorithm */
1679 struct ec_mkbp_config {
1680 uint32_t valid_mask; /* valid fields */
1681 uint8_t flags; /* some flags (enum mkbp_config_flags) */
1682 uint8_t valid_flags; /* which flags are valid */
1683 uint16_t scan_period_us; /* period between start of scans */
1684 /* revert to interrupt mode after no activity for this long */
1685 uint32_t poll_timeout_us;
1687 * minimum post-scan relax time. Once we finish a scan we check
1688 * the time until we are due to start the next one. If this time is
1689 * shorter this field, we use this instead.
1691 uint16_t min_post_scan_delay_us;
1692 /* delay between setting up output and waiting for it to settle */
1693 uint16_t output_settle_us;
1694 uint16_t debounce_down_us; /* time for debounce on key down */
1695 uint16_t debounce_up_us; /* time for debounce on key up */
1696 /* maximum depth to allow for fifo (0 = no keyscan output) */
1697 uint8_t fifo_max_depth;
1700 struct ec_params_mkbp_set_config {
1701 struct ec_mkbp_config config;
1704 struct ec_response_mkbp_get_config {
1705 struct ec_mkbp_config config;
1708 /* Run the key scan emulation */
1709 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x66
1711 enum ec_keyscan_seq_cmd {
1712 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */
1713 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */
1714 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */
1715 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */
1716 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */
1719 enum ec_collect_flags {
1721 * Indicates this scan was processed by the EC. Due to timing, some
1722 * scans may be skipped.
1724 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0,
1727 struct ec_collect_item {
1728 uint8_t flags; /* some flags (enum ec_collect_flags) */
1731 struct ec_params_keyscan_seq_ctrl {
1732 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */
1735 uint8_t active; /* still active */
1736 uint8_t num_items; /* number of items */
1737 /* Current item being presented */
1742 * Absolute time for this scan, measured from the
1743 * start of the sequence.
1746 uint8_t scan[0]; /* keyscan data */
1749 uint8_t start_item; /* First item to return */
1750 uint8_t num_items; /* Number of items to return */
1755 struct ec_result_keyscan_seq_ctrl {
1758 uint8_t num_items; /* Number of items */
1759 /* Data for each item */
1760 struct ec_collect_item item[0];
1765 /*****************************************************************************/
1766 /* Temperature sensor commands */
1768 /* Read temperature sensor info */
1769 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x70
1771 struct ec_params_temp_sensor_get_info {
1775 struct ec_response_temp_sensor_get_info {
1776 char sensor_name[32];
1777 uint8_t sensor_type;
1780 /*****************************************************************************/
1783 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
1784 * commands accidentally sent to the wrong interface. See the ACPI section
1788 /*****************************************************************************/
1789 /* Host event commands */
1792 * Host event mask params and response structures, shared by all of the host
1793 * event commands below.
1795 struct ec_params_host_event_mask {
1799 struct ec_response_host_event_mask {
1803 /* These all use ec_response_host_event_mask */
1804 #define EC_CMD_HOST_EVENT_GET_B 0x87
1805 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88
1806 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89
1807 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d
1809 /* These all use ec_params_host_event_mask */
1810 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a
1811 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b
1812 #define EC_CMD_HOST_EVENT_CLEAR 0x8c
1813 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e
1814 #define EC_CMD_HOST_EVENT_CLEAR_B 0x8f
1816 /*****************************************************************************/
1817 /* Switch commands */
1819 /* Enable/disable LCD backlight */
1820 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90
1822 struct ec_params_switch_enable_backlight {
1826 /* Enable/disable WLAN/Bluetooth */
1827 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91
1828 #define EC_VER_SWITCH_ENABLE_WIRELESS 1
1830 /* Version 0 params; no response */
1831 struct ec_params_switch_enable_wireless_v0 {
1835 /* Version 1 params */
1836 struct ec_params_switch_enable_wireless_v1 {
1837 /* Flags to enable now */
1840 /* Which flags to copy from now_flags */
1844 * Flags to leave enabled in S3, if they're on at the S0->S3
1845 * transition. (Other flags will be disabled by the S0->S3
1848 uint8_t suspend_flags;
1850 /* Which flags to copy from suspend_flags */
1851 uint8_t suspend_mask;
1854 /* Version 1 response */
1855 struct ec_response_switch_enable_wireless_v1 {
1856 /* Flags to enable now */
1859 /* Flags to leave enabled in S3 */
1860 uint8_t suspend_flags;
1863 /*****************************************************************************/
1864 /* GPIO commands. Only available on EC if write protect has been disabled. */
1866 /* Set GPIO output value */
1867 #define EC_CMD_GPIO_SET 0x92
1869 struct ec_params_gpio_set {
1874 /* Get GPIO value */
1875 #define EC_CMD_GPIO_GET 0x93
1877 /* Version 0 of input params and response */
1878 struct ec_params_gpio_get {
1881 struct ec_response_gpio_get {
1885 /* Version 1 of input params and response */
1886 struct ec_params_gpio_get_v1 {
1891 } get_value_by_name;
1898 struct ec_response_gpio_get_v1 {
1902 } get_value_by_name, get_count;
1911 enum gpio_get_subcmd {
1912 EC_GPIO_GET_BY_NAME = 0,
1913 EC_GPIO_GET_COUNT = 1,
1914 EC_GPIO_GET_INFO = 2,
1917 /*****************************************************************************/
1918 /* I2C commands. Only available when flash write protect is unlocked. */
1921 * TODO(crosbug.com/p/23570): These commands are deprecated, and will be
1922 * removed soon. Use EC_CMD_I2C_XFER instead.
1926 #define EC_CMD_I2C_READ 0x94
1928 struct ec_params_i2c_read {
1929 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
1930 uint8_t read_size; /* Either 8 or 16. */
1934 struct ec_response_i2c_read {
1939 #define EC_CMD_I2C_WRITE 0x95
1941 struct ec_params_i2c_write {
1943 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
1944 uint8_t write_size; /* Either 8 or 16. */
1949 /*****************************************************************************/
1950 /* Charge state commands. Only available when flash write protect unlocked. */
1952 /* Force charge state machine to stop charging the battery or force it to
1953 * discharge the battery.
1955 #define EC_CMD_CHARGE_CONTROL 0x96
1956 #define EC_VER_CHARGE_CONTROL 1
1958 enum ec_charge_control_mode {
1959 CHARGE_CONTROL_NORMAL = 0,
1960 CHARGE_CONTROL_IDLE,
1961 CHARGE_CONTROL_DISCHARGE,
1964 struct ec_params_charge_control {
1965 uint32_t mode; /* enum charge_control_mode */
1968 /*****************************************************************************/
1969 /* Console commands. Only available when flash write protect is unlocked. */
1971 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
1972 #define EC_CMD_CONSOLE_SNAPSHOT 0x97
1975 * Read next chunk of data from saved snapshot.
1977 * Response is null-terminated string. Empty string, if there is no more
1980 #define EC_CMD_CONSOLE_READ 0x98
1982 /*****************************************************************************/
1985 * Cut off battery power immediately or after the host has shut down.
1987 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
1988 * EC_RES_SUCCESS if the command was successful.
1989 * EC_RES_ERROR if the cut off command failed.
1992 #define EC_CMD_BATTERY_CUT_OFF 0x99
1994 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0)
1996 struct ec_params_battery_cutoff {
2000 /*****************************************************************************/
2001 /* USB port mux control. */
2004 * Switch USB mux or return to automatic switching.
2006 #define EC_CMD_USB_MUX 0x9a
2008 struct ec_params_usb_mux {
2012 /*****************************************************************************/
2013 /* LDOs / FETs control. */
2016 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */
2017 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */
2021 * Switch on/off a LDO.
2023 #define EC_CMD_LDO_SET 0x9b
2025 struct ec_params_ldo_set {
2033 #define EC_CMD_LDO_GET 0x9c
2035 struct ec_params_ldo_get {
2039 struct ec_response_ldo_get {
2043 /*****************************************************************************/
2049 #define EC_CMD_POWER_INFO 0x9d
2051 struct ec_response_power_info {
2052 uint32_t usb_dev_type;
2053 uint16_t voltage_ac;
2054 uint16_t voltage_system;
2055 uint16_t current_system;
2056 uint16_t usb_current_limit;
2059 /*****************************************************************************/
2060 /* I2C passthru command */
2062 #define EC_CMD_I2C_PASSTHRU 0x9e
2064 /* Read data; if not present, message is a write */
2065 #define EC_I2C_FLAG_READ (1 << 15)
2067 /* Mask for address */
2068 #define EC_I2C_ADDR_MASK 0x3ff
2070 #define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */
2071 #define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */
2074 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
2076 struct ec_params_i2c_passthru_msg {
2077 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */
2078 uint16_t len; /* Number of bytes to read or write */
2081 struct ec_params_i2c_passthru {
2082 uint8_t port; /* I2C port number */
2083 uint8_t num_msgs; /* Number of messages */
2084 struct ec_params_i2c_passthru_msg msg[];
2085 /* Data to write for all messages is concatenated here */
2088 struct ec_response_i2c_passthru {
2089 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */
2090 uint8_t num_msgs; /* Number of messages processed */
2091 uint8_t data[]; /* Data read by messages concatenated here */
2094 /*****************************************************************************/
2095 /* Power button hang detect */
2097 #define EC_CMD_HANG_DETECT 0x9f
2099 /* Reasons to start hang detection timer */
2100 /* Power button pressed */
2101 #define EC_HANG_START_ON_POWER_PRESS (1 << 0)
2104 #define EC_HANG_START_ON_LID_CLOSE (1 << 1)
2107 #define EC_HANG_START_ON_LID_OPEN (1 << 2)
2109 /* Start of AP S3->S0 transition (booting or resuming from suspend) */
2110 #define EC_HANG_START_ON_RESUME (1 << 3)
2112 /* Reasons to cancel hang detection */
2114 /* Power button released */
2115 #define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)
2117 /* Any host command from AP received */
2118 #define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9)
2120 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */
2121 #define EC_HANG_STOP_ON_SUSPEND (1 << 10)
2124 * If this flag is set, all the other fields are ignored, and the hang detect
2125 * timer is started. This provides the AP a way to start the hang timer
2126 * without reconfiguring any of the other hang detect settings. Note that
2127 * you must previously have configured the timeouts.
2129 #define EC_HANG_START_NOW (1 << 30)
2132 * If this flag is set, all the other fields are ignored (including
2133 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer
2134 * without reconfiguring any of the other hang detect settings.
2136 #define EC_HANG_STOP_NOW (1 << 31)
2138 struct ec_params_hang_detect {
2139 /* Flags; see EC_HANG_* */
2142 /* Timeout in msec before generating host event, if enabled */
2143 uint16_t host_event_timeout_msec;
2145 /* Timeout in msec before generating warm reboot, if enabled */
2146 uint16_t warm_reboot_timeout_msec;
2149 /*****************************************************************************/
2150 /* Commands for battery charging */
2153 * This is the single catch-all host command to exchange data regarding the
2154 * charge state machine (v2 and up).
2156 #define EC_CMD_CHARGE_STATE 0xa0
2158 /* Subcommands for this host command */
2159 enum charge_state_command {
2160 CHARGE_STATE_CMD_GET_STATE,
2161 CHARGE_STATE_CMD_GET_PARAM,
2162 CHARGE_STATE_CMD_SET_PARAM,
2163 CHARGE_STATE_NUM_CMDS
2167 * Known param numbers are defined here. Ranges are reserved for board-specific
2168 * params, which are handled by the particular implementations.
2170 enum charge_state_params {
2171 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */
2172 CS_PARAM_CHG_CURRENT, /* charger current limit */
2173 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */
2174 CS_PARAM_CHG_STATUS, /* charger-specific status */
2175 CS_PARAM_CHG_OPTION, /* charger-specific options */
2176 /* How many so far? */
2179 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
2180 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
2181 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
2183 /* Other custom param ranges go here... */
2186 struct ec_params_charge_state {
2187 uint8_t cmd; /* enum charge_state_command */
2194 uint32_t param; /* enum charge_state_param */
2198 uint32_t param; /* param to set */
2199 uint32_t value; /* value to set */
2204 struct ec_response_charge_state {
2210 int chg_input_current;
2211 int batt_state_of_charge;
2218 /* no return values */
2225 * Set maximum battery charging current.
2227 #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1
2229 struct ec_params_current_limit {
2230 uint32_t limit; /* in mA */
2234 * Set maximum external power current.
2236 #define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2
2238 struct ec_params_ext_power_current_limit {
2239 uint32_t limit; /* in mA */
2242 /*****************************************************************************/
2243 /* Smart battery pass-through */
2245 /* Get / Set 16-bit smart battery registers */
2246 #define EC_CMD_SB_READ_WORD 0xb0
2247 #define EC_CMD_SB_WRITE_WORD 0xb1
2249 /* Get / Set string smart battery parameters
2250 * formatted as SMBUS "block".
2252 #define EC_CMD_SB_READ_BLOCK 0xb2
2253 #define EC_CMD_SB_WRITE_BLOCK 0xb3
2255 struct ec_params_sb_rd {
2259 struct ec_response_sb_rd_word {
2263 struct ec_params_sb_wr_word {
2268 struct ec_response_sb_rd_block {
2272 struct ec_params_sb_wr_block {
2277 /*****************************************************************************/
2278 /* Battery vendor parameters
2280 * Get or set vendor-specific parameters in the battery. Implementations may
2281 * differ between boards or batteries. On a set operation, the response
2282 * contains the actual value set, which may be rounded or clipped from the
2286 #define EC_CMD_BATTERY_VENDOR_PARAM 0xb4
2288 enum ec_battery_vendor_param_mode {
2289 BATTERY_VENDOR_PARAM_MODE_GET = 0,
2290 BATTERY_VENDOR_PARAM_MODE_SET,
2293 struct ec_params_battery_vendor_param {
2299 struct ec_response_battery_vendor_param {
2303 /*****************************************************************************/
2304 /* System commands */
2307 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
2308 * necessarily reboot the EC. Rename to "image" or something similar?
2310 #define EC_CMD_REBOOT_EC 0xd2
2313 enum ec_reboot_cmd {
2314 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */
2315 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */
2316 EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */
2317 /* (command 3 was jump to RW-B) */
2318 EC_REBOOT_COLD = 4, /* Cold-reboot */
2319 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */
2320 EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */
2323 /* Flags for ec_params_reboot_ec.reboot_flags */
2324 #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */
2325 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */
2327 struct ec_params_reboot_ec {
2328 uint8_t cmd; /* enum ec_reboot_cmd */
2329 uint8_t flags; /* See EC_REBOOT_FLAG_* */
2333 * Get information on last EC panic.
2335 * Returns variable-length platform-dependent panic information. See panic.h
2338 #define EC_CMD_GET_PANIC_INFO 0xd3
2340 /*****************************************************************************/
2344 * These are valid ONLY on the ACPI command/data port.
2348 * ACPI Read Embedded Controller
2350 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
2352 * Use the following sequence:
2354 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
2355 * - Wait for EC_LPC_CMDR_PENDING bit to clear
2356 * - Write address to EC_LPC_ADDR_ACPI_DATA
2357 * - Wait for EC_LPC_CMDR_DATA bit to set
2358 * - Read value from EC_LPC_ADDR_ACPI_DATA
2360 #define EC_CMD_ACPI_READ 0x80
2363 * ACPI Write Embedded Controller
2365 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
2367 * Use the following sequence:
2369 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
2370 * - Wait for EC_LPC_CMDR_PENDING bit to clear
2371 * - Write address to EC_LPC_ADDR_ACPI_DATA
2372 * - Wait for EC_LPC_CMDR_PENDING bit to clear
2373 * - Write value to EC_LPC_ADDR_ACPI_DATA
2375 #define EC_CMD_ACPI_WRITE 0x81
2378 * ACPI Query Embedded Controller
2380 * This clears the lowest-order bit in the currently pending host events, and
2381 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
2382 * event 0x80000000 = 32), or 0 if no event was pending.
2384 #define EC_CMD_ACPI_QUERY_EVENT 0x84
2386 /* Valid addresses in ACPI memory space, for read/write commands */
2388 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
2389 #define EC_ACPI_MEM_VERSION 0x00
2391 * Test location; writing value here updates test compliment byte to (0xff -
2394 #define EC_ACPI_MEM_TEST 0x01
2395 /* Test compliment; writes here are ignored. */
2396 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
2398 /* Keyboard backlight brightness percent (0 - 100) */
2399 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
2400 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
2401 #define EC_ACPI_MEM_FAN_DUTY 0x04
2404 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
2405 * independent thresholds attached to them. The current value of the ID
2406 * register determines which sensor is affected by the THRESHOLD and COMMIT
2407 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
2408 * as the memory-mapped sensors. The COMMIT register applies those settings.
2410 * The spec does not mandate any way to read back the threshold settings
2411 * themselves, but when a threshold is crossed the AP needs a way to determine
2412 * which sensor(s) are responsible. Each reading of the ID register clears and
2413 * returns one sensor ID that has crossed one of its threshold (in either
2414 * direction) since the last read. A value of 0xFF means "no new thresholds
2415 * have tripped". Setting or enabling the thresholds for a sensor will clear
2416 * the unread event count for that sensor.
2418 #define EC_ACPI_MEM_TEMP_ID 0x05
2419 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
2420 #define EC_ACPI_MEM_TEMP_COMMIT 0x07
2422 * Here are the bits for the COMMIT register:
2423 * bit 0 selects the threshold index for the chosen sensor (0/1)
2424 * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
2425 * Each write to the commit register affects one threshold.
2427 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
2428 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
2432 * Set the thresholds for sensor 2 to 50 C and 60 C:
2433 * write 2 to [0x05] -- select temp sensor 2
2434 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
2435 * write 0x2 to [0x07] -- enable threshold 0 with this value
2436 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
2437 * write 0x3 to [0x07] -- enable threshold 1 with this value
2439 * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
2440 * write 2 to [0x05] -- select temp sensor 2
2441 * write 0x1 to [0x07] -- disable threshold 1
2444 /* DPTF battery charging current limit */
2445 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08
2447 /* Charging limit is specified in 64 mA steps */
2448 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
2449 /* Value to disable DPTF battery charging limit */
2450 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
2452 /* Current version of ACPI memory address space */
2453 #define EC_ACPI_MEM_VERSION_CURRENT 1
2456 /*****************************************************************************/
2460 * These do not follow the normal rules for commands. See each command for
2467 * This command will work even when the EC LPC interface is busy, because the
2468 * reboot command is processed at interrupt level. Note that when the EC
2469 * reboots, the host will reboot too, so there is no response to this command.
2471 * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
2473 #define EC_CMD_REBOOT 0xd1 /* Think "die" */
2476 * Resend last response (not supported on LPC).
2478 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
2479 * there was no previous command, or the previous command's response was too
2482 #define EC_CMD_RESEND_RESPONSE 0xdb
2485 * This header byte on a command indicate version 0. Any header byte less
2486 * than this means that we are talking to an old EC which doesn't support
2487 * versioning. In that case, we assume version 0.
2489 * Header bytes greater than this indicate a later version. For example,
2490 * EC_CMD_VERSION0 + 1 means we are using version 1.
2492 * The old EC interface must not use commands 0xdc or higher.
2494 #define EC_CMD_VERSION0 0xdc
2496 #endif /* !__ACPI__ */
2498 /*****************************************************************************/
2502 * These commands are for PD MCU communication.
2505 /* EC to PD MCU exchange status command */
2506 #define EC_CMD_PD_EXCHANGE_STATUS 0x100
2508 /* Status of EC being sent to PD */
2509 struct ec_params_pd_status {
2510 int8_t batt_soc; /* battery state of charge */
2513 /* Status of PD being sent back to EC */
2514 struct ec_response_pd_status {
2515 int8_t status; /* PD MCU status */
2516 uint32_t curr_lim_ma; /* input current limit */
2519 /* Set USB type-C port role and muxes */
2520 #define EC_CMD_USB_PD_CONTROL 0x101
2522 enum usb_pd_control_role {
2523 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
2524 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */
2525 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
2526 USB_PD_CTRL_ROLE_FORCE_SINK = 3,
2527 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
2530 enum usb_pd_control_mux {
2531 USB_PD_CTRL_MUX_NO_CHANGE = 0,
2532 USB_PD_CTRL_MUX_NONE = 1,
2533 USB_PD_CTRL_MUX_USB = 2,
2534 USB_PD_CTRL_MUX_DP = 3,
2535 USB_PD_CTRL_MUX_DOCK = 4,
2536 USB_PD_CTRL_MUX_AUTO = 5,
2539 struct ec_params_usb_pd_control {
2545 /*****************************************************************************/
2549 * Some platforms have sub-processors chained to each other. For example.
2551 * AP <--> EC <--> PD MCU
2553 * The top 2 bits of the command number are used to indicate which device the
2554 * command is intended for. Device 0 is always the device receiving the
2555 * command; other device mapping is board-specific.
2557 * When a device receives a command to be passed to a sub-processor, it passes
2558 * it on with the device number set back to 0. This allows the sub-processor
2559 * to remain blissfully unaware of whether the command originated on the next
2560 * device up the chain, or was passed through from the AP.
2562 * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
2563 * AP sends command 0x4002 to the EC
2564 * EC sends command 0x0002 to the PD MCU
2565 * EC forwards PD MCU response back to the AP
2568 /* Offset and max command number for sub-device n */
2569 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
2570 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
2572 /*****************************************************************************/
2574 * Deprecated constants. These constants have been renamed for clarity. The
2575 * meaning and size has not changed. Programs that use the old names should
2576 * switch to the new names soon, as the old names may not be carried forward
2579 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
2580 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
2581 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
2583 #endif /* __CROS_EC_COMMANDS_H */