2 * include/linux/mfd/ricoh619.h
4 * Core driver interface to access RICOH RC5T619 power management chip.
6 * Copyright (C) 2012-2013 RICOH COMPANY,LTD
9 * Copyright (C) 2011 NVIDIA Corporation
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
27 #ifndef __LINUX_MFD_RICOH619_H
28 #define __LINUX_MFD_RICOH619_H
30 #include <linux/mutex.h>
31 #include <linux/types.h>
32 #include <linux/gpio.h>
33 #include <linux/i2c.h>
35 /* Maximum number of main interrupts */
36 #define MAX_INTERRUPT_MASKS 13
37 #define MAX_MAIN_INTERRUPT 7
38 #define MAX_GPEDGE_REG 2
40 /* Power control register */
41 #define RICOH619_PWR_WD 0x0B
42 #define RICOH619_PWR_WD_COUNT 0x0C
43 #define RICOH619_PWR_FUNC 0x0D
44 #define RICOH619_PWR_SLP_CNT 0x0E
45 #define RICOH619_PWR_REP_CNT 0x0F
46 #define RICOH619_PWR_ON_TIMSET 0x10
47 #define RICOH619_PWR_NOE_TIMSET 0x11
48 #define RICOH619_PWR_IRSEL 0x15
50 /* Interrupt enable register */
51 #define RICOH619_INT_EN_SYS 0x12
52 #define RICOH619_INT_EN_DCDC 0x40
53 #define RICOH619_INT_EN_RTC 0xAE
54 #define RICOH619_INT_EN_ADC1 0x88
55 #define RICOH619_INT_EN_ADC2 0x89
56 #define RICOH619_INT_EN_ADC3 0x8A
57 #define RICOH619_INT_EN_GPIO 0x94
58 #define RICOH619_INT_EN_GPIO2 0x94 // dummy
59 #define RICOH619_INT_MSK_CHGCTR 0xBE
60 #define RICOH619_INT_MSK_CHGSTS1 0xBF
61 #define RICOH619_INT_MSK_CHGSTS2 0xC0
62 #define RICOH619_INT_MSK_CHGERR 0xC1
63 #define RICOH619_INT_MSK_CHGEXTIF 0xD1
65 /* Interrupt select register */
66 #define RICOH619_PWR_IRSEL 0x15
67 #define RICOH619_CHG_CTRL_DETMOD1 0xCA
68 #define RICOH619_CHG_CTRL_DETMOD2 0xCB
69 #define RICOH619_CHG_STAT_DETMOD1 0xCC
70 #define RICOH619_CHG_STAT_DETMOD2 0xCD
71 #define RICOH619_CHG_STAT_DETMOD3 0xCE
74 /* interrupt status registers (monitor regs)*/
75 #define RICOH619_INTC_INTPOL 0x9C
76 #define RICOH619_INTC_INTEN 0x9D
77 #define RICOH619_INTC_INTMON 0x9E
79 #define RICOH619_INT_MON_SYS 0x14
80 #define RICOH619_INT_MON_DCDC 0x42
81 #define RICOH619_INT_MON_RTC 0xAF
83 #define RICOH619_INT_MON_CHGCTR 0xC6
84 #define RICOH619_INT_MON_CHGSTS1 0xC7
85 #define RICOH619_INT_MON_CHGSTS2 0xC8
86 #define RICOH619_INT_MON_CHGERR 0xC9
87 #define RICOH619_INT_MON_CHGEXTIF 0xD3
89 /* interrupt clearing registers */
90 #define RICOH619_INT_IR_SYS 0x13
91 #define RICOH619_INT_IR_DCDC 0x41
92 #define RICOH619_INT_IR_RTC 0xAF
93 #define RICOH619_INT_IR_ADCL 0x8C
94 #define RICOH619_INT_IR_ADCH 0x8D
95 #define RICOH619_INT_IR_ADCEND 0x8E
96 #define RICOH619_INT_IR_GPIOR 0x95
97 #define RICOH619_INT_IR_GPIOF 0x96
98 #define RICOH619_INT_IR_CHGCTR 0xC2
99 #define RICOH619_INT_IR_CHGSTS1 0xC3
100 #define RICOH619_INT_IR_CHGSTS2 0xC4
101 #define RICOH619_INT_IR_CHGERR 0xC5
102 #define RICOH619_INT_IR_CHGEXTIF 0xD2
104 /* GPIO register base address */
105 #define RICOH619_GPIO_IOSEL 0x90
106 #define RICOH619_GPIO_IOOUT 0x91
107 #define RICOH619_GPIO_GPEDGE1 0x92
108 #define RICOH619_GPIO_GPEDGE2 0x93
109 //#define RICOH619_GPIO_EN_GPIR 0x94
110 //#define RICOH619_GPIO_IR_GPR 0x95
111 //#define RICOH619_GPIO_IR_GPF 0x96
112 #define RICOH619_GPIO_MON_IOIN 0x97
113 #define RICOH619_GPIO_LED_FUNC 0x98
115 #define RICOH619_REG_BANKSEL 0xFF
117 /* Charger Control register */
118 #define RICOH619_CHG_CTL1 0xB3
119 #define TIMSET_REG 0xB9
121 /* ADC Control register */
122 #define RICOH619_ADC_CNT1 0x64
123 #define RICOH619_ADC_CNT2 0x65
124 #define RICOH619_ADC_CNT3 0x66
125 #define RICOH619_ADC_VADP_THL 0x7C
126 #define RICOH619_ADC_VSYS_THL 0x80
128 #define RICOH619_FG_CTRL 0xE0
129 #define RICOH619_PSWR 0x07
131 #define RICOH_DC1_SLOT 0x16
132 #define RICOH_DC2_SLOT 0x17
133 #define RICOH_DC3_SLOT 0x18
134 #define RICOH_DC4_SLOT 0x19
135 #define RICOH_DC5_SLOT 0x1a
137 #define RICOH_LDO1_SLOT 0x1b
138 #define RICOH_LDO2_SLOT 0x1c
139 #define RICOH_LDO3_SLOT 0x1d
140 #define RICOH_LDO4_SLOT 0x1e
141 #define RICOH_LDO5_SLOT 0x1f
142 #define RICOH_LDO6_SLOT 0x20
143 #define RICOH_LDO7_SLOT 0x21
144 #define RICOH_LDO8_SLOT 0x22
145 #define RICOH_LDO9_SLOT 0x23
146 #define RICOH_LDO10_SLOT 0x24
148 #define RICOH619_NUM_REGULATOR 17
150 /* RICOH619 IRQ definitions */
152 RICOH619_IRQ_POWER_ON,
154 RICOH619_IRQ_PRE_VINDT,
156 RICOH619_IRQ_POWER_OFF,
157 RICOH619_IRQ_NOE_OFF,
159 RICOH619_IRQ_CLK_STP,
167 RICOH619_IRQ_ILIMLIR,
168 RICOH619_IRQ_VBATLIR,
169 RICOH619_IRQ_VADPLIR,
170 RICOH619_IRQ_VUSBLIR,
171 RICOH619_IRQ_VSYSLIR,
172 RICOH619_IRQ_VTHMLIR,
173 RICOH619_IRQ_AIN1LIR,
174 RICOH619_IRQ_AIN0LIR,
176 RICOH619_IRQ_ILIMHIR,
177 RICOH619_IRQ_VBATHIR,
178 RICOH619_IRQ_VADPHIR,
179 RICOH619_IRQ_VUSBHIR,
180 RICOH619_IRQ_VSYSHIR,
181 RICOH619_IRQ_VTHMHIR,
182 RICOH619_IRQ_AIN1HIR,
183 RICOH619_IRQ_AIN0HIR,
185 RICOH619_IRQ_ADC_ENDIR,
196 RICOH619_IRQ_FVADPDETSINT,
197 RICOH619_IRQ_FVUSBDETSINT,
198 RICOH619_IRQ_FVADPLVSINT,
199 RICOH619_IRQ_FVUSBLVSINT,
200 RICOH619_IRQ_FWVADPSINT,
201 RICOH619_IRQ_FWVUSBSINT,
203 RICOH619_IRQ_FONCHGINT,
204 RICOH619_IRQ_FCHGCMPINT,
205 RICOH619_IRQ_FBATOPENINT,
206 RICOH619_IRQ_FSLPMODEINT,
207 RICOH619_IRQ_FBTEMPJTA1INT,
208 RICOH619_IRQ_FBTEMPJTA2INT,
209 RICOH619_IRQ_FBTEMPJTA3INT,
210 RICOH619_IRQ_FBTEMPJTA4INT,
212 RICOH619_IRQ_FCURTERMINT,
213 RICOH619_IRQ_FVOLTERMINT,
214 RICOH619_IRQ_FICRVSINT,
215 RICOH619_IRQ_FPOOR_CHGCURINT,
216 RICOH619_IRQ_FOSCFDETINT1,
217 RICOH619_IRQ_FOSCFDETINT2,
218 RICOH619_IRQ_FOSCFDETINT3,
219 RICOH619_IRQ_FOSCMDETINT,
221 RICOH619_IRQ_FDIEOFFINT,
222 RICOH619_IRQ_FDIEERRINT,
223 RICOH619_IRQ_FBTEMPERRINT,
224 RICOH619_IRQ_FVBATOVINT,
225 RICOH619_IRQ_FTTIMOVINT,
226 RICOH619_IRQ_FRTIMOVINT,
227 RICOH619_IRQ_FVADPOVSINT,
228 RICOH619_IRQ_FVUSBOVSINT,
232 RICOH619_IRQ_FWARN_ADP,
234 /* Should be last entry */
238 /* Ricoh619 gpio definitions */
249 enum ricoh619_sleep_control_id {
275 struct ricoh619_subdev_info {
282 struct ricoh619_rtc_platform_data {
284 struct rtc_time time;
288 struct ricoh619_gpio_init_data {
289 unsigned output_mode_en:1; /* Enable output mode during init */
290 unsigned output_val:1; /* Output value if it is in output mode */
291 unsigned init_apply:1; /* Apply init data on configuring gpios*/
292 unsigned led_mode:1; /* Select LED mode during init */
293 unsigned led_func:1; /* Set LED function if LED mode is 1 */
298 struct i2c_client *client;
299 struct mutex io_lock;
301 struct gpio_chip gpio_chip;
303 // struct irq_chip irq_chip;
305 struct mutex irq_lock;
306 unsigned long group_irq_en[MAX_MAIN_INTERRUPT];
308 /* For main interrupt bits in INTC */
312 /* For group interrupt bits and address */
313 u8 irq_en_cache[MAX_INTERRUPT_MASKS];
314 u8 irq_en_reg[MAX_INTERRUPT_MASKS];
317 u8 gpedge_cache[MAX_GPEDGE_REG];
318 u8 gpedge_reg[MAX_GPEDGE_REG];
321 struct irq_domain *irq_domain;
325 struct ricoh619_platform_data {
327 struct ricoh619_subdev_info *subdevs;
328 int (*init_port)(int irq_num); // Init GPIO for IRQ pin
331 struct ricoh619_gpio_init_data *gpio_init_data;
332 int num_gpioinit_data;
333 bool enable_shutdown_pin;
335 struct regulator_init_data *reg_init_data[RICOH619_NUM_REGULATOR];
337 int pmic_sleep_gpio; /* */
342 /* ==================================== */
343 /* RICOH619 Power_Key device data */
344 /* ==================================== */
345 struct ricoh619_pwrkey_platform_data {
349 extern int ricoh619_pwrkey_wakeup;
350 extern struct ricoh619 *g_ricoh619;
351 /* ==================================== */
352 /* RICOH619 battery device data */
353 /* ==================================== */
355 extern int g_fg_on_mode;
357 extern int ricoh619_read(struct device *dev, uint8_t reg, uint8_t *val);
358 extern int ricoh619_read_bank1(struct device *dev, uint8_t reg, uint8_t *val);
359 extern int ricoh619_bulk_reads(struct device *dev, u8 reg, u8 count,
361 extern int ricoh619_bulk_reads_bank1(struct device *dev, u8 reg, u8 count,
363 extern int ricoh619_write(struct device *dev, u8 reg, uint8_t val);
364 extern int ricoh619_write_bank1(struct device *dev, u8 reg, uint8_t val);
365 extern int ricoh619_bulk_writes(struct device *dev, u8 reg, u8 count,
367 extern int ricoh619_bulk_writes_bank1(struct device *dev, u8 reg, u8 count,
369 extern int ricoh619_set_bits(struct device *dev, u8 reg, uint8_t bit_mask);
370 extern int ricoh619_clr_bits(struct device *dev, u8 reg, uint8_t bit_mask);
371 extern int ricoh619_update(struct device *dev, u8 reg, uint8_t val,
373 extern int ricoh619_update_bank1(struct device *dev, u8 reg, uint8_t val,
375 extern int ricoh619_irq_init(struct ricoh619 *ricoh619, int irq, struct ricoh619_platform_data *pdata);
376 extern int ricoh619_irq_exit(struct ricoh619 *ricoh619);