2 * rk808.h for Rockchip RK808
4 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
6 * Author: Chris Zhong <zyw@rock-chips.com>
7 * Author: Zhang Qing <zhangqing@rock-chips.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2, as published by the Free Software Foundation.
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #ifndef __LINUX_REGULATOR_rk808_H
20 #define __LINUX_REGULATOR_rk808_H
22 #include <linux/regulator/machine.h>
23 #include <linux/regmap.h>
26 * rk808 Global Register Map.
29 #define RK808_DCDC1 0 /* (0+RK808_START) */
30 #define RK808_LDO1 4 /* (4+RK808_START) */
31 #define RK808_NUM_REGULATORS 14
95 #define RK808_SECONDS_REG 0x00
96 #define RK808_MINUTES_REG 0x01
97 #define RK808_HOURS_REG 0x02
98 #define RK808_DAYS_REG 0x03
99 #define RK808_MONTHS_REG 0x04
100 #define RK808_YEARS_REG 0x05
101 #define RK808_WEEKS_REG 0x06
102 #define RK808_ALARM_SECONDS_REG 0x08
103 #define RK808_ALARM_MINUTES_REG 0x09
104 #define RK808_ALARM_HOURS_REG 0x0a
105 #define RK808_ALARM_DAYS_REG 0x0b
106 #define RK808_ALARM_MONTHS_REG 0x0c
107 #define RK808_ALARM_YEARS_REG 0x0d
108 #define RK808_RTC_CTRL_REG 0x10
109 #define RK808_RTC_STATUS_REG 0x11
110 #define RK808_RTC_INT_REG 0x12
111 #define RK808_RTC_COMP_LSB_REG 0x13
112 #define RK808_RTC_COMP_MSB_REG 0x14
113 #define RK808_ID_MSB 0x17
114 #define RK808_ID_LSB 0x18
115 #define RK808_CLK32OUT_REG 0x20
116 #define RK808_VB_MON_REG 0x21
117 #define RK808_THERMAL_REG 0x22
118 #define RK808_DCDC_EN_REG 0x23
119 #define RK808_LDO_EN_REG 0x24
120 #define RK808_SLEEP_SET_OFF_REG1 0x25
121 #define RK808_SLEEP_SET_OFF_REG2 0x26
122 #define RK808_DCDC_UV_STS_REG 0x27
123 #define RK808_DCDC_UV_ACT_REG 0x28
124 #define RK808_LDO_UV_STS_REG 0x29
125 #define RK808_LDO_UV_ACT_REG 0x2a
126 #define RK808_DCDC_PG_REG 0x2b
127 #define RK808_LDO_PG_REG 0x2c
128 #define RK808_VOUT_MON_TDB_REG 0x2d
129 #define RK808_BUCK1_CONFIG_REG 0x2e
130 #define RK808_BUCK1_ON_VSEL_REG 0x2f
131 #define RK808_BUCK1_SLP_VSEL_REG 0x30
132 #define RK808_BUCK1_DVS_VSEL_REG 0x31
133 #define RK808_BUCK2_CONFIG_REG 0x32
134 #define RK808_BUCK2_ON_VSEL_REG 0x33
135 #define RK808_BUCK2_SLP_VSEL_REG 0x34
136 #define RK808_BUCK2_DVS_VSEL_REG 0x35
137 #define RK808_BUCK3_CONFIG_REG 0x36
138 #define RK808_BUCK4_CONFIG_REG 0x37
139 #define RK808_BUCK4_ON_VSEL_REG 0x38
140 #define RK808_BUCK4_SLP_VSEL_REG 0x39
141 #define RK808_BOOST_CONFIG_REG 0x3a
142 #define RK808_LDO1_ON_VSEL_REG 0x3b
143 #define RK808_LDO1_SLP_VSEL_REG 0x3c
144 #define RK808_LDO2_ON_VSEL_REG 0x3d
145 #define RK808_LDO2_SLP_VSEL_REG 0x3e
146 #define RK808_LDO3_ON_VSEL_REG 0x3f
147 #define RK808_LDO3_SLP_VSEL_REG 0x40
148 #define RK808_LDO4_ON_VSEL_REG 0x41
149 #define RK808_LDO4_SLP_VSEL_REG 0x42
150 #define RK808_LDO5_ON_VSEL_REG 0x43
151 #define RK808_LDO5_SLP_VSEL_REG 0x44
152 #define RK808_LDO6_ON_VSEL_REG 0x45
153 #define RK808_LDO6_SLP_VSEL_REG 0x46
154 #define RK808_LDO7_ON_VSEL_REG 0x47
155 #define RK808_LDO7_SLP_VSEL_REG 0x48
156 #define RK808_LDO8_ON_VSEL_REG 0x49
157 #define RK808_LDO8_SLP_VSEL_REG 0x4a
158 #define RK808_DEVCTRL_REG 0x4b
159 #define RK808_INT_STS_REG1 0x4c
160 #define RK808_INT_STS_MSK_REG1 0x4d
161 #define RK808_INT_STS_REG2 0x4e
162 #define RK808_INT_STS_MSK_REG2 0x4f
163 #define RK808_IO_POL_REG 0x50
165 #define RK818_VB_MON_REG 0x21
166 #define RK818_THERMAL_REG 0x22
167 #define RK818_DCDC_EN_REG 0x23
168 #define RK818_LDO_EN_REG 0x24
169 #define RK818_SLEEP_SET_OFF_REG1 0x25
170 #define RK818_SLEEP_SET_OFF_REG2 0x26
171 #define RK818_DCDC_UV_STS_REG 0x27
172 #define RK818_DCDC_UV_ACT_REG 0x28
173 #define RK818_LDO_UV_STS_REG 0x29
174 #define RK818_LDO_UV_ACT_REG 0x2a
175 #define RK818_DCDC_PG_REG 0x2b
176 #define RK818_LDO_PG_REG 0x2c
177 #define RK818_VOUT_MON_TDB_REG 0x2d
178 #define RK818_BUCK1_CONFIG_REG 0x2e
179 #define RK818_BUCK1_ON_VSEL_REG 0x2f
180 #define RK818_BUCK1_SLP_VSEL_REG 0x30
181 #define RK818_BUCK2_CONFIG_REG 0x32
182 #define RK818_BUCK2_ON_VSEL_REG 0x33
183 #define RK818_BUCK2_SLP_VSEL_REG 0x34
184 #define RK818_BUCK3_CONFIG_REG 0x36
185 #define RK818_BUCK4_CONFIG_REG 0x37
186 #define RK818_BUCK4_ON_VSEL_REG 0x38
187 #define RK818_BUCK4_SLP_VSEL_REG 0x39
188 #define RK818_BOOST_CONFIG_REG 0x3a
189 #define RK818_LDO1_ON_VSEL_REG 0x3b
190 #define RK818_LDO1_SLP_VSEL_REG 0x3c
191 #define RK818_LDO2_ON_VSEL_REG 0x3d
192 #define RK818_LDO2_SLP_VSEL_REG 0x3e
193 #define RK818_LDO3_ON_VSEL_REG 0x3f
194 #define RK818_LDO3_SLP_VSEL_REG 0x40
195 #define RK818_LDO4_ON_VSEL_REG 0x41
196 #define RK818_LDO4_SLP_VSEL_REG 0x42
197 #define RK818_LDO5_ON_VSEL_REG 0x43
198 #define RK818_LDO5_SLP_VSEL_REG 0x44
199 #define RK818_LDO6_ON_VSEL_REG 0x45
200 #define RK818_LDO6_SLP_VSEL_REG 0x46
201 #define RK818_LDO7_ON_VSEL_REG 0x47
202 #define RK818_LDO7_SLP_VSEL_REG 0x48
203 #define RK818_LDO8_ON_VSEL_REG 0x49
204 #define RK818_LDO8_SLP_VSEL_REG 0x4a
205 #define RK818_DEVCTRL_REG 0x4b
206 #define RK818_INT_STS_REG1 0X4c
207 #define RK818_INT_STS_MSK_REG1 0X4d
208 #define RK818_INT_STS_REG2 0X4e
209 #define RK818_INT_STS_MSK_REG2 0X4f
210 #define RK818_IO_POL_REG 0X50
211 #define RK818_OTP_VDD_EN_REG 0x51
212 #define RK818_H5V_EN_REG 0x52
213 #define RK818_SLEEP_SET_OFF_REG3 0x53
214 #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
215 #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
216 #define RK818_BOOST_CTRL_REG 0x56
217 #define RK818_DCDC_ILMAX_REG 0x90
218 #define RK818_CHRG_COMP_REG 0x9a
219 #define RK818_SUP_STS_REG 0xa0
220 #define RK818_USB_CTRL_REG 0xa1
221 #define RK818_CHRG_CTRL_REG1 0xa3
222 #define RK818_CHRG_CTRL_REG2 0xa4
223 #define RK818_CHRG_CTRL_REG3 0xa5
224 #define RK818_BAT_CTRL_REG 0xa6
225 #define RK818_BAT_HTS_TS1_REG 0xa8
226 #define RK818_BAT_LTS_TS1_REG 0xa9
227 #define RK818_BAT_HTS_TS2_REG 0xaa
228 #define RK818_BAT_LTS_TS2_REG 0xab
229 #define RK818_TS_CTRL_REG 0xac
230 #define RK818_ADC_CTRL_REG 0xad
231 #define RK818_ON_SOURCE_REG 0xae
232 #define RK818_OFF_SOURCE_REG 0xaf
233 #define RK818_GGCON_REG 0xb0
234 #define RK818_GGSTS_REG 0xb1
235 #define RK818_FRAME_SMP_INTERV_REG 0xb2
236 #define RK818_AUTO_SLP_CUR_THR_REG 0xb3
237 #define RK818_GASCNT_CAL_REG3 0xb4
238 #define RK818_GASCNT_CAL_REG2 0xb5
239 #define RK818_GASCNT_CAL_REG1 0xb6
240 #define RK818_GASCNT_CAL_REG0 0xb7
241 #define RK818_GASCNT3_REG 0xb8
242 #define RK818_GASCNT2_REG 0xb9
243 #define RK818_GASCNT1_REG 0xba
244 #define RK818_GASCNT0_REG 0xbb
245 #define RK818_BAT_CUR_AVG_REGH 0xbc
246 #define RK818_BAT_CUR_AVG_REGL 0xbd
247 #define RK818_TS1_ADC_REGH 0xbe
248 #define RK818_TS1_ADC_REGL 0xbf
249 #define RK818_TS2_ADC_REGH 0xc0
250 #define RK818_TS2_ADC_REGL 0xc1
251 #define RK818_BAT_OCV_REGH 0xc2
252 #define RK818_BAT_OCV_REGL 0xc3
253 #define RK818_BAT_VOL_REGH 0xc4
254 #define RK818_BAT_VOL_REGL 0xc5
255 #define RK818_RELAX_ENTRY_THRES_REGH 0xc6
256 #define RK818_RELAX_ENTRY_THRES_REGL 0xc7
257 #define RK818_RELAX_EXIT_THRES_REGH 0xc8
258 #define RK818_RELAX_EXIT_THRES_REGL 0xc9
259 #define RK818_RELAX_VOL1_REGH 0xca
260 #define RK818_RELAX_VOL1_REGL 0xcb
261 #define RK818_RELAX_VOL2_REGH 0xcc
262 #define RK818_RELAX_VOL2_REGL 0xcd
263 #define RK818_BAT_CUR_R_CALC_REGH 0xce
264 #define RK818_BAT_CUR_R_CALC_REGL 0xcf
265 #define RK818_BAT_VOL_R_CALC_REGH 0xd0
266 #define RK818_BAT_VOL_R_CALC_REGL 0xd1
267 #define RK818_CAL_OFFSET_REGH 0xd2
268 #define RK818_CAL_OFFSET_REGL 0xd3
269 #define RK818_NON_ACT_TIMER_CNT_REG 0xd4
270 #define RK818_VCALIB0_REGH 0xd5
271 #define RK818_VCALIB0_REGL 0xd6
272 #define RK818_VCALIB1_REGH 0xd7
273 #define RK818_VCALIB1_REGL 0xd8
274 #define RK818_IOFFSET_REGH 0xdd
275 #define RK818_IOFFSET_REGL 0xde
276 #define RK818_SOC_REG 0xe0
277 #define RK818_REMAIN_CAP_REG3 0xe1
278 #define RK818_REMAIN_CAP_REG2 0xe2
279 #define RK818_REMAIN_CAP_REG1 0xe3
280 #define RK818_REMAIN_CAP_REG0 0xe4
281 #define RK818_UPDAT_LEVE_REG 0xe5
282 #define RK818_NEW_FCC_REG3 0xe6
283 #define RK818_NEW_FCC_REG2 0xe7
284 #define RK818_NEW_FCC_REG1 0xe8
285 #define RK818_NEW_FCC_REG0 0xe9
286 #define RK818_NON_ACT_TIMER_CNT_SAVE_REG 0xea
287 #define RK818_OCV_VOL_VALID_REG 0xeb
288 #define RK818_REBOOT_CNT_REG 0xec
289 #define RK818_POFFSET_REG 0xed
290 #define RK818_MISC_MARK_REG 0xee
291 #define RK818_HALT_CNT_REG 0xef
292 #define RK818_CALC_REST_REGH 0xf0
293 #define RK818_CALC_REST_REGL 0xf1
294 #define RK818_SAVE_DATA19 0xf2
295 #define RK818_NUM_REGULATORS 17
297 /* IRQ Definitions */
298 #define RK808_IRQ_VOUT_LO 0
299 #define RK808_IRQ_VB_LO 1
300 #define RK808_IRQ_PWRON 2
301 #define RK808_IRQ_PWRON_LP 3
302 #define RK808_IRQ_HOTDIE 4
303 #define RK808_IRQ_RTC_ALARM 5
304 #define RK808_IRQ_RTC_PERIOD 6
305 #define RK808_IRQ_PLUG_IN_INT 7
306 #define RK808_IRQ_PLUG_OUT_INT 8
307 #define RK808_NUM_IRQ 9
309 #define RK808_IRQ_VOUT_LO_MSK BIT(0)
310 #define RK808_IRQ_VB_LO_MSK BIT(1)
311 #define RK808_IRQ_PWRON_MSK BIT(2)
312 #define RK808_IRQ_PWRON_LP_MSK BIT(3)
313 #define RK808_IRQ_HOTDIE_MSK BIT(4)
314 #define RK808_IRQ_RTC_ALARM_MSK BIT(5)
315 #define RK808_IRQ_RTC_PERIOD_MSK BIT(6)
316 #define RK808_IRQ_PLUG_IN_INT_MSK BIT(0)
317 #define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1)
319 #define RK808_VBAT_LOW_2V8 0x00
320 #define RK808_VBAT_LOW_2V9 0x01
321 #define RK808_VBAT_LOW_3V0 0x02
322 #define RK808_VBAT_LOW_3V1 0x03
323 #define RK808_VBAT_LOW_3V2 0x04
324 #define RK808_VBAT_LOW_3V3 0x05
325 #define RK808_VBAT_LOW_3V4 0x06
326 #define RK808_VBAT_LOW_3V5 0x07
327 #define VBAT_LOW_VOL_MASK (0x07 << 0)
328 #define EN_VABT_LOW_SHUT_DOWN (0x00 << 4)
329 #define EN_VBAT_LOW_IRQ (0x1 << 4)
330 #define VBAT_LOW_ACT_MASK (0x1 << 4)
332 #define BUCK_ILMIN_MASK (7 << 0)
333 #define BOOST_ILMIN_MASK (7 << 0)
334 #define BUCK1_RATE_MASK (3 << 3)
335 #define BUCK2_RATE_MASK (3 << 3)
336 #define MASK_ALL 0xff
338 #define BUCK_UV_ACT_MASK 0x0f
339 #define BUCK_UV_ACT_DISABLE 0
341 #define SWITCH2_EN BIT(6)
342 #define SWITCH1_EN BIT(5)
343 #define DEV_OFF_RST BIT(3)
344 #define DEV_OFF BIT(0)
345 #define RTC_STOP BIT(0)
347 #define VB_LO_ACT BIT(4)
348 #define VB_LO_SEL_3500MV (7 << 0)
350 #define VOUT_LO_INT BIT(0)
351 #define CLK32KOUT2_EN BIT(0)
352 #define H5V_EN_MASK BIT(0)
353 #define H5V_EN_ENABLE BIT(0)
354 #define REF_RDY_CTRL_MASK BIT(1)
355 #define REF_RDY_CTRL_ENABLE BIT(1)
357 /*RK818_DCDC_EN_REG*/
358 #define BUCK1_EN_MASK BIT(0)
359 #define BUCK2_EN_MASK BIT(1)
360 #define BUCK3_EN_MASK BIT(2)
361 #define BUCK4_EN_MASK BIT(3)
362 #define BOOST_EN_MASK BIT(4)
363 #define LDO9_EN_MASK BIT(5)
364 #define SWITCH_EN_MASK BIT(6)
365 #define OTG_EN_MASK BIT(7)
367 #define BUCK1_EN_ENABLE BIT(0)
368 #define BUCK2_EN_ENABLE BIT(1)
369 #define BUCK3_EN_ENABLE BIT(2)
370 #define BUCK4_EN_ENABLE BIT(3)
371 #define BOOST_EN_ENABLE BIT(4)
372 #define LDO9_EN_ENABLE BIT(5)
373 #define SWITCH_EN_ENABLE BIT(6)
374 #define OTG_EN_ENABLE BIT(7)
376 /* IRQ Definitions */
377 #define RK818_IRQ_VOUT_LO 0
378 #define RK818_IRQ_VB_LO 1
379 #define RK818_IRQ_PWRON 2
380 #define RK818_IRQ_PWRON_LP 3
381 #define RK818_IRQ_HOTDIE 4
382 #define RK818_IRQ_RTC_ALARM 5
383 #define RK818_IRQ_RTC_PERIOD 6
384 #define RK818_IRQ_USB_OV 7
385 #define RK818_IRQ_PLUG_IN 8
386 #define RK818_IRQ_PLUG_OUT 9
387 #define RK818_IRQ_CHG_OK 10
388 #define RK818_IRQ_CHG_TE 11
389 #define RK818_IRQ_CHG_TS1 12
390 #define RK818_IRQ_TS2 13
391 #define RK818_IRQ_CHG_CVTLIM 14
392 #define RK818_IRQ_DISCHG_ILIM 15
394 #define BUCK1_SLP_SET_MASK BIT(0)
395 #define BUCK2_SLP_SET_MASK BIT(1)
396 #define BUCK3_SLP_SET_MASK BIT(2)
397 #define BUCK4_SLP_SET_MASK BIT(3)
398 #define BOOST_SLP_SET_MASK BIT(4)
399 #define LDO9_SLP_SET_MASK BIT(5)
400 #define SWITCH_SLP_SET_MASK BIT(6)
401 #define OTG_SLP_SET_MASK BIT(7)
403 #define BUCK1_SLP_SET_OFF BIT(0)
404 #define BUCK2_SLP_SET_OFF BIT(1)
405 #define BUCK3_SLP_SET_OFF BIT(2)
406 #define BUCK4_SLP_SET_OFF BIT(3)
407 #define BOOST_SLP_SET_OFF BIT(4)
408 #define LDO9_SLP_SET_OFF BIT(5)
409 #define SWITCH_SLP_SET_OFF BIT(6)
410 #define OTG_SLP_SET_OFF BIT(7)
411 #define OTG_BOOST_SLP_OFF (BOOST_SLP_SET_OFF | OTG_SLP_SET_OFF)
413 #define BUCK1_SLP_SET_ON BIT(0)
414 #define BUCK2_SLP_SET_ON BIT(1)
415 #define BUCK3_SLP_SET_ON BIT(2)
416 #define BUCK4_SLP_SET_ON BIT(3)
417 #define BOOST_SLP_SET_ON BIT(4)
418 #define LDO9_SLP_SET_ON BIT(5)
419 #define SWITCH_SLP_SET_ON BIT(6)
420 #define OTG_SLP_SET_ON BIT(7)
422 #define VOUT_LO_MASK BIT(0)
423 #define VB_LO_MASK BIT(1)
424 #define PWRON_MASK BIT(2)
425 #define PWRON_LP_MASK BIT(3)
426 #define HOTDIE_MASK BIT(4)
427 #define RTC_ALARM_MASK BIT(5)
428 #define RTC_PERIOD_MASK BIT(6)
429 #define USB_OV_MASK BIT(7)
431 #define VOUT_LO_DISABLE BIT(0)
432 #define VB_LO_DISABLE BIT(1)
433 #define PWRON_DISABLE BIT(2)
434 #define PWRON_LP_DISABLE BIT(3)
435 #define HOTDIE_DISABLE BIT(4)
436 #define RTC_ALARM_DISABLE BIT(5)
437 #define RTC_PERIOD_DISABLE BIT(6)
438 #define USB_OV_INT_DISABLE BIT(7)
440 #define VOUT_LO_ENABLE (0 << 0)
441 #define VB_LO_ENABLE (0 << 1)
442 #define PWRON_ENABLE (0 << 2)
443 #define PWRON_LP_ENABLE (0 << 3)
444 #define HOTDIE_ENABLE (0 << 4)
445 #define RTC_ALARM_ENABLE (0 << 5)
446 #define RTC_PERIOD_ENABLE (0 << 6)
447 #define USB_OV_INT_ENABLE (0 << 7)
449 #define PLUG_IN_MASK BIT(0)
450 #define PLUG_OUT_MASK BIT(1)
451 #define CHGOK_MASK BIT(2)
452 #define CHGTE_MASK BIT(3)
453 #define CHGTS1_MASK BIT(4)
454 #define TS2_MASK BIT(5)
455 #define CHG_CVTLIM_MASK BIT(6)
456 #define DISCHG_ILIM_MASK BIT(7)
458 #define PLUG_IN_DISABLE BIT(0)
459 #define PLUG_OUT_DISABLE BIT(1)
460 #define CHGOK_DISABLE BIT(2)
461 #define CHGTE_DISABLE BIT(3)
462 #define CHGTS1_DISABLE BIT(4)
463 #define TS2_DISABLE BIT(5)
464 #define CHG_CVTLIM_DISABLE BIT(6)
465 #define DISCHG_ILIM_DISABLE BIT(7)
467 #define PLUG_IN_ENABLE BIT(0)
468 #define PLUG_OUT_ENABLE BIT(1)
469 #define CHGOK_ENABLE BIT(2)
470 #define CHGTE_ENABLE BIT(3)
471 #define CHGTS1_ENABLE BIT(4)
472 #define TS2_ENABLE BIT(5)
473 #define CHG_CVTLIM_ENABLE BIT(6)
474 #define DISCHG_ILIM_ENABLE BIT(7)
476 /* IRQ Definitions */
477 #define RK805_IRQ_PWRON_RISE 0
478 #define RK805_IRQ_VB_LOW 1
479 #define RK805_IRQ_PWRON 2
480 #define RK805_IRQ_PWRON_LP 3
481 #define RK805_IRQ_HOTDIE 4
482 #define RK805_IRQ_RTC_ALARM 5
483 #define RK805_IRQ_RTC_PERIOD 6
484 #define RK805_IRQ_PWRON_FALL 7
486 #define RK805_IRQ_PWRON_RISE_MSK BIT(0)
487 #define RK805_IRQ_VB_LOW_MSK BIT(1)
488 #define RK805_IRQ_PWRON_MSK BIT(2)
489 #define RK805_IRQ_PWRON_LP_MSK BIT(3)
490 #define RK805_IRQ_HOTDIE_MSK BIT(4)
491 #define RK805_IRQ_RTC_ALARM_MSK BIT(5)
492 #define RK805_IRQ_RTC_PERIOD_MSK BIT(6)
493 #define RK805_IRQ_PWRON_FALL_MSK BIT(7)
495 #define RK805_PWR_RISE_INT_STATUS BIT(0)
496 #define RK805_VB_LOW_INT_STATUS BIT(1)
497 #define RK805_PWRON_INT_STATUS BIT(2)
498 #define RK805_PWRON_LP_INT_STATUS BIT(3)
499 #define RK805_HOTDIE_INT_STATUS BIT(4)
500 #define RK805_ALARM_INT_STATUS BIT(5)
501 #define RK805_PERIOD_INT_STATUS BIT(6)
502 #define RK805_PWR_FALL_INT_STATUS BIT(7)
504 /*INTERRUPT REGISTER*/
505 #define RK805_INT_STS_REG 0x4C
506 #define RK805_INT_STS_MSK_REG 0x4D
507 #define RK805_GPIO_IO_POL_REG 0x50
508 #define RK805_OUT_REG 0x52
509 #define RK805_ON_SOURCE_REG 0xAE
510 #define RK805_OFF_SOURCE_REG 0xAF
512 /*POWER CHANNELS ENABLE REGISTER*/
513 #define RK805_DCDC_EN_REG 0x23
514 #define RK805_SLP_DCDC_EN_REG 0x25
515 #define RK805_SLP_LDO_EN_REG 0x26
516 #define RK805_LDO_EN_REG 0x27
519 #define RK805_THERMAL_REG 0x22
521 /*BUCK AND LDO CONFIG REGISTER*/
522 #define RK805_BUCK_LDO_SLP_LP_EN_REG 0x2A
523 #define RK805_BUCK1_CONFIG_REG 0x2E
524 #define RK805_BUCK1_ON_VSEL_REG 0x2F
525 #define RK805_BUCK1_SLP_VSEL_REG 0x30
526 #define RK805_BUCK2_CONFIG_REG 0x32
527 #define RK805_BUCK2_ON_VSEL_REG 0x33
528 #define RK805_BUCK2_SLP_VSEL_REG 0x34
529 #define RK805_BUCK3_CONFIG_REG 0x36
530 #define RK805_BUCK4_CONFIG_REG 0x37
531 #define RK805_BUCK4_ON_VSEL_REG 0x38
532 #define RK805_BUCK4_SLP_VSEL_REG 0x39
533 #define RK805_LDO1_ON_VSEL_REG 0x3B
534 #define RK805_LDO1_SLP_VSEL_REG 0x3C
535 #define RK805_LDO2_ON_VSEL_REG 0x3D
536 #define RK805_LDO2_SLP_VSEL_REG 0x3E
537 #define RK805_LDO3_ON_VSEL_REG 0x3F
538 #define RK805_LDO3_SLP_VSEL_REG 0x40
539 #define RK805_OUT_REG 0x52
540 #define RK805_ON_SOURCE_REG 0xAE
541 #define RK805_OFF_SOURCE_REG 0xAF
543 #define RK805_NUM_REGULATORS 7
545 #define RK805_PWRON_FALL_RISE_INT_EN 0x0
546 #define RK805_PWRON_FALL_RISE_INT_MSK 0x81
549 #define RK816_CHIP_NAME_REG 0x17
550 #define RK816_CHIP_VER_REG 0x18
551 #define RK816_OTP_VER_REG 0x19
552 #define RK816_NUM_REGULATORS 12
554 /*POWER ON/OFF REGISTER*/
555 #define RK816_VB_MON_REG 0x21
556 #define RK816_THERMAL_REG 0x22
557 #define RK816_PWRON_LP_INT_TIME_REG 0x47
558 #define RK816_PWRON_DB_REG 0x48
559 #define RK816_DEV_CTRL_REG 0x4B
560 #define RK816_ON_SOURCE_REG 0xAE
561 #define RK816_OFF_SOURCE_REG 0xAF
563 /*POWER CHANNELS ENABLE REGISTER*/
564 #define RK816_DCDC_EN_REG1 0x23
565 #define RK816_DCDC_EN_REG2 0x24
566 #define RK816_SLP_DCDC_EN_REG 0x25
567 #define RK816_SLP_LDO_EN_REG 0x26
568 #define RK816_LDO_EN_REG1 0x27
569 #define RK816_LDO_EN_REG2 0x28
571 /*BUCK AND LDO CONFIG REGISTER*/
572 #define RK816_BUCK1_CONFIG_REG 0x2E
573 #define RK816_BUCK1_ON_VSEL_REG 0x2F
574 #define RK816_BUCK1_SLP_VSEL_REG 0x30
575 #define RK816_BUCK2_CONFIG_REG 0x32
576 #define RK816_BUCK2_ON_VSEL_REG 0x33
577 #define RK816_BUCK2_SLP_VSEL_REG 0x34
578 #define RK816_BUCK3_CONFIG_REG 0x36
579 #define RK816_BUCK4_CONFIG_REG 0x37
580 #define RK816_BUCK4_ON_VSEL_REG 0x38
581 #define RK816_BUCK4_SLP_VSEL_REG 0x39
582 #define RK816_LDO1_ON_VSEL_REG 0x3B
583 #define RK816_LDO1_SLP_VSEL_REG 0x3C
584 #define RK816_LDO2_ON_VSEL_REG 0x3D
585 #define RK816_LDO2_SLP_VSEL_REG 0x3E
586 #define RK816_LDO3_ON_VSEL_REG 0x3F
587 #define RK816_LDO3_SLP_VSEL_REG 0x40
588 #define RK816_LDO4_ON_VSEL_REG 0x41
589 #define RK816_LDO4_SLP_VSEL_REG 0x42
590 #define RK816_LDO5_ON_VSEL_REG 0x43
591 #define RK816_LDO5_SLP_VSEL_REG 0x44
592 #define RK816_LDO6_ON_VSEL_REG 0x45
593 #define RK816_LDO6_SLP_VSEL_REG 0x46
595 /*CHARGER BOOST AND OTG REGISTER*/
596 #define RK816_OTG_BUCK_LDO_CONFIG_REG 0x2A
597 #define RK816_CHRG_CONFIG_REG 0x2B
598 #define RK816_BOOST_ON_VESL_REG 0x54
599 #define RK816_BOOST_SLP_VSEL_REG 0x55
600 #define RK816_CHRG_BOOST_CONFIG_REG 0x9A
601 #define RK816_SUP_STS_REG 0xA0
602 #define RK816_USB_CTRL_REG 0xA1
603 #define RK816_CHRG_CTRL_REG1 0xA3
604 #define RK816_CHRG_CTRL_REG2 0xA4
605 #define RK816_CHRG_CTRL_REG3 0xA5
606 #define RK816_BAT_CTRL_REG 0xA6
607 #define RK816_BAT_HTS_TS_REG 0xA8
608 #define RK816_BAT_LTS_TS_REG 0xA9
610 /*INTERRUPT REGISTER*/
611 #define RK816_INT_STS_REG1 0x49
612 #define RK816_INT_STS_MSK_REG1 0x4A
613 #define RK816_INT_STS_REG2 0x4C
614 #define RK816_INT_STS_MSK_REG2 0x4D
615 #define RK816_INT_STS_REG3 0x4E
616 #define RK816_INT_STS_MSK_REG3 0x4F
617 #define RK816_GPIO_IO_POL_REG 0x50
619 #define RK816_DATA18_REG 0xF2
621 /* IRQ Definitions */
622 #define RK816_IRQ_PWRON_FALL 0
623 #define RK816_IRQ_PWRON_RISE 1
624 #define RK816_IRQ_VB_LOW 2
625 #define RK816_IRQ_PWRON 3
626 #define RK816_IRQ_PWRON_LP 4
627 #define RK816_IRQ_HOTDIE 5
628 #define RK816_IRQ_RTC_ALARM 6
629 #define RK816_IRQ_RTC_PERIOD 7
630 #define RK816_IRQ_USB_OV 8
631 #define RK816_IRQ_PLUG_IN 9
632 #define RK816_IRQ_PLUG_OUT 10
633 #define RK816_IRQ_CHG_OK 11
634 #define RK816_IRQ_CHG_TE 12
635 #define RK816_IRQ_CHG_TS 13
636 #define RK816_IRQ_CHG_CVTLIM 14
637 #define RK816_IRQ_DISCHG_ILIM 15
639 #define RK816_IRQ_PWRON_FALL_MSK BIT(5)
640 #define RK816_IRQ_PWRON_RISE_MSK BIT(6)
641 #define RK816_IRQ_VB_LOW_MSK BIT(1)
642 #define RK816_IRQ_PWRON_MSK BIT(2)
643 #define RK816_IRQ_PWRON_LP_MSK BIT(3)
644 #define RK816_IRQ_HOTDIE_MSK BIT(4)
645 #define RK816_IRQ_RTC_ALARM_MSK BIT(5)
646 #define RK816_IRQ_RTC_PERIOD_MSK BIT(6)
647 #define RK816_IRQ_USB_OV_MSK BIT(7)
648 #define RK816_IRQ_PLUG_IN_MSK BIT(0)
649 #define RK816_IRQ_PLUG_OUT_MSK BIT(1)
650 #define RK816_IRQ_CHG_OK_MSK BIT(2)
651 #define RK816_IRQ_CHG_TE_MSK BIT(3)
652 #define RK816_IRQ_CHG_TS_MSK BIT(4)
653 #define RK816_IRQ_CHG_CVTLIM_MSK BIT(6)
654 #define RK816_IRQ_DISCHG_ILIM_MSK BIT(7)
656 #define RK816_VBAT_LOW_2V8 0x00
657 #define RK816_VBAT_LOW_2V9 0x01
658 #define RK816_VBAT_LOW_3V0 0x02
659 #define RK816_VBAT_LOW_3V1 0x03
660 #define RK816_VBAT_LOW_3V2 0x04
661 #define RK816_VBAT_LOW_3V3 0x05
662 #define RK816_VBAT_LOW_3V4 0x06
663 #define RK816_VBAT_LOW_3V5 0x07
664 #define RK816_PWR_FALL_INT_STATUS (0x1 << 5)
665 #define RK816_PWR_RISE_INT_STATUS (0x1 << 6)
666 #define RK816_ALARM_INT_STATUS (0x1 << 5)
667 #define EN_VBAT_LOW_IRQ (0x1 << 4)
668 #define VBAT_LOW_ACT_MASK (0x1 << 4)
669 #define RTC_TIMER_ALARM_INT_MSK (0x3 << 2)
670 #define RTC_TIMER_ALARM_INT_DIS (0x0 << 2)
671 #define RTC_PERIOD_ALARM_INT_MSK (0x3 << 5)
672 #define RTC_PERIOD_ALARM_INT_ST (0x3 << 5)
673 #define RTC_PERIOD_ALARM_INT_DIS (0x3 << 5)
674 #define RTC_PERIOD_ALARM_INT_EN (0x9f)
675 #define REG_WRITE_MSK 0xff
676 #define BUCK4_MAX_ILIMIT 0x2c
677 #define BUCK_RATE_MSK (0x3 << 3)
678 #define BUCK_RATE_12_5MV_US (0x2 << 3)
679 #define ALL_INT_FLAGS_ST 0xff
680 #define PLUGIN_OUT_INT_EN 0xfc
681 #define RK816_PWRON_FALL_RISE_INT_EN 0x9f
682 #define BUCK1_2_IMAX_MAX (0x3 << 6)
683 #define BUCK3_4_IMAX_MAX (0x3 << 3)
684 #define BOOST_DISABLE ((0x1 << 5) | (0x0 << 1))
686 #define TEMP105C 0x08
687 #define TEMP115C 0x0c
688 #define TEMP_HOTDIE_MSK 0x0c
689 #define SLP_SD_MSK (0x3 << 2)
690 #define SHUTDOWN_FUN (0x2 << 2)
691 #define SLEEP_FUN (0x1 << 2)
692 #define RK8XX_ID_MSK 0xfff0
693 #define FPWM_MODE BIT(7)
718 struct i2c_client *i2c;
719 struct regmap_irq_chip_data *irq_data;
720 struct regmap *regmap;
731 #endif /* __LINUX_REGULATOR_rk808_H */