2 * rk808.h for Rockchip RK808
4 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
6 * Author: Chris Zhong <zyw@rock-chips.com>
7 * Author: Zhang Qing <zhangqing@rock-chips.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2, as published by the Free Software Foundation.
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #ifndef __LINUX_REGULATOR_rk808_H
20 #define __LINUX_REGULATOR_rk808_H
22 #include <linux/regulator/machine.h>
23 #include <linux/regmap.h>
26 * rk808 Global Register Map.
29 #define RK808_DCDC1 0 /* (0+RK808_START) */
30 #define RK808_LDO1 4 /* (4+RK808_START) */
31 #define RK808_NUM_REGULATORS 14
67 #define RK808_SECONDS_REG 0x00
68 #define RK808_MINUTES_REG 0x01
69 #define RK808_HOURS_REG 0x02
70 #define RK808_DAYS_REG 0x03
71 #define RK808_MONTHS_REG 0x04
72 #define RK808_YEARS_REG 0x05
73 #define RK808_WEEKS_REG 0x06
74 #define RK808_ALARM_SECONDS_REG 0x08
75 #define RK808_ALARM_MINUTES_REG 0x09
76 #define RK808_ALARM_HOURS_REG 0x0a
77 #define RK808_ALARM_DAYS_REG 0x0b
78 #define RK808_ALARM_MONTHS_REG 0x0c
79 #define RK808_ALARM_YEARS_REG 0x0d
80 #define RK808_RTC_CTRL_REG 0x10
81 #define RK808_RTC_STATUS_REG 0x11
82 #define RK808_RTC_INT_REG 0x12
83 #define RK808_RTC_COMP_LSB_REG 0x13
84 #define RK808_RTC_COMP_MSB_REG 0x14
85 #define RK808_CLK32OUT_REG 0x20
86 #define RK808_VB_MON_REG 0x21
87 #define RK808_THERMAL_REG 0x22
88 #define RK808_DCDC_EN_REG 0x23
89 #define RK808_LDO_EN_REG 0x24
90 #define RK808_SLEEP_SET_OFF_REG1 0x25
91 #define RK808_SLEEP_SET_OFF_REG2 0x26
92 #define RK808_DCDC_UV_STS_REG 0x27
93 #define RK808_DCDC_UV_ACT_REG 0x28
94 #define RK808_LDO_UV_STS_REG 0x29
95 #define RK808_LDO_UV_ACT_REG 0x2a
96 #define RK808_DCDC_PG_REG 0x2b
97 #define RK808_LDO_PG_REG 0x2c
98 #define RK808_VOUT_MON_TDB_REG 0x2d
99 #define RK808_BUCK1_CONFIG_REG 0x2e
100 #define RK808_BUCK1_ON_VSEL_REG 0x2f
101 #define RK808_BUCK1_SLP_VSEL_REG 0x30
102 #define RK808_BUCK1_DVS_VSEL_REG 0x31
103 #define RK808_BUCK2_CONFIG_REG 0x32
104 #define RK808_BUCK2_ON_VSEL_REG 0x33
105 #define RK808_BUCK2_SLP_VSEL_REG 0x34
106 #define RK808_BUCK2_DVS_VSEL_REG 0x35
107 #define RK808_BUCK3_CONFIG_REG 0x36
108 #define RK808_BUCK4_CONFIG_REG 0x37
109 #define RK808_BUCK4_ON_VSEL_REG 0x38
110 #define RK808_BUCK4_SLP_VSEL_REG 0x39
111 #define RK808_BOOST_CONFIG_REG 0x3a
112 #define RK808_LDO1_ON_VSEL_REG 0x3b
113 #define RK808_LDO1_SLP_VSEL_REG 0x3c
114 #define RK808_LDO2_ON_VSEL_REG 0x3d
115 #define RK808_LDO2_SLP_VSEL_REG 0x3e
116 #define RK808_LDO3_ON_VSEL_REG 0x3f
117 #define RK808_LDO3_SLP_VSEL_REG 0x40
118 #define RK808_LDO4_ON_VSEL_REG 0x41
119 #define RK808_LDO4_SLP_VSEL_REG 0x42
120 #define RK808_LDO5_ON_VSEL_REG 0x43
121 #define RK808_LDO5_SLP_VSEL_REG 0x44
122 #define RK808_LDO6_ON_VSEL_REG 0x45
123 #define RK808_LDO6_SLP_VSEL_REG 0x46
124 #define RK808_LDO7_ON_VSEL_REG 0x47
125 #define RK808_LDO7_SLP_VSEL_REG 0x48
126 #define RK808_LDO8_ON_VSEL_REG 0x49
127 #define RK808_LDO8_SLP_VSEL_REG 0x4a
128 #define RK808_DEVCTRL_REG 0x4b
129 #define RK808_INT_STS_REG1 0x4c
130 #define RK808_INT_STS_MSK_REG1 0x4d
131 #define RK808_INT_STS_REG2 0x4e
132 #define RK808_INT_STS_MSK_REG2 0x4f
133 #define RK808_IO_POL_REG 0x50
135 #define RK818_VB_MON_REG 0x21
136 #define RK818_THERMAL_REG 0x22
137 #define RK818_DCDC_EN_REG 0x23
138 #define RK818_LDO_EN_REG 0x24
139 #define RK818_SLEEP_SET_OFF_REG1 0x25
140 #define RK818_SLEEP_SET_OFF_REG2 0x26
141 #define RK818_DCDC_UV_STS_REG 0x27
142 #define RK818_DCDC_UV_ACT_REG 0x28
143 #define RK818_LDO_UV_STS_REG 0x29
144 #define RK818_LDO_UV_ACT_REG 0x2a
145 #define RK818_DCDC_PG_REG 0x2b
146 #define RK818_LDO_PG_REG 0x2c
147 #define RK818_VOUT_MON_TDB_REG 0x2d
148 #define RK818_BUCK1_CONFIG_REG 0x2e
149 #define RK818_BUCK1_ON_VSEL_REG 0x2f
150 #define RK818_BUCK1_SLP_VSEL_REG 0x30
151 #define RK818_BUCK2_CONFIG_REG 0x32
152 #define RK818_BUCK2_ON_VSEL_REG 0x33
153 #define RK818_BUCK2_SLP_VSEL_REG 0x34
154 #define RK818_BUCK3_CONFIG_REG 0x36
155 #define RK818_BUCK4_CONFIG_REG 0x37
156 #define RK818_BUCK4_ON_VSEL_REG 0x38
157 #define RK818_BUCK4_SLP_VSEL_REG 0x39
158 #define RK818_BOOST_CONFIG_REG 0x3a
159 #define RK818_LDO1_ON_VSEL_REG 0x3b
160 #define RK818_LDO1_SLP_VSEL_REG 0x3c
161 #define RK818_LDO2_ON_VSEL_REG 0x3d
162 #define RK818_LDO2_SLP_VSEL_REG 0x3e
163 #define RK818_LDO3_ON_VSEL_REG 0x3f
164 #define RK818_LDO3_SLP_VSEL_REG 0x40
165 #define RK818_LDO4_ON_VSEL_REG 0x41
166 #define RK818_LDO4_SLP_VSEL_REG 0x42
167 #define RK818_LDO5_ON_VSEL_REG 0x43
168 #define RK818_LDO5_SLP_VSEL_REG 0x44
169 #define RK818_LDO6_ON_VSEL_REG 0x45
170 #define RK818_LDO6_SLP_VSEL_REG 0x46
171 #define RK818_LDO7_ON_VSEL_REG 0x47
172 #define RK818_LDO7_SLP_VSEL_REG 0x48
173 #define RK818_LDO8_ON_VSEL_REG 0x49
174 #define RK818_LDO8_SLP_VSEL_REG 0x4a
175 #define RK818_DEVCTRL_REG 0x4b
176 #define RK818_INT_STS_REG1 0X4c
177 #define RK818_INT_STS_MSK_REG1 0X4d
178 #define RK818_INT_STS_REG2 0X4e
179 #define RK818_INT_STS_MSK_REG2 0X4f
180 #define RK818_IO_POL_REG 0X50
181 #define RK818_OTP_VDD_EN_REG 0x51
182 #define RK818_H5V_EN_REG 0x52
183 #define RK818_SLEEP_SET_OFF_REG3 0x53
184 #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
185 #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
186 #define RK818_BOOST_CTRL_REG 0x56
187 #define RK818_DCDC_ILMAX_REG 0x90
188 #define RK818_CHRG_COMP_REG 0x9a
189 #define RK818_SUP_STS_REG 0xa0
190 #define RK818_USB_CTRL_REG 0xa1
191 #define RK818_CHRG_CTRL_REG1 0xa3
192 #define RK818_CHRG_CTRL_REG2 0xa4
193 #define RK818_CHRG_CTRL_REG3 0xa5
194 #define RK818_BAT_CTRL_REG 0xa6
195 #define RK818_BAT_HTS_TS1_REG 0xa8
196 #define RK818_BAT_LTS_TS1_REG 0xa9
197 #define RK818_BAT_HTS_TS2_REG 0xaa
198 #define RK818_BAT_LTS_TS2_REG 0xab
199 #define RK818_TS_CTRL_REG 0xac
200 #define RK818_ADC_CTRL_REG 0xad
201 #define RK818_ON_SOURCE_REG 0xae
202 #define RK818_OFF_SOURCE_REG 0xaf
203 #define RK818_GGCON_REG 0xb0
204 #define RK818_GGSTS_REG 0xb1
205 #define RK818_FRAME_SMP_INTERV_REG 0xb2
206 #define RK818_AUTO_SLP_CUR_THR_REG 0xb3
207 #define RK818_GASCNT_CAL_REG3 0xb4
208 #define RK818_GASCNT_CAL_REG2 0xb5
209 #define RK818_GASCNT_CAL_REG1 0xb6
210 #define RK818_GASCNT_CAL_REG0 0xb7
211 #define RK818_GASCNT3_REG 0xb8
212 #define RK818_GASCNT2_REG 0xb9
213 #define RK818_GASCNT1_REG 0xba
214 #define RK818_GASCNT0_REG 0xbb
215 #define RK818_BAT_CUR_AVG_REGH 0xbc
216 #define RK818_BAT_CUR_AVG_REGL 0xbd
217 #define RK818_TS1_ADC_REGH 0xbe
218 #define RK818_TS1_ADC_REGL 0xbf
219 #define RK818_TS2_ADC_REGH 0xc0
220 #define RK818_TS2_ADC_REGL 0xc1
221 #define RK818_BAT_OCV_REGH 0xc2
222 #define RK818_BAT_OCV_REGL 0xc3
223 #define RK818_BAT_VOL_REGH 0xc4
224 #define RK818_BAT_VOL_REGL 0xc5
225 #define RK818_RELAX_ENTRY_THRES_REGH 0xc6
226 #define RK818_RELAX_ENTRY_THRES_REGL 0xc7
227 #define RK818_RELAX_EXIT_THRES_REGH 0xc8
228 #define RK818_RELAX_EXIT_THRES_REGL 0xc9
229 #define RK818_RELAX_VOL1_REGH 0xca
230 #define RK818_RELAX_VOL1_REGL 0xcb
231 #define RK818_RELAX_VOL2_REGH 0xcc
232 #define RK818_RELAX_VOL2_REGL 0xcd
233 #define RK818_BAT_CUR_R_CALC_REGH 0xce
234 #define RK818_BAT_CUR_R_CALC_REGL 0xcf
235 #define RK818_BAT_VOL_R_CALC_REGH 0xd0
236 #define RK818_BAT_VOL_R_CALC_REGL 0xd1
237 #define RK818_CAL_OFFSET_REGH 0xd2
238 #define RK818_CAL_OFFSET_REGL 0xd3
239 #define RK818_NON_ACT_TIMER_CNT_REG 0xd4
240 #define RK818_VCALIB0_REGH 0xd5
241 #define RK818_VCALIB0_REGL 0xd6
242 #define RK818_VCALIB1_REGH 0xd7
243 #define RK818_VCALIB1_REGL 0xd8
244 #define RK818_IOFFSET_REGH 0xdd
245 #define RK818_IOFFSET_REGL 0xde
246 #define RK818_SOC_REG 0xe0
247 #define RK818_REMAIN_CAP_REG3 0xe1
248 #define RK818_REMAIN_CAP_REG2 0xe2
249 #define RK818_REMAIN_CAP_REG1 0xe3
250 #define RK818_REMAIN_CAP_REG0 0xe4
251 #define RK818_UPDAT_LEVE_REG 0xe5
252 #define RK818_NEW_FCC_REG3 0xe6
253 #define RK818_NEW_FCC_REG2 0xe7
254 #define RK818_NEW_FCC_REG1 0xe8
255 #define RK818_NEW_FCC_REG0 0xe9
256 #define RK818_NON_ACT_TIMER_CNT_SAVE_REG 0xea
257 #define RK818_OCV_VOL_VALID_REG 0xeb
258 #define RK818_REBOOT_CNT_REG 0xec
259 #define RK818_POFFSET_REG 0xed
260 #define RK818_MISC_MARK_REG 0xee
261 #define RK818_HALT_CNT_REG 0xef
262 #define RK818_CALC_REST_REGH 0xf0
263 #define RK818_CALC_REST_REGL 0xf1
264 #define RK818_SAVE_DATA19 0xf2
265 #define RK818_NUM_REGULATORS 14
267 /* IRQ Definitions */
268 #define RK808_IRQ_VOUT_LO 0
269 #define RK808_IRQ_VB_LO 1
270 #define RK808_IRQ_PWRON 2
271 #define RK808_IRQ_PWRON_LP 3
272 #define RK808_IRQ_HOTDIE 4
273 #define RK808_IRQ_RTC_ALARM 5
274 #define RK808_IRQ_RTC_PERIOD 6
275 #define RK808_IRQ_PLUG_IN_INT 7
276 #define RK808_IRQ_PLUG_OUT_INT 8
277 #define RK808_NUM_IRQ 9
279 #define RK808_IRQ_VOUT_LO_MSK BIT(0)
280 #define RK808_IRQ_VB_LO_MSK BIT(1)
281 #define RK808_IRQ_PWRON_MSK BIT(2)
282 #define RK808_IRQ_PWRON_LP_MSK BIT(3)
283 #define RK808_IRQ_HOTDIE_MSK BIT(4)
284 #define RK808_IRQ_RTC_ALARM_MSK BIT(5)
285 #define RK808_IRQ_RTC_PERIOD_MSK BIT(6)
286 #define RK808_IRQ_PLUG_IN_INT_MSK BIT(0)
287 #define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1)
289 #define RK808_VBAT_LOW_2V8 0x00
290 #define RK808_VBAT_LOW_2V9 0x01
291 #define RK808_VBAT_LOW_3V0 0x02
292 #define RK808_VBAT_LOW_3V1 0x03
293 #define RK808_VBAT_LOW_3V2 0x04
294 #define RK808_VBAT_LOW_3V3 0x05
295 #define RK808_VBAT_LOW_3V4 0x06
296 #define RK808_VBAT_LOW_3V5 0x07
297 #define VBAT_LOW_VOL_MASK (0x07 << 0)
298 #define EN_VABT_LOW_SHUT_DOWN (0x00 << 4)
299 #define EN_VBAT_LOW_IRQ (0x1 << 4)
300 #define VBAT_LOW_ACT_MASK (0x1 << 4)
302 #define BUCK_ILMIN_MASK (7 << 0)
303 #define BOOST_ILMIN_MASK (7 << 0)
304 #define BUCK1_RATE_MASK (3 << 3)
305 #define BUCK2_RATE_MASK (3 << 3)
306 #define MASK_ALL 0xff
308 #define BUCK_UV_ACT_MASK 0x0f
309 #define BUCK_UV_ACT_DISABLE 0
311 #define SWITCH2_EN BIT(6)
312 #define SWITCH1_EN BIT(5)
313 #define DEV_OFF_RST BIT(3)
314 #define DEV_OFF BIT(0)
316 #define VB_LO_ACT BIT(4)
317 #define VB_LO_SEL_3500MV (7 << 0)
319 #define VOUT_LO_INT BIT(0)
320 #define CLK32KOUT2_EN BIT(0)
321 #define H5V_EN_MASK BIT(0)
322 #define H5V_EN_ENABLE BIT(0)
323 #define REF_RDY_CTRL_MASK BIT(1)
324 #define REF_RDY_CTRL_ENABLE BIT(1)
326 /*RK818_DCDC_EN_REG*/
327 #define BUCK1_EN_MASK BIT(0)
328 #define BUCK2_EN_MASK BIT(1)
329 #define BUCK3_EN_MASK BIT(2)
330 #define BUCK4_EN_MASK BIT(3)
331 #define BOOST_EN_MASK BIT(4)
332 #define LDO9_EN_MASK BIT(5)
333 #define SWITCH_EN_MASK BIT(6)
334 #define OTG_EN_MASK BIT(7)
336 #define BUCK1_EN_ENABLE BIT(0)
337 #define BUCK2_EN_ENABLE BIT(1)
338 #define BUCK3_EN_ENABLE BIT(2)
339 #define BUCK4_EN_ENABLE BIT(3)
340 #define BOOST_EN_ENABLE BIT(4)
341 #define LDO9_EN_ENABLE BIT(5)
342 #define SWITCH_EN_ENABLE BIT(6)
343 #define OTG_EN_ENABLE BIT(7)
345 /* IRQ Definitions */
346 #define RK818_IRQ_VOUT_LO 0
347 #define RK818_IRQ_VB_LO 1
348 #define RK818_IRQ_PWRON 2
349 #define RK818_IRQ_PWRON_LP 3
350 #define RK818_IRQ_HOTDIE 4
351 #define RK818_IRQ_RTC_ALARM 5
352 #define RK818_IRQ_RTC_PERIOD 6
353 #define RK818_IRQ_USB_OV 7
354 #define RK818_IRQ_PLUG_IN 8
355 #define RK818_IRQ_PLUG_OUT 9
356 #define RK818_IRQ_CHG_OK 10
357 #define RK818_IRQ_CHG_TE 11
358 #define RK818_IRQ_CHG_TS1 12
359 #define RK818_IRQ_TS2 13
360 #define RK818_IRQ_CHG_CVTLIM 14
361 #define RK818_IRQ_DISCHG_ILIM 15
363 #define BUCK1_SLP_SET_MASK BIT(0)
364 #define BUCK2_SLP_SET_MASK BIT(1)
365 #define BUCK3_SLP_SET_MASK BIT(2)
366 #define BUCK4_SLP_SET_MASK BIT(3)
367 #define BOOST_SLP_SET_MASK BIT(4)
368 #define LDO9_SLP_SET_MASK BIT(5)
369 #define SWITCH_SLP_SET_MASK BIT(6)
370 #define OTG_SLP_SET_MASK BIT(7)
372 #define BUCK1_SLP_SET_OFF BIT(0)
373 #define BUCK2_SLP_SET_OFF BIT(1)
374 #define BUCK3_SLP_SET_OFF BIT(2)
375 #define BUCK4_SLP_SET_OFF BIT(3)
376 #define BOOST_SLP_SET_OFF BIT(4)
377 #define LDO9_SLP_SET_OFF BIT(5)
378 #define SWITCH_SLP_SET_OFF BIT(6)
379 #define OTG_SLP_SET_OFF BIT(7)
381 #define BUCK1_SLP_SET_ON BIT(0)
382 #define BUCK2_SLP_SET_ON BIT(1)
383 #define BUCK3_SLP_SET_ON BIT(2)
384 #define BUCK4_SLP_SET_ON BIT(3)
385 #define BOOST_SLP_SET_ON BIT(4)
386 #define LDO9_SLP_SET_ON BIT(5)
387 #define SWITCH_SLP_SET_ON BIT(6)
388 #define OTG_SLP_SET_ON BIT(7)
390 #define VOUT_LO_MASK BIT(0)
391 #define VB_LO_MASK BIT(1)
392 #define PWRON_MASK BIT(2)
393 #define PWRON_LP_MASK BIT(3)
394 #define HOTDIE_MASK BIT(4)
395 #define RTC_ALARM_MASK BIT(5)
396 #define RTC_PERIOD_MASK BIT(6)
397 #define USB_OV_MASK BIT(7)
399 #define VOUT_LO_DISABLE BIT(0)
400 #define VB_LO_DISABLE BIT(1)
401 #define PWRON_DISABLE BIT(2)
402 #define PWRON_LP_DISABLE BIT(3)
403 #define HOTDIE_DISABLE BIT(4)
404 #define RTC_ALARM_DISABLE BIT(5)
405 #define RTC_PERIOD_DISABLE BIT(6)
406 #define USB_OV_INT_DISABLE BIT(7)
408 #define VOUT_LO_ENABLE (0 << 0)
409 #define VB_LO_ENABLE (0 << 1)
410 #define PWRON_ENABLE (0 << 2)
411 #define PWRON_LP_ENABLE (0 << 3)
412 #define HOTDIE_ENABLE (0 << 4)
413 #define RTC_ALARM_ENABLE (0 << 5)
414 #define RTC_PERIOD_ENABLE (0 << 6)
415 #define USB_OV_INT_ENABLE (0 << 7)
417 #define PLUG_IN_MASK BIT(0)
418 #define PLUG_OUT_MASK BIT(1)
419 #define CHGOK_MASK BIT(2)
420 #define CHGTE_MASK BIT(3)
421 #define CHGTS1_MASK BIT(4)
422 #define TS2_MASK BIT(5)
423 #define CHG_CVTLIM_MASK BIT(6)
424 #define DISCHG_ILIM_MASK BIT(7)
426 #define PLUG_IN_DISABLE BIT(0)
427 #define PLUG_OUT_DISABLE BIT(1)
428 #define CHGOK_DISABLE BIT(2)
429 #define CHGTE_DISABLE BIT(3)
430 #define CHGTS1_DISABLE BIT(4)
431 #define TS2_DISABLE BIT(5)
432 #define CHG_CVTLIM_DISABLE BIT(6)
433 #define DISCHG_ILIM_DISABLE BIT(7)
435 #define PLUG_IN_ENABLE BIT(0)
436 #define PLUG_OUT_ENABLE BIT(1)
437 #define CHGOK_ENABLE BIT(2)
438 #define CHGTE_ENABLE BIT(3)
439 #define CHGTS1_ENABLE BIT(4)
440 #define TS2_ENABLE BIT(5)
441 #define CHG_CVTLIM_ENABLE BIT(6)
442 #define DISCHG_ILIM_ENABLE BIT(7)
467 struct i2c_client *i2c;
468 struct regmap_irq_chip_data *irq_data;
469 struct regmap *regmap;
471 #endif /* __LINUX_REGULATOR_rk808_H */