4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
55 /* Include the ID list */
56 #include <linux/pci_ids.h>
58 /* pci_slot represents a physical slot */
60 struct pci_bus *bus; /* The bus this slot is on */
61 struct list_head list; /* node in list of slots on this bus */
62 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
63 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
67 /* File state for mmap()s on /proc/bus/pci/X/Y */
73 /* This defines the direction arg to the DMA mapping routines. */
74 #define PCI_DMA_BIDIRECTIONAL 0
75 #define PCI_DMA_TODEVICE 1
76 #define PCI_DMA_FROMDEVICE 2
77 #define PCI_DMA_NONE 3
79 #define DEVICE_COUNT_RESOURCE 12
81 typedef int __bitwise pci_power_t;
83 #define PCI_D0 ((pci_power_t __force) 0)
84 #define PCI_D1 ((pci_power_t __force) 1)
85 #define PCI_D2 ((pci_power_t __force) 2)
86 #define PCI_D3hot ((pci_power_t __force) 3)
87 #define PCI_D3cold ((pci_power_t __force) 4)
88 #define PCI_UNKNOWN ((pci_power_t __force) 5)
89 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
91 /** The pci_channel state describes connectivity between the CPU and
92 * the pci device. If some PCI bus between here and the pci device
93 * has crashed or locked up, this info is reflected here.
95 typedef unsigned int __bitwise pci_channel_state_t;
97 enum pci_channel_state {
98 /* I/O channel is in normal state */
99 pci_channel_io_normal = (__force pci_channel_state_t) 1,
101 /* I/O to channel is blocked */
102 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
104 /* PCI card is dead */
105 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
108 typedef unsigned int __bitwise pcie_reset_state_t;
110 enum pcie_reset_state {
111 /* Reset is NOT asserted (Use to deassert reset) */
112 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
114 /* Use #PERST to reset PCI-E device */
115 pcie_warm_reset = (__force pcie_reset_state_t) 2,
117 /* Use PCI-E Hot Reset to reset device */
118 pcie_hot_reset = (__force pcie_reset_state_t) 3
121 typedef unsigned short __bitwise pci_dev_flags_t;
123 /* INTX_DISABLE in PCI_COMMAND register disables MSI
126 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
129 typedef unsigned short __bitwise pci_bus_flags_t;
131 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
132 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
135 struct pci_cap_saved_state {
136 struct hlist_node next;
141 struct pcie_link_state;
145 * The pci_dev structure is used to describe PCI devices.
148 struct list_head bus_list; /* node in per-bus list */
149 struct pci_bus *bus; /* bus this device is on */
150 struct pci_bus *subordinate; /* bus this device bridges to */
152 void *sysdata; /* hook for sys-specific extension */
153 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
154 struct pci_slot *slot; /* Physical slot this device is in */
156 unsigned int devfn; /* encoded device & function index */
157 unsigned short vendor;
158 unsigned short device;
159 unsigned short subsystem_vendor;
160 unsigned short subsystem_device;
161 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
162 u8 revision; /* PCI revision, low byte of class word */
163 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
164 u8 pcie_type; /* PCI-E device/port type */
165 u8 rom_base_reg; /* which config register controls the ROM */
166 u8 pin; /* which interrupt pin this device uses */
168 struct pci_driver *driver; /* which driver has allocated this device */
169 u64 dma_mask; /* Mask of the bits of bus address this
170 device implements. Normally this is
171 0xffffffff. You only need to change
172 this if your device has broken DMA
173 or supports 64-bit transfers. */
175 struct device_dma_parameters dma_parms;
177 pci_power_t current_state; /* Current operating state. In ACPI-speak,
178 this is D0-D3, D0 being fully functional,
180 int pm_cap; /* PM capability offset in the
181 configuration space */
182 unsigned int pme_support:5; /* Bitmask of states from which PME#
184 unsigned int d1_support:1; /* Low power state D1 is supported */
185 unsigned int d2_support:1; /* Low power state D2 is supported */
186 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
188 #ifdef CONFIG_PCIEASPM
189 struct pcie_link_state *link_state; /* ASPM link state. */
192 pci_channel_state_t error_state; /* current connectivity state */
193 struct device dev; /* Generic device interface */
195 int cfg_size; /* Size of configuration space */
198 * Instead of touching interrupt line and base address registers
199 * directly, use the values stored here. They might be different!
202 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
204 /* These fields are used by common fixups */
205 unsigned int transparent:1; /* Transparent PCI bridge */
206 unsigned int multifunction:1;/* Part of multi-function device */
207 /* keep track of device state */
208 unsigned int is_added:1;
209 unsigned int is_busmaster:1; /* device is busmaster */
210 unsigned int no_msi:1; /* device may not use msi */
211 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
212 unsigned int broken_parity_status:1; /* Device generates false positive parity */
213 unsigned int msi_enabled:1;
214 unsigned int msix_enabled:1;
215 unsigned int is_managed:1;
216 unsigned int is_pcie:1;
217 pci_dev_flags_t dev_flags;
218 atomic_t enable_cnt; /* pci_enable_device has been called */
220 u32 saved_config_space[16]; /* config space saved at suspend time */
221 struct hlist_head saved_cap_space;
222 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
223 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
224 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
225 #ifdef CONFIG_PCI_MSI
226 struct list_head msi_list;
231 extern struct pci_dev *alloc_pci_dev(void);
233 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
234 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
235 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
237 static inline int pci_channel_offline(struct pci_dev *pdev)
239 return (pdev->error_state != pci_channel_io_normal);
242 static inline struct pci_cap_saved_state *pci_find_saved_cap(
243 struct pci_dev *pci_dev, char cap)
245 struct pci_cap_saved_state *tmp;
246 struct hlist_node *pos;
248 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
249 if (tmp->cap_nr == cap)
255 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
256 struct pci_cap_saved_state *new_cap)
258 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
262 * For PCI devices, the region numbers are assigned this way:
264 * 0-5 standard PCI regions
266 * 7-10 bridges: address space assigned to buses behind the bridge
269 #define PCI_ROM_RESOURCE 6
270 #define PCI_BRIDGE_RESOURCES 7
271 #define PCI_NUM_RESOURCES 11
273 #ifndef PCI_BUS_NUM_RESOURCES
274 #define PCI_BUS_NUM_RESOURCES 16
277 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
280 struct list_head node; /* node in list of buses */
281 struct pci_bus *parent; /* parent bus this bridge is on */
282 struct list_head children; /* list of child buses */
283 struct list_head devices; /* list of devices on this bus */
284 struct pci_dev *self; /* bridge device as seen by parent */
285 struct list_head slots; /* list of slots on this bus */
286 struct resource *resource[PCI_BUS_NUM_RESOURCES];
287 /* address space routed to this bus */
289 struct pci_ops *ops; /* configuration access functions */
290 void *sysdata; /* hook for sys-specific extension */
291 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
293 unsigned char number; /* bus number */
294 unsigned char primary; /* number of primary bridge */
295 unsigned char secondary; /* number of secondary bridge */
296 unsigned char subordinate; /* max number of subordinate buses */
300 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
301 pci_bus_flags_t bus_flags; /* Inherited by child busses */
302 struct device *bridge;
304 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
305 struct bin_attribute *legacy_mem; /* legacy mem */
306 unsigned int is_added:1;
309 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
310 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
313 * Error values that may be returned by PCI functions.
315 #define PCIBIOS_SUCCESSFUL 0x00
316 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
317 #define PCIBIOS_BAD_VENDOR_ID 0x83
318 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
319 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
320 #define PCIBIOS_SET_FAILED 0x88
321 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
323 /* Low-level architecture-dependent routines */
326 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
327 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
331 * ACPI needs to be able to access PCI config space before we've done a
332 * PCI bus scan and created pci_bus structures.
334 extern int raw_pci_read(unsigned int domain, unsigned int bus,
335 unsigned int devfn, int reg, int len, u32 *val);
336 extern int raw_pci_write(unsigned int domain, unsigned int bus,
337 unsigned int devfn, int reg, int len, u32 val);
339 struct pci_bus_region {
340 resource_size_t start;
345 spinlock_t lock; /* protects list, index */
346 struct list_head list; /* for IDs added at runtime */
347 unsigned int use_driver_data:1; /* pci_device_id->driver_data is used */
350 /* ---------------------------------------------------------------- */
351 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
352 * a set of callbacks in struct pci_error_handlers, then that device driver
353 * will be notified of PCI bus errors, and will be driven to recovery
354 * when an error occurs.
357 typedef unsigned int __bitwise pci_ers_result_t;
359 enum pci_ers_result {
360 /* no result/none/not supported in device driver */
361 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
363 /* Device driver can recover without slot reset */
364 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
366 /* Device driver wants slot to be reset. */
367 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
369 /* Device has completely failed, is unrecoverable */
370 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
372 /* Device driver is fully recovered and operational */
373 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
376 /* PCI bus error event callbacks */
377 struct pci_error_handlers {
378 /* PCI bus error detected on this device */
379 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
380 enum pci_channel_state error);
382 /* MMIO has been re-enabled, but not DMA */
383 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
385 /* PCI Express link has been reset */
386 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
388 /* PCI slot has been reset */
389 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
391 /* Device driver may resume normal operations */
392 void (*resume)(struct pci_dev *dev);
395 /* ---------------------------------------------------------------- */
399 struct list_head node;
401 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
402 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
403 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
404 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
405 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
406 int (*resume_early) (struct pci_dev *dev);
407 int (*resume) (struct pci_dev *dev); /* Device woken up */
408 void (*shutdown) (struct pci_dev *dev);
409 struct pm_ext_ops *pm;
410 struct pci_error_handlers *err_handler;
411 struct device_driver driver;
412 struct pci_dynids dynids;
415 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
418 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
419 * @_table: device table name
421 * This macro is used to create a struct pci_device_id array (a device table)
422 * in a generic manner.
424 #define DEFINE_PCI_DEVICE_TABLE(_table) \
425 const struct pci_device_id _table[] __devinitconst
428 * PCI_DEVICE - macro used to describe a specific pci device
429 * @vend: the 16 bit PCI Vendor ID
430 * @dev: the 16 bit PCI Device ID
432 * This macro is used to create a struct pci_device_id that matches a
433 * specific device. The subvendor and subdevice fields will be set to
436 #define PCI_DEVICE(vend,dev) \
437 .vendor = (vend), .device = (dev), \
438 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
441 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
442 * @dev_class: the class, subclass, prog-if triple for this device
443 * @dev_class_mask: the class mask for this device
445 * This macro is used to create a struct pci_device_id that matches a
446 * specific PCI class. The vendor, device, subvendor, and subdevice
447 * fields will be set to PCI_ANY_ID.
449 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
450 .class = (dev_class), .class_mask = (dev_class_mask), \
451 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
452 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
455 * PCI_VDEVICE - macro used to describe a specific pci device in short form
456 * @vend: the vendor name
457 * @dev: the 16 bit PCI Device ID
459 * This macro is used to create a struct pci_device_id that matches a
460 * specific PCI device. The subvendor, and subdevice fields will be set
461 * to PCI_ANY_ID. The macro allows the next field to follow as the device
465 #define PCI_VDEVICE(vendor, device) \
466 PCI_VENDOR_ID_##vendor, (device), \
467 PCI_ANY_ID, PCI_ANY_ID, 0, 0
469 /* these external functions are only available when PCI support is enabled */
472 extern struct bus_type pci_bus_type;
474 /* Do NOT directly access these two variables, unless you are arch specific pci
475 * code, or pci core code. */
476 extern struct list_head pci_root_buses; /* list of all known PCI buses */
477 /* Some device drivers need know if pci is initiated */
478 extern int no_pci_devices(void);
480 void pcibios_fixup_bus(struct pci_bus *);
481 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
482 char *pcibios_setup(char *str);
484 /* Used only when drivers/pci/setup.c is used */
485 void pcibios_align_resource(void *, struct resource *, resource_size_t,
487 void pcibios_update_irq(struct pci_dev *, int irq);
489 /* Generic PCI functions used internally */
491 extern struct pci_bus *pci_find_bus(int domain, int busnr);
492 void pci_bus_add_devices(struct pci_bus *bus);
493 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
494 struct pci_ops *ops, void *sysdata);
495 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
498 struct pci_bus *root_bus;
499 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
501 pci_bus_add_devices(root_bus);
504 struct pci_bus *pci_create_bus(struct device *parent, int bus,
505 struct pci_ops *ops, void *sysdata);
506 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
508 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
510 void pci_destroy_slot(struct pci_slot *slot);
511 void pci_update_slot_number(struct pci_slot *slot, int slot_nr);
512 int pci_scan_slot(struct pci_bus *bus, int devfn);
513 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
514 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
515 unsigned int pci_scan_child_bus(struct pci_bus *bus);
516 int __must_check pci_bus_add_device(struct pci_dev *dev);
517 void pci_read_bridge_bases(struct pci_bus *child);
518 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
519 struct resource *res);
520 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
521 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
522 extern void pci_dev_put(struct pci_dev *dev);
523 extern void pci_remove_bus(struct pci_bus *b);
524 extern void pci_remove_bus_device(struct pci_dev *dev);
525 extern void pci_stop_bus_device(struct pci_dev *dev);
526 void pci_setup_cardbus(struct pci_bus *bus);
527 extern void pci_sort_breadthfirst(void);
529 /* Generic PCI functions exported to card drivers */
531 #ifdef CONFIG_PCI_LEGACY
532 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
534 const struct pci_dev *from);
535 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
537 #endif /* CONFIG_PCI_LEGACY */
539 int pci_find_capability(struct pci_dev *dev, int cap);
540 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
541 int pci_find_ext_capability(struct pci_dev *dev, int cap);
542 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
543 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
544 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
546 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
547 struct pci_dev *from);
548 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
549 unsigned int ss_vendor, unsigned int ss_device,
550 const struct pci_dev *from);
551 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
552 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
553 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
554 int pci_dev_present(const struct pci_device_id *ids);
556 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
558 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
559 int where, u16 *val);
560 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
561 int where, u32 *val);
562 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
564 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
566 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
569 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
571 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
573 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
575 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
577 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
580 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
582 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
584 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
586 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
588 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
590 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
593 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
596 int __must_check pci_enable_device(struct pci_dev *dev);
597 int __must_check pci_enable_device_io(struct pci_dev *dev);
598 int __must_check pci_enable_device_mem(struct pci_dev *dev);
599 int __must_check pci_reenable_device(struct pci_dev *);
600 int __must_check pcim_enable_device(struct pci_dev *pdev);
601 void pcim_pin_device(struct pci_dev *pdev);
603 static inline int pci_is_managed(struct pci_dev *pdev)
605 return pdev->is_managed;
608 void pci_disable_device(struct pci_dev *dev);
609 void pci_set_master(struct pci_dev *dev);
610 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
611 #define HAVE_PCI_SET_MWI
612 int __must_check pci_set_mwi(struct pci_dev *dev);
613 int pci_try_set_mwi(struct pci_dev *dev);
614 void pci_clear_mwi(struct pci_dev *dev);
615 void pci_intx(struct pci_dev *dev, int enable);
616 void pci_msi_off(struct pci_dev *dev);
617 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
618 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
619 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
620 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
621 int pcix_get_max_mmrbc(struct pci_dev *dev);
622 int pcix_get_mmrbc(struct pci_dev *dev);
623 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
624 int pcie_get_readrq(struct pci_dev *dev);
625 int pcie_set_readrq(struct pci_dev *dev, int rq);
626 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
627 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
628 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
630 /* ROM control related routines */
631 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
632 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
633 size_t pci_get_rom_size(void __iomem *rom, size_t size);
635 /* Power management related routines */
636 int pci_save_state(struct pci_dev *dev);
637 int pci_restore_state(struct pci_dev *dev);
638 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
639 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
640 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
641 int pci_prepare_to_sleep(struct pci_dev *dev);
642 int pci_back_from_sleep(struct pci_dev *dev);
644 /* Functions for PCI Hotplug drivers to use */
645 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
647 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
648 void pci_bus_assign_resources(struct pci_bus *bus);
649 void pci_bus_size_bridges(struct pci_bus *bus);
650 int pci_claim_resource(struct pci_dev *, int);
651 void pci_assign_unassigned_resources(void);
652 void pdev_enable_device(struct pci_dev *);
653 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
654 int pci_enable_resources(struct pci_dev *, int mask);
655 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
656 int (*)(struct pci_dev *, u8, u8));
657 #define HAVE_PCI_REQ_REGIONS 2
658 int __must_check pci_request_regions(struct pci_dev *, const char *);
659 void pci_release_regions(struct pci_dev *);
660 int __must_check pci_request_region(struct pci_dev *, int, const char *);
661 void pci_release_region(struct pci_dev *, int);
662 int pci_request_selected_regions(struct pci_dev *, int, const char *);
663 void pci_release_selected_regions(struct pci_dev *, int);
665 /* drivers/pci/bus.c */
666 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
667 struct resource *res, resource_size_t size,
668 resource_size_t align, resource_size_t min,
669 unsigned int type_mask,
670 void (*alignf)(void *, struct resource *,
671 resource_size_t, resource_size_t),
673 void pci_enable_bridges(struct pci_bus *bus);
675 /* Proper probing supporting hot-pluggable devices */
676 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
677 const char *mod_name);
678 static inline int __must_check pci_register_driver(struct pci_driver *driver)
680 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
683 void pci_unregister_driver(struct pci_driver *dev);
684 void pci_remove_behind_bridge(struct pci_dev *dev);
685 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
686 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
687 struct pci_dev *dev);
688 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
691 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
693 int pci_cfg_space_size_ext(struct pci_dev *dev);
694 int pci_cfg_space_size(struct pci_dev *dev);
695 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
697 /* kmem_cache style wrapper around pci_alloc_consistent() */
699 #include <linux/dmapool.h>
701 #define pci_pool dma_pool
702 #define pci_pool_create(name, pdev, size, align, allocation) \
703 dma_pool_create(name, &pdev->dev, size, align, allocation)
704 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
705 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
706 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
708 enum pci_dma_burst_strategy {
709 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
710 strategy_parameter is N/A */
711 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
713 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
714 strategy_parameter byte boundaries */
718 u16 vector; /* kernel uses to write allocated vector */
719 u16 entry; /* driver uses to specify entry, OS writes */
723 #ifndef CONFIG_PCI_MSI
724 static inline int pci_enable_msi(struct pci_dev *dev)
729 static inline void pci_msi_shutdown(struct pci_dev *dev)
731 static inline void pci_disable_msi(struct pci_dev *dev)
734 static inline int pci_enable_msix(struct pci_dev *dev,
735 struct msix_entry *entries, int nvec)
740 static inline void pci_msix_shutdown(struct pci_dev *dev)
742 static inline void pci_disable_msix(struct pci_dev *dev)
745 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
748 static inline void pci_restore_msi_state(struct pci_dev *dev)
751 extern int pci_enable_msi(struct pci_dev *dev);
752 extern void pci_msi_shutdown(struct pci_dev *dev);
753 extern void pci_disable_msi(struct pci_dev *dev);
754 extern int pci_enable_msix(struct pci_dev *dev,
755 struct msix_entry *entries, int nvec);
756 extern void pci_msix_shutdown(struct pci_dev *dev);
757 extern void pci_disable_msix(struct pci_dev *dev);
758 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
759 extern void pci_restore_msi_state(struct pci_dev *dev);
763 /* The functions a driver should call */
764 int ht_create_irq(struct pci_dev *dev, int idx);
765 void ht_destroy_irq(unsigned int irq);
766 #endif /* CONFIG_HT_IRQ */
768 extern void pci_block_user_cfg_access(struct pci_dev *dev);
769 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
772 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
773 * a PCI domain is defined to be a set of PCI busses which share
774 * configuration space.
776 #ifdef CONFIG_PCI_DOMAINS
777 extern int pci_domains_supported;
779 enum { pci_domains_supported = 0 };
780 static inline int pci_domain_nr(struct pci_bus *bus)
785 static inline int pci_proc_domain(struct pci_bus *bus)
789 #endif /* CONFIG_PCI_DOMAINS */
791 #else /* CONFIG_PCI is not enabled */
794 * If the system does not have PCI, clearly these return errors. Define
795 * these as simple inline functions to avoid hair in drivers.
798 #define _PCI_NOP(o, s, t) \
799 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
801 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
803 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
804 _PCI_NOP(o, word, u16 x) \
805 _PCI_NOP(o, dword, u32 x)
806 _PCI_NOP_ALL(read, *)
809 static inline struct pci_dev *pci_find_device(unsigned int vendor,
811 const struct pci_dev *from)
816 static inline struct pci_dev *pci_find_slot(unsigned int bus,
822 static inline struct pci_dev *pci_get_device(unsigned int vendor,
824 struct pci_dev *from)
829 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
831 unsigned int ss_vendor,
832 unsigned int ss_device,
833 const struct pci_dev *from)
838 static inline struct pci_dev *pci_get_class(unsigned int class,
839 struct pci_dev *from)
844 #define pci_dev_present(ids) (0)
845 #define no_pci_devices() (1)
846 #define pci_dev_put(dev) do { } while (0)
848 static inline void pci_set_master(struct pci_dev *dev)
851 static inline int pci_enable_device(struct pci_dev *dev)
856 static inline void pci_disable_device(struct pci_dev *dev)
859 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
864 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
869 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
875 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
881 static inline int pci_assign_resource(struct pci_dev *dev, int i)
886 static inline int __pci_register_driver(struct pci_driver *drv,
887 struct module *owner)
892 static inline int pci_register_driver(struct pci_driver *drv)
897 static inline void pci_unregister_driver(struct pci_driver *drv)
900 static inline int pci_find_capability(struct pci_dev *dev, int cap)
905 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
911 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
916 /* Power management related routines */
917 static inline int pci_save_state(struct pci_dev *dev)
922 static inline int pci_restore_state(struct pci_dev *dev)
927 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
932 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
938 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
944 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
949 static inline void pci_release_regions(struct pci_dev *dev)
952 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
954 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
957 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
960 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
963 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
967 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
971 #endif /* CONFIG_PCI */
973 /* Include architecture-dependent settings and functions */
977 /* these helpers provide future and backwards compatibility
978 * for accessing popular PCI BAR info */
979 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
980 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
981 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
982 #define pci_resource_len(dev,bar) \
983 ((pci_resource_start((dev), (bar)) == 0 && \
984 pci_resource_end((dev), (bar)) == \
985 pci_resource_start((dev), (bar))) ? 0 : \
987 (pci_resource_end((dev), (bar)) - \
988 pci_resource_start((dev), (bar)) + 1))
990 /* Similar to the helpers above, these manipulate per-pci_dev
991 * driver-specific data. They are really just a wrapper around
992 * the generic device structure functions of these calls.
994 static inline void *pci_get_drvdata(struct pci_dev *pdev)
996 return dev_get_drvdata(&pdev->dev);
999 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1001 dev_set_drvdata(&pdev->dev, data);
1004 /* If you want to know what to call your pci_dev, ask this function.
1005 * Again, it's a wrapper around the generic device.
1007 static inline const char *pci_name(struct pci_dev *pdev)
1009 return dev_name(&pdev->dev);
1013 /* Some archs don't want to expose struct resource to userland as-is
1014 * in sysfs and /proc
1016 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1017 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1018 const struct resource *rsrc, resource_size_t *start,
1019 resource_size_t *end)
1021 *start = rsrc->start;
1024 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1028 * The world is not perfect and supplies us with broken PCI devices.
1029 * For at least a part of these bugs we need a work-around, so both
1030 * generic (drivers/pci/quirks.c) and per-architecture code can define
1031 * fixup hooks to be called for particular buggy devices.
1035 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1036 void (*hook)(struct pci_dev *dev);
1039 enum pci_fixup_pass {
1040 pci_fixup_early, /* Before probing BARs */
1041 pci_fixup_header, /* After reading configuration header */
1042 pci_fixup_final, /* Final phase of device fixups */
1043 pci_fixup_enable, /* pci_enable_device() time */
1044 pci_fixup_resume, /* pci_device_resume() */
1045 pci_fixup_suspend, /* pci_device_suspend */
1046 pci_fixup_resume_early, /* pci_device_resume_early() */
1049 /* Anonymous variables would be nice... */
1050 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1051 static const struct pci_fixup __pci_fixup_##name __used \
1052 __attribute__((__section__(#section))) = { vendor, device, hook };
1053 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1054 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1055 vendor##device##hook, vendor, device, hook)
1056 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1057 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1058 vendor##device##hook, vendor, device, hook)
1059 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1060 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1061 vendor##device##hook, vendor, device, hook)
1062 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1063 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1064 vendor##device##hook, vendor, device, hook)
1065 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1066 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1067 resume##vendor##device##hook, vendor, device, hook)
1068 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1069 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1070 resume_early##vendor##device##hook, vendor, device, hook)
1071 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1072 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1073 suspend##vendor##device##hook, vendor, device, hook)
1076 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1078 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1079 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1080 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1081 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1082 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1084 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1086 extern int pci_pci_problems;
1087 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1088 #define PCIPCI_TRITON 2
1089 #define PCIPCI_NATOMA 4
1090 #define PCIPCI_VIAETBF 8
1091 #define PCIPCI_VSFX 16
1092 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1093 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1095 extern unsigned long pci_cardbus_io_size;
1096 extern unsigned long pci_cardbus_mem_size;
1098 int pcibios_add_platform_entries(struct pci_dev *dev);
1099 void pcibios_disable_device(struct pci_dev *dev);
1100 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1101 enum pcie_reset_state state);
1103 #ifdef CONFIG_PCI_MMCONFIG
1104 extern void __init pci_mmcfg_early_init(void);
1105 extern void __init pci_mmcfg_late_init(void);
1107 static inline void pci_mmcfg_early_init(void) { }
1108 static inline void pci_mmcfg_late_init(void) { }
1111 #endif /* __KERNEL__ */
1112 #endif /* LINUX_PCI_H */