1 /* drivers/video/rk_fb.h
3 * Copyright (C) 2010 ROCKCHIP, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
16 #ifndef __ARCH_ARM_MACH_RK30_FB_H
17 #define __ARCH_ARM_MACH_RK30_FB_H
20 #include <linux/platform_device.h>
21 #include <linux/completion.h>
22 #include <linux/spinlock.h>
23 #include <asm/atomic.h>
24 #include <linux/rk_screen.h>
25 #if defined(CONFIG_OF)
26 #include <dt-bindings/rkfb/rk_fb.h>
28 #include "../../drivers/staging/android/sw_sync.h"
29 #include <linux/file.h>
30 #include <linux/kthread.h>
33 #define RK30_MAX_LCDC_SUPPORT 2
34 #define RK30_MAX_LAYER_SUPPORT 5
35 #define RK_MAX_FB_SUPPORT 5
36 #define RK_WIN_MAX_AREA 4
37 #define RK_MAX_BUF_NUM 11
39 #define FB0_IOCTL_STOP_TIMER_FLUSH 0x6001
40 #define FB0_IOCTL_SET_PANEL 0x6002
46 #define FB0_IOCTL_SET_BUF 0x6017
47 #define FB0_IOCTL_COPY_CURBUF 0x6018
48 #define FB0_IOCTL_CLOSE_BUF 0x6019
51 #define RK_FBIOGET_PANEL_SIZE 0x5001
52 #define RK_FBIOSET_YUV_ADDR 0x5002
53 #define RK_FBIOGET_SCREEN_STATE 0X4620
54 #define RK_FBIOGET_16OR32 0X4621
55 #define RK_FBIOGET_IDLEFBUff_16OR32 0X4622
56 #define RK_FBIOSET_COMPOSE_LAYER_COUNTS 0X4623
57 #define RK_FBIOSET_HWC_ADDR 0x4624
59 #define RK_FBIOGET_DMABUF_FD 0x5003
60 #define RK_FBIOSET_DMABUF_FD 0x5004
61 #define RK_FB_IOCTL_SET_I2P_ODD_ADDR 0x5005
62 #define RK_FB_IOCTL_SET_I2P_EVEN_ADDR 0x5006
63 #define RK_FBIOSET_OVERLAY_STA 0x5018
64 #define RK_FBIOGET_OVERLAY_STA 0X4619
65 #define RK_FBIOSET_ENABLE 0x5019
66 #define RK_FBIOGET_ENABLE 0x5020
67 #define RK_FBIOSET_CONFIG_DONE 0x4628
68 #define RK_FBIOSET_VSYNC_ENABLE 0x4629
69 #define RK_FBIOPUT_NUM_BUFFERS 0x4625
70 #define RK_FBIOPUT_COLOR_KEY_CFG 0x4626
71 #define RK_FBIOGET_DSP_ADDR 0x4630
72 #define RK_FBIOGET_LIST_STA 0X4631
73 #define RK_FBIOGET_IOMMU_STA 0x4632
74 #define RK_FBIOSET_CLEAR_FB 0x4633
78 #define RK_LF_STATUS_FC 0xef
79 #define RK_LF_STATUS_FR 0xee
80 #define RK_LF_STATUS_NC 0xfe
81 #define RK_LF_MAX_TIMEOUT (1600000UL << 6) //>0.64s
84 /* x y mirror or rotate mode */
86 #define X_MIRROR 1 /* up-down flip*/
87 #define Y_MIRROR 2 /* left-right flip */
88 #define X_Y_MIRROR 3 /* the same as rotate 180 degrees */
89 #define ROTATE_90 4 /* clockwise rotate 90 degrees */
90 #define ROTATE_180 8 /* rotate 180 degrees
91 * It is recommended to use X_Y_MIRROR
92 * rather than ROTATE_180
94 #define ROTATE_270 12 /* clockwise rotate 270 degrees */
98 * pixel align value for gpu,align as 64 bytes in an odd number of times
100 #define ALIGN_PIXEL_64BYTE_RGB565 32 /* 64/2*/
101 #define ALIGN_PIXEL_64BYTE_RGB8888 16 /* 64/4*/
102 #define ALIGN_N_TIMES(x, align) (((x) % (align) == 0) ? (x) : (((x) + ((align) - 1)) & (~((align) - 1))))
103 #define ALIGN_ODD_TIMES(x, align) (((x) % ((align) * 2) == 0) ? ((x) + (align)) : (x))
104 #define ALIGN_64BYTE_ODD_TIMES(x, align) ALIGN_ODD_TIMES(ALIGN_N_TIMES(x, align), align)
106 #define DUMP_FRAME_NUM 3
108 //#define USE_ION_MMU 1
109 #if defined(CONFIG_ION_ROCKCHIP)
110 extern struct ion_client *rockchip_ion_client_create(const char *name);
113 extern int rk_fb_poll_prmry_screen_vblank(void);
114 extern u32 rk_fb_get_prmry_screen_ft(void);
115 extern u32 rk_fb_get_prmry_screen_vbt(void);
116 extern u64 rk_fb_get_prmry_screen_framedone_t(void);
117 extern int rk_fb_set_prmry_screen_status(int status);
118 extern bool rk_fb_poll_wait_frame_complete(void);
120 /********************************************************************
121 ** display output interface supported by rockchip lcdc *
122 ********************************************************************/
124 #define OUT_P888 0 //24bit screen,connect to lcdc D0~D23
125 #define OUT_P666 1 //18bit screen,connect to lcdc D0~D17
128 #define OUT_CCIR656 6
130 #define OUT_S888DUMY 12
131 #define OUT_YUV_420 14
132 #define OUT_RGB_AAA 15
133 #define OUT_P16BPP4 24
134 #define OUT_D888_P666 0x21 //18bit screen,connect to lcdc D2~D7, D10~D15, D18~D23
135 #define OUT_D888_P565 0x22
138 * pixel format definitions,this is copy from android/system/core/include/system/graphics.h
142 HAL_PIXEL_FORMAT_RGBA_8888 = 1,
143 HAL_PIXEL_FORMAT_RGBX_8888 = 2,
144 HAL_PIXEL_FORMAT_RGB_888 = 3,
145 HAL_PIXEL_FORMAT_RGB_565 = 4,
146 HAL_PIXEL_FORMAT_BGRA_8888 = 5,
147 HAL_PIXEL_FORMAT_RGBA_5551 = 6,
148 HAL_PIXEL_FORMAT_RGBA_4444 = 7,
150 /* 0x8 - 0xFF range unavailable */
155 * This range is reserved for pixel formats that are specific to the HAL
156 * implementation. Implementations can use any value in this range to
157 * communicate video pixel formats between their HAL modules. These formats
158 * must not have an alpha channel. Additionally, an EGLimage created from a
159 * gralloc buffer of one of these formats must be supported for use with the
160 * GL_OES_EGL_image_external OpenGL ES extension.
164 * Android YUV format:
166 * This format is exposed outside of the HAL to software decoders and
167 * applications. EGLImageKHR must support it in conjunction with the
168 * OES_EGL_image_external extension.
170 * YV12 is a 4:2:0 YCrCb planar format comprised of a WxH Y plane followed
171 * by (W/2) x (H/2) Cr and Cb planes.
173 * This format assumes
176 * - a horizontal stride multiple of 16 pixels
177 * - a vertical stride equal to the height
179 * y_size = stride * height
180 * c_size = ALIGN(stride/2, 16) * height/2
181 * size = y_size + c_size * 2
183 * cb_offset = y_size + c_size
186 HAL_PIXEL_FORMAT_YV12 = 0x32315659, // YCrCb 4:2:0 Planar
188 /* Legacy formats (deprecated), used by ImageFormat.java */
189 HAL_PIXEL_FORMAT_YCbCr_422_SP = 0x10, // NV16
190 HAL_PIXEL_FORMAT_YCrCb_420_SP = 0x11, // NV21
191 HAL_PIXEL_FORMAT_YCbCr_422_I = 0x14, // YUY2
192 HAL_PIXEL_FORMAT_YCrCb_NV12 = 0x20, // YUY2
193 HAL_PIXEL_FORMAT_YCrCb_NV12_VIDEO = 0x21, // YUY2
195 HAL_PIXEL_FORMAT_YCrCb_NV12_10 = 0x22, // YUV420_1obit
196 HAL_PIXEL_FORMAT_YCbCr_422_SP_10 = 0x23, // YUV422_1obit
197 HAL_PIXEL_FORMAT_YCrCb_420_SP_10 = 0x24, //YUV444_1obit
199 HAL_PIXEL_FORMAT_YCrCb_444 = 0x25, //yuv444
200 HAL_PIXEL_FORMAT_FBDC_RGB565 = 0x26,
201 HAL_PIXEL_FORMAT_FBDC_U8U8U8U8 = 0x27, /*ARGB888*/
202 HAL_PIXEL_FORMAT_FBDC_U8U8U8 = 0x28, /*RGBP888*/
203 HAL_PIXEL_FORMAT_FBDC_RGBA888 = 0x29, /*ABGR888*/
206 //display data format
246 SCREEN_PREPARE_DDR_CHANGE = 0x0,
247 SCREEN_UNPREPARE_DDR_CHANGE,
251 GET_PAGE_FAULT = 0x0,
252 CLR_PAGE_FAULT = 0x1,
253 UNMASK_PAGE_FAULT = 0x2
257 struct fb_bitfield red;
258 struct fb_bitfield green;
259 struct fb_bitfield blue;
260 struct fb_bitfield transp;
263 struct rk_fb_frame_time {
264 u64 last_framedone_t;
270 wait_queue_head_t wait;
275 struct mutex irq_lock;
276 struct task_struct *thread;
279 struct color_key_cfg {
280 u32 win0_color_key_cfg;
281 u32 win1_color_key_cfg;
282 u32 win2_color_key_cfg;
291 const char *rgl_name;
296 struct rk_disp_pwr_ctr_list {
297 struct list_head list;
298 struct pwr_ctr pwr_ctr;
301 typedef enum _TRSP_MODE {
311 struct rk_lcdc_post_cfg {
318 struct rk_lcdc_bcsh {
327 struct rk_lcdc_win_area {
329 enum data_format format;
333 u32 y_offset; /*yuv/rgb offset -->LCDC_WINx_YRGB_MSTx*/
334 u32 c_offset; /*cb cr offset--->LCDC_WINx_CBR_MSTx*/
335 u16 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
337 u16 xsize; /* display window width/height -->LCDC_WINx_DSP_INFO*/
339 u16 xact; /*origin display window size -->LCDC_WINx_ACT_INFO*/
341 u16 xvir; /*virtual width/height -->LCDC_WINx_VIR*/
343 u16 xoff; /*mem offset*/
345 unsigned long smem_start;
346 unsigned long cbr_start; /*Cbr memory start address*/
347 #if defined(CONFIG_ION_ROCKCHIP)
348 struct ion_handle *ion_hdl;
350 struct dma_buf *dma_buf;
362 u8 fbdc_dsp_width_ratio;
364 u16 fbdc_mb_vir_width;
365 u16 fbdc_mb_vir_height;
371 u16 fbdc_cmp_index_init;
378 bool state; /*on or off*/
379 bool last_state; /*on or off*/
381 int z_order; /*win sel layer*/
394 u8 yrgb_hor_scl_mode;//h 01:scale up ;10:down
395 u8 yrgb_ver_scl_mode;//v 01:scale up ;10:down
396 u8 yrgb_hsd_mode;//h scale down mode
397 u8 yrgb_vsu_mode;//v scale up mode
398 u8 yrgb_vsd_mode;//v scale down mode
416 struct rk_lcdc_win_area area[RK_WIN_MAX_AREA];
417 struct rk_lcdc_post_cfg post_cfg;
420 struct rk_lcdc_driver;
422 struct rk_fb_trsm_ops {
424 int (*disable)(void);
425 int (*dsp_pwr_on) (void);
426 int (*dsp_pwr_off) (void);
429 struct rk_lcdc_drv_ops {
430 int (*open) (struct rk_lcdc_driver *dev_drv, int layer_id, bool open);
431 int (*win_direct_en)(struct rk_lcdc_driver *dev_drv, int win_id, int en);
432 int (*init_lcdc) (struct rk_lcdc_driver *dev_drv);
433 int (*ioctl) (struct rk_lcdc_driver *dev_drv, unsigned int cmd,
434 unsigned long arg, int layer_id);
435 int (*suspend) (struct rk_lcdc_driver *dev_drv);
436 int (*resume) (struct rk_lcdc_driver *dev_drv);
437 int (*blank) (struct rk_lcdc_driver *dev_drv, int layer_id,
439 int (*set_par) (struct rk_lcdc_driver *dev_drv, int layer_id);
440 int (*pan_display) (struct rk_lcdc_driver *dev_drv, int layer_id);
441 int (*direct_set_addr)(struct rk_lcdc_driver *drv, int win_id, u32 addr);
442 int (*lcdc_reg_update) (struct rk_lcdc_driver *dev_drv);
443 ssize_t(*get_disp_info) (struct rk_lcdc_driver *dev_drv, char *buf,
445 int (*load_screen) (struct rk_lcdc_driver *dev_drv, bool initscreen);
446 int (*get_dspbuf_info) (struct rk_lcdc_driver *dev_drv,
447 u16 *xact, u16 *yact, int *format,
449 int (*post_dspbuf)(struct rk_lcdc_driver *dev_drv, u32 rgb_mst,
450 int format, u16 xact, u16 yact, u16 xvir);
452 int (*get_win_state) (struct rk_lcdc_driver *dev_drv, int layer_id, int area_id);
453 int (*ovl_mgr) (struct rk_lcdc_driver *dev_drv, int swap, bool set); /*overlay manager*/
454 int (*fps_mgr) (struct rk_lcdc_driver *dev_drv, int fps, bool set);
455 int (*fb_get_win_id) (struct rk_lcdc_driver *dev_drv, const char *id); /*find layer for fb*/
456 int (*fb_win_remap) (struct rk_lcdc_driver *dev_drv,
457 u16 fb_win_map_order);
458 int (*set_dsp_lut) (struct rk_lcdc_driver *dev_drv, int *lut);
459 int (*set_cabc_lut)(struct rk_lcdc_driver *dev_drv, int *lut);
460 int (*set_hwc_lut) (struct rk_lcdc_driver *dev_drv, int *hwc_lut, int mode);
461 int (*read_dsp_lut) (struct rk_lcdc_driver *dev_drv, int *lut);
462 int (*lcdc_hdmi_process) (struct rk_lcdc_driver *dev_drv, int mode); /*some lcdc need to some process in hdmi mode*/
463 int (*set_irq_to_cpu)(struct rk_lcdc_driver *dev_drv,int enable);
464 int (*poll_vblank) (struct rk_lcdc_driver *dev_drv);
465 int (*lcdc_rst) (struct rk_lcdc_driver *dev_drv);
466 int (*dpi_open) (struct rk_lcdc_driver *dev_drv, bool open);
467 int (*dpi_win_sel) (struct rk_lcdc_driver *dev_drv, int layer_id);
468 int (*dpi_status) (struct rk_lcdc_driver *dev_drv);
469 int (*get_dsp_addr)(struct rk_lcdc_driver *dev_drv, unsigned int dsp_addr[][4]);
470 int (*set_dsp_cabc) (struct rk_lcdc_driver *dev_drv, int mode, int calc, int up, int down, int global);
471 int (*set_dsp_bcsh_hue) (struct rk_lcdc_driver *dev_drv,int sin_hue, int cos_hue);
472 int (*set_dsp_bcsh_bcs)(struct rk_lcdc_driver *dev_drv,bcsh_bcs_mode mode,int value);
473 int (*get_dsp_bcsh_hue) (struct rk_lcdc_driver *dev_drv,bcsh_hue_mode mode);
474 int (*get_dsp_bcsh_bcs)(struct rk_lcdc_driver *dev_drv,bcsh_bcs_mode mode);
475 int (*open_bcsh)(struct rk_lcdc_driver *dev_drv, bool open);
476 int (*set_screen_scaler) (struct rk_lcdc_driver *dev_drv, struct rk_screen *screen, bool enable);
477 int (*dump_reg) (struct rk_lcdc_driver *dev_drv);
478 int (*mmu_en) (struct rk_lcdc_driver *dev_drv);
479 int (*cfg_done) (struct rk_lcdc_driver *dev_drv);
480 int (*set_overscan) (struct rk_lcdc_driver *dev_drv,
481 struct overscan *overscan);
482 int (*dsp_black) (struct rk_lcdc_driver *dev_drv, int enable);
483 int (*backlight_close)(struct rk_lcdc_driver *dev_drv, int enable);
484 int (*area_support_num)(struct rk_lcdc_driver *dev_drv, unsigned int *area_support);
485 int (*extern_func)(struct rk_lcdc_driver *dev_drv, int cmd);
488 struct rk_fb_area_par {
489 u8 data_format; /*layer data fmt*/
495 u16 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
497 u16 xsize; /* display window width/height -->LCDC_WINx_DSP_INFO*/
499 u16 xact; /*origin display window size -->LCDC_WINx_ACT_INFO*/
501 u16 xvir; /*virtual width/height -->LCDC_WINx_VIR*/
511 struct rk_fb_win_par {
513 u8 z_order; /*win sel layer*/
517 struct rk_fb_area_par area_par[RK_WIN_MAX_AREA];
521 struct rk_fb_win_cfg_data {
524 short rel_fence_fd[RK_MAX_BUF_NUM];
525 struct rk_fb_win_par win_par[RK30_MAX_LAYER_SUPPORT];
526 struct rk_lcdc_post_cfg post_cfg;
529 struct rk_fb_reg_area_data {
530 struct sync_fence *acq_fence;
531 u8 data_format; /*layer data fmt*/
532 u8 index_buf; /*judge if the buffer is index*/
533 u32 y_offset; /*yuv/rgb offset -->LCDC_WINx_YRGB_MSTx*/
534 u32 c_offset; /*cb cr offset--->LCDC_WINx_CBR_MSTx*/
538 u16 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
540 u16 xsize; /* display window width/height -->LCDC_WINx_DSP_INFO*/
542 u16 xact; /*origin display window size -->LCDC_WINx_ACT_INFO*/
544 u16 xvir; /*virtual width/height -->LCDC_WINx_VIR*/
546 u16 xoff; /*mem offset*/
548 unsigned long smem_start;
549 unsigned long cbr_start; /*Cbr memory start address*/
551 struct ion_handle *ion_handle;
553 struct dma_buf *dma_buf;
554 struct dma_buf_attachment *attachment;
555 struct sg_table *sg_table;
563 struct rk_fb_reg_win_data {
565 u8 z_order; /*win sel layer*/
566 u32 area_num; /*maybe two region have the same dma buff,*/
567 u32 area_buf_num; /*so area_num maybe not equal to area_buf_num*/
573 struct rk_fb_reg_area_data reg_area_data[RK_WIN_MAX_AREA];
576 struct rk_fb_reg_data {
577 struct list_head list;
581 struct rk_fb_reg_win_data reg_win_data[RK30_MAX_LAYER_SUPPORT];
582 struct rk_lcdc_post_cfg post_cfg;
585 struct rk_lcdc_driver {
591 struct rk_lcdc_win *win[RK_MAX_FB_SUPPORT];
593 int num_buf; //the num_of buffer
595 int fb_index_base; //the first fb index of the lcdc device
596 struct rk_screen *screen0; //some platform have only one lcdc,but extend
597 struct rk_screen *screen1; //two display devices for dual display,such as rk2918,rk2928
598 struct rk_screen *cur_screen; //screen0 is primary screen ,like lcd panel,screen1 is extend screen,like hdmi
612 char mmu_dts_name[40];
613 struct device *mmu_dev;
616 struct rk_fb_reg_area_data reg_area_data;
618 * front_regs means this config is scaning on the devices.
620 struct rk_fb_reg_data *front_regs;
621 struct mutex front_lock;
623 struct mutex fb_win_id_mutex;
624 struct mutex win_config;
626 struct mutex switch_screen; /*for switch screen*/
627 struct completion frame_done; /*sync for pan_display,whe we set a new
628 frame address to lcdc register,we must
629 make sure the frame begain to display*/
630 spinlock_t cpl_lock; /*lock for completion frame done */
632 struct rk_fb_vsync vsync_info;
633 struct rk_fb_frame_time frame_time;
634 int wait_fs; /*wait for new frame start in kernel */
635 struct sw_sync_timeline *timeline;
638 struct list_head update_regs_list;
639 struct list_head saved_list;
640 struct mutex update_regs_list_lock;
641 struct kthread_worker update_regs_worker;
642 struct task_struct *update_regs_thread;
643 struct kthread_work update_regs_work;
644 wait_queue_head_t update_regs_wait;
646 struct mutex output_lock;
647 struct rk29fb_info *screen_ctr_info;
648 struct list_head pwrlist_head;
649 struct rk_lcdc_drv_ops *ops;
650 struct rk_fb_trsm_ops *trsm_ops;
651 #ifdef CONFIG_DRM_ROCKCHIP
652 void (*irq_call_back)(struct rk_lcdc_driver *driver);
654 struct overscan overscan;
655 struct rk_lcdc_bcsh bcsh;
658 int bcsh_init_status;
661 /*1:hdmi switch uncomplete,0:complete*/
664 struct rk_fb_win_cfg_data tmp_win_cfg[DUMP_FRAME_NUM];
665 struct rk_fb_reg_data tmp_regs[DUMP_FRAME_NUM];
666 unsigned int area_support[RK30_MAX_LAYER_SUPPORT];
673 unsigned long fb_phy_base; /* Start of fb address (physical address) */
674 char __iomem *fb_virt_base; /* Start of fb address (virt address) */
676 struct rk_lcdc_driver *lcdc_drv;
678 #if defined(CONFIG_ION_ROCKCHIP)
679 struct ion_handle *ion_hdl;
684 /*disp_mode: dual display mode
685 * NO_DUAL,no dual display,
686 ONE_DUAL,use one lcdc + rk61x for dual display
687 DUAL,use 2 lcdcs for dual display
688 num_fb: the total number of fb
689 num_lcdc: the total number of lcdc
695 struct rk29fb_info *mach_info;
696 struct fb_info *fb[RK_MAX_FB_SUPPORT*2];
698 struct rk_lcdc_driver *lcdc_dev_drv[RK30_MAX_LCDC_SUPPORT];
701 #if defined(CONFIG_ION_ROCKCHIP)
702 struct ion_client *ion_client;
706 extern int rk_fb_trsm_ops_register(struct rk_fb_trsm_ops *ops, int type);
707 extern struct rk_fb_trsm_ops *rk_fb_trsm_ops_get(int type);
708 extern int rk_fb_register(struct rk_lcdc_driver *dev_drv,
709 struct rk_lcdc_win *win, int id);
710 extern int rk_fb_unregister(struct rk_lcdc_driver *dev_drv);
711 extern struct rk_lcdc_driver *rk_get_lcdc_drv(char *name);
712 extern int rk_fb_get_prmry_screen( struct rk_screen *screen);
713 extern int rk_fb_set_prmry_screen(struct rk_screen *screen);
714 extern u32 rk_fb_get_prmry_screen_pixclock(void);
715 extern int rk_disp_pwr_ctr_parse_dt(struct rk_lcdc_driver *dev_drv);
716 extern int rk_disp_pwr_enable(struct rk_lcdc_driver *dev_drv);
717 extern int rk_disp_pwr_disable(struct rk_lcdc_driver *dev_drv);
718 extern bool is_prmry_rk_lcdc_registered(void);
719 extern int rk_fb_prase_timing_dt(struct device_node *np,
720 struct rk_screen *screen);
721 extern int rk_disp_prase_timing_dt(struct rk_lcdc_driver *dev_drv);
723 extern int rk_fb_dpi_open(bool open);
724 extern int rk_fb_dpi_layer_sel(int layer_id);
725 extern int rk_fb_dpi_status(void);
727 extern int rk_fb_switch_screen(struct rk_screen *screen, int enable, int lcdc_id);
728 extern int rk_fb_disp_scale(u8 scale_x, u8 scale_y, u8 lcdc_id);
729 extern int rkfb_create_sysfs(struct fb_info *fbi);
730 extern char *get_format_string(enum data_format, char *fmt);
731 extern int support_uboot_display(void);
732 extern int rk_fb_calc_fps(struct rk_screen *screen, u32 pixclock);
733 extern int rk_get_real_fps(int time);
734 extern struct device *rk_fb_get_sysmmu_device_by_compatible(const char *compt);
735 extern void rk_fb_platform_set_sysmmu(struct device *sysmmu,
737 int rk_fb_get_display_policy(void);
738 int rk_fb_pixel_width(int data_format);
739 void trace_buffer_dump(struct device *dev,
740 struct rk_lcdc_driver *dev_drv);
741 extern int rockchip_get_screen_type(void);