1 //===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file provides a helper that implements much of the TTI interface in
11 /// terms of the target-independent code generator and TargetLowering
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17 #define LLVM_CODEGEN_BASICTTIIMPL_H
19 #include "llvm/Analysis/LoopInfo.h"
20 #include "llvm/Analysis/TargetTransformInfoImpl.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Target/TargetLowering.h"
23 #include "llvm/Target/TargetSubtargetInfo.h"
27 extern cl::opt<unsigned> PartialUnrollingThreshold;
29 /// \brief Base class which can be used to help build a TTI implementation.
31 /// This class provides as much implementation of the TTI interface as is
32 /// possible using the target independent parts of the code generator.
34 /// In order to subclass it, your class must implement a getST() method to
35 /// return the subtarget, and a getTLI() method to return the target lowering.
36 /// We need these methods implemented in the derived class so that this class
37 /// doesn't have to duplicate storage for them.
39 class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
41 typedef TargetTransformInfoImplCRTPBase<T> BaseT;
42 typedef TargetTransformInfo TTI;
44 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
45 /// are set if the result needs to be inserted and/or extracted from vectors.
46 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) {
47 assert(Ty->isVectorTy() && "Can only scalarize vectors");
50 for (int i = 0, e = Ty->getVectorNumElements(); i < e; ++i) {
52 Cost += static_cast<T *>(this)
53 ->getVectorInstrCost(Instruction::InsertElement, Ty, i);
55 Cost += static_cast<T *>(this)
56 ->getVectorInstrCost(Instruction::ExtractElement, Ty, i);
62 /// Estimate the cost overhead of SK_Alternate shuffle.
63 unsigned getAltShuffleOverhead(Type *Ty) {
64 assert(Ty->isVectorTy() && "Can only shuffle vectors");
66 // Shuffle cost is equal to the cost of extracting element from its argument
67 // plus the cost of inserting them onto the result vector.
69 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
70 // index 0 of first vector, index 1 of second vector,index 2 of first
71 // vector and finally index 3 of second vector and insert them at index
72 // <0,1,2,3> of result vector.
73 for (int i = 0, e = Ty->getVectorNumElements(); i < e; ++i) {
74 Cost += static_cast<T *>(this)
75 ->getVectorInstrCost(Instruction::InsertElement, Ty, i);
76 Cost += static_cast<T *>(this)
77 ->getVectorInstrCost(Instruction::ExtractElement, Ty, i);
82 /// \brief Local query method delegates up to T which *must* implement this!
83 const TargetSubtargetInfo *getST() const {
84 return static_cast<const T *>(this)->getST();
87 /// \brief Local query method delegates up to T which *must* implement this!
88 const TargetLoweringBase *getTLI() const {
89 return static_cast<const T *>(this)->getTLI();
93 explicit BasicTTIImplBase(const TargetMachine *TM)
94 : BaseT(TM->getDataLayout()) {}
97 // Provide value semantics. MSVC requires that we spell all of these out.
98 BasicTTIImplBase(const BasicTTIImplBase &Arg)
99 : BaseT(static_cast<const BaseT &>(Arg)) {}
100 BasicTTIImplBase(BasicTTIImplBase &&Arg)
101 : BaseT(std::move(static_cast<BaseT &>(Arg))) {}
102 BasicTTIImplBase &operator=(const BasicTTIImplBase &RHS) {
103 BaseT::operator=(static_cast<const BaseT &>(RHS));
106 BasicTTIImplBase &operator=(BasicTTIImplBase &&RHS) {
107 BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
111 /// \name Scalar TTI Implementations
114 bool hasBranchDivergence() { return false; }
116 bool isLegalAddImmediate(int64_t imm) {
117 return getTLI()->isLegalAddImmediate(imm);
120 bool isLegalICmpImmediate(int64_t imm) {
121 return getTLI()->isLegalICmpImmediate(imm);
124 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
125 bool HasBaseReg, int64_t Scale) {
126 TargetLoweringBase::AddrMode AM;
128 AM.BaseOffs = BaseOffset;
129 AM.HasBaseReg = HasBaseReg;
131 return getTLI()->isLegalAddressingMode(AM, Ty);
134 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
135 bool HasBaseReg, int64_t Scale) {
136 TargetLoweringBase::AddrMode AM;
138 AM.BaseOffs = BaseOffset;
139 AM.HasBaseReg = HasBaseReg;
141 return getTLI()->getScalingFactorCost(AM, Ty);
144 bool isTruncateFree(Type *Ty1, Type *Ty2) {
145 return getTLI()->isTruncateFree(Ty1, Ty2);
148 bool isTypeLegal(Type *Ty) {
149 EVT VT = getTLI()->getValueType(Ty);
150 return getTLI()->isTypeLegal(VT);
153 unsigned getJumpBufAlignment() { return getTLI()->getJumpBufAlignment(); }
155 unsigned getJumpBufSize() { return getTLI()->getJumpBufSize(); }
157 bool shouldBuildLookupTables() {
158 const TargetLoweringBase *TLI = getTLI();
159 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
160 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
163 bool haveFastSqrt(Type *Ty) {
164 const TargetLoweringBase *TLI = getTLI();
165 EVT VT = TLI->getValueType(Ty);
166 return TLI->isTypeLegal(VT) &&
167 TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
170 void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP) {
171 // This unrolling functionality is target independent, but to provide some
172 // motivation for its intended use, for x86:
174 // According to the Intel 64 and IA-32 Architectures Optimization Reference
175 // Manual, Intel Core models and later have a loop stream detector (and
176 // associated uop queue) that can benefit from partial unrolling.
177 // The relevant requirements are:
178 // - The loop must have no more than 4 (8 for Nehalem and later) branches
179 // taken, and none of them may be calls.
180 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
182 // According to the Software Optimization Guide for AMD Family 15h
183 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
184 // and loop buffer which can benefit from partial unrolling.
185 // The relevant requirements are:
186 // - The loop must have fewer than 16 branches
187 // - The loop must have less than 40 uops in all executed loop branches
189 // The number of taken branches in a loop is hard to estimate here, and
190 // benchmarking has revealed that it is better not to be conservative when
191 // estimating the branch count. As a result, we'll ignore the branch limits
192 // until someone finds a case where it matters in practice.
195 const TargetSubtargetInfo *ST = getST();
196 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
197 MaxOps = PartialUnrollingThreshold;
198 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
199 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
203 // Scan the loop: don't unroll loops with calls.
204 for (Loop::block_iterator I = L->block_begin(), E = L->block_end(); I != E;
208 for (BasicBlock::iterator J = BB->begin(), JE = BB->end(); J != JE; ++J)
209 if (isa<CallInst>(J) || isa<InvokeInst>(J)) {
210 ImmutableCallSite CS(J);
211 if (const Function *F = CS.getCalledFunction()) {
212 if (!static_cast<T *>(this)->isLoweredToCall(F))
220 // Enable runtime and partial unrolling up to the specified size.
221 UP.Partial = UP.Runtime = true;
222 UP.PartialThreshold = UP.PartialOptSizeThreshold = MaxOps;
227 /// \name Vector TTI Implementations
230 unsigned getNumberOfRegisters(bool Vector) { return 1; }
232 unsigned getRegisterBitWidth(bool Vector) { return 32; }
234 unsigned getMaxInterleaveFactor() { return 1; }
236 unsigned getArithmeticInstrCost(
237 unsigned Opcode, Type *Ty,
238 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
239 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
240 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
241 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None) {
242 // Check if any of the operands are vector operands.
243 const TargetLoweringBase *TLI = getTLI();
244 int ISD = TLI->InstructionOpcodeToISD(Opcode);
245 assert(ISD && "Invalid opcode");
247 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Ty);
249 bool IsFloat = Ty->getScalarType()->isFloatingPointTy();
250 // Assume that floating point arithmetic operations cost twice as much as
251 // integer operations.
252 unsigned OpCost = (IsFloat ? 2 : 1);
254 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
255 // The operation is legal. Assume it costs 1.
256 // If the type is split to multiple registers, assume that there is some
258 // TODO: Once we have extract/insert subvector cost we need to use them.
260 return LT.first * 2 * OpCost;
261 return LT.first * 1 * OpCost;
264 if (!TLI->isOperationExpand(ISD, LT.second)) {
265 // If the operation is custom lowered then assume
266 // thare the code is twice as expensive.
267 return LT.first * 2 * OpCost;
270 // Else, assume that we need to scalarize this op.
271 if (Ty->isVectorTy()) {
272 unsigned Num = Ty->getVectorNumElements();
273 unsigned Cost = static_cast<T *>(this)
274 ->getArithmeticInstrCost(Opcode, Ty->getScalarType());
275 // return the cost of multiple scalar invocation plus the cost of
277 // and extracting the values.
278 return getScalarizationOverhead(Ty, true, true) + Num * Cost;
281 // We don't know anything about this scalar instruction.
285 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
287 if (Kind == TTI::SK_Alternate) {
288 return getAltShuffleOverhead(Tp);
293 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
294 const TargetLoweringBase *TLI = getTLI();
295 int ISD = TLI->InstructionOpcodeToISD(Opcode);
296 assert(ISD && "Invalid opcode");
298 std::pair<unsigned, MVT> SrcLT = TLI->getTypeLegalizationCost(Src);
299 std::pair<unsigned, MVT> DstLT = TLI->getTypeLegalizationCost(Dst);
301 // Check for NOOP conversions.
302 if (SrcLT.first == DstLT.first &&
303 SrcLT.second.getSizeInBits() == DstLT.second.getSizeInBits()) {
305 // Bitcast between types that are legalized to the same type are free.
306 if (Opcode == Instruction::BitCast || Opcode == Instruction::Trunc)
310 if (Opcode == Instruction::Trunc &&
311 TLI->isTruncateFree(SrcLT.second, DstLT.second))
314 if (Opcode == Instruction::ZExt &&
315 TLI->isZExtFree(SrcLT.second, DstLT.second))
318 // If the cast is marked as legal (or promote) then assume low cost.
319 if (SrcLT.first == DstLT.first &&
320 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
323 // Handle scalar conversions.
324 if (!Src->isVectorTy() && !Dst->isVectorTy()) {
326 // Scalar bitcasts are usually free.
327 if (Opcode == Instruction::BitCast)
330 // Just check the op cost. If the operation is legal then assume it costs
332 if (!TLI->isOperationExpand(ISD, DstLT.second))
335 // Assume that illegal scalar instruction are expensive.
339 // Check vector-to-vector casts.
340 if (Dst->isVectorTy() && Src->isVectorTy()) {
342 // If the cast is between same-sized registers, then the check is simple.
343 if (SrcLT.first == DstLT.first &&
344 SrcLT.second.getSizeInBits() == DstLT.second.getSizeInBits()) {
346 // Assume that Zext is done using AND.
347 if (Opcode == Instruction::ZExt)
350 // Assume that sext is done using SHL and SRA.
351 if (Opcode == Instruction::SExt)
354 // Just check the op cost. If the operation is legal then assume it
356 // 1 and multiply by the type-legalization overhead.
357 if (!TLI->isOperationExpand(ISD, DstLT.second))
358 return SrcLT.first * 1;
361 // If we are converting vectors and the operation is illegal, or
362 // if the vectors are legalized to different types, estimate the
363 // scalarization costs.
364 unsigned Num = Dst->getVectorNumElements();
365 unsigned Cost = static_cast<T *>(this)->getCastInstrCost(
366 Opcode, Dst->getScalarType(), Src->getScalarType());
368 // Return the cost of multiple scalar invocation plus the cost of
369 // inserting and extracting the values.
370 return getScalarizationOverhead(Dst, true, true) + Num * Cost;
373 // We already handled vector-to-vector and scalar-to-scalar conversions.
375 // is where we handle bitcast between vectors and scalars. We need to assume
376 // that the conversion is scalarized in one way or another.
377 if (Opcode == Instruction::BitCast)
378 // Illegal bitcasts are done by storing and loading from a stack slot.
379 return (Src->isVectorTy() ? getScalarizationOverhead(Src, false, true)
381 (Dst->isVectorTy() ? getScalarizationOverhead(Dst, true, false)
384 llvm_unreachable("Unhandled cast");
387 unsigned getCFInstrCost(unsigned Opcode) {
388 // Branches are assumed to be predicted.
392 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) {
393 const TargetLoweringBase *TLI = getTLI();
394 int ISD = TLI->InstructionOpcodeToISD(Opcode);
395 assert(ISD && "Invalid opcode");
397 // Selects on vectors are actually vector selects.
398 if (ISD == ISD::SELECT) {
399 assert(CondTy && "CondTy must exist");
400 if (CondTy->isVectorTy())
404 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(ValTy);
406 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
407 !TLI->isOperationExpand(ISD, LT.second)) {
408 // The operation is legal. Assume it costs 1. Multiply
409 // by the type-legalization overhead.
413 // Otherwise, assume that the cast is scalarized.
414 if (ValTy->isVectorTy()) {
415 unsigned Num = ValTy->getVectorNumElements();
417 CondTy = CondTy->getScalarType();
418 unsigned Cost = static_cast<T *>(this)->getCmpSelInstrCost(
419 Opcode, ValTy->getScalarType(), CondTy);
421 // Return the cost of multiple scalar invocation plus the cost of
423 // and extracting the values.
424 return getScalarizationOverhead(ValTy, true, false) + Num * Cost;
427 // Unknown scalar opcode.
431 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) {
432 std::pair<unsigned, MVT> LT =
433 getTLI()->getTypeLegalizationCost(Val->getScalarType());
438 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
439 unsigned AddressSpace) {
440 assert(!Src->isVoidTy() && "Invalid type");
441 std::pair<unsigned, MVT> LT = getTLI()->getTypeLegalizationCost(Src);
443 // Assuming that all loads of legal types cost 1.
444 unsigned Cost = LT.first;
446 if (Src->isVectorTy() &&
447 Src->getPrimitiveSizeInBits() < LT.second.getSizeInBits()) {
448 // This is a vector load that legalizes to a larger type than the vector
449 // itself. Unless the corresponding extending load or truncating store is
450 // legal, then this will scalarize.
451 TargetLowering::LegalizeAction LA = TargetLowering::Expand;
452 EVT MemVT = getTLI()->getValueType(Src, true);
453 if (MemVT.isSimple() && MemVT != MVT::Other) {
454 if (Opcode == Instruction::Store)
455 LA = getTLI()->getTruncStoreAction(LT.second, MemVT.getSimpleVT());
457 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
460 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
461 // This is a vector load/store for some illegal type that is scalarized.
462 // We must account for the cost of building or decomposing the vector.
463 Cost += getScalarizationOverhead(Src, Opcode != Instruction::Store,
464 Opcode == Instruction::Store);
471 unsigned getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy,
472 ArrayRef<Type *> Tys) {
476 // Assume that we need to scalarize this intrinsic.
477 unsigned ScalarizationCost = 0;
478 unsigned ScalarCalls = 1;
479 if (RetTy->isVectorTy()) {
480 ScalarizationCost = getScalarizationOverhead(RetTy, true, false);
481 ScalarCalls = std::max(ScalarCalls, RetTy->getVectorNumElements());
483 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
484 if (Tys[i]->isVectorTy()) {
485 ScalarizationCost += getScalarizationOverhead(Tys[i], false, true);
486 ScalarCalls = std::max(ScalarCalls, RetTy->getVectorNumElements());
490 return ScalarCalls + ScalarizationCost;
492 // Look for intrinsics that can be lowered directly or turned into a scalar
494 case Intrinsic::sqrt:
506 case Intrinsic::exp2:
512 case Intrinsic::log10:
515 case Intrinsic::log2:
518 case Intrinsic::fabs:
521 case Intrinsic::minnum:
524 case Intrinsic::maxnum:
527 case Intrinsic::copysign:
528 ISD = ISD::FCOPYSIGN;
530 case Intrinsic::floor:
533 case Intrinsic::ceil:
536 case Intrinsic::trunc:
539 case Intrinsic::nearbyint:
540 ISD = ISD::FNEARBYINT;
542 case Intrinsic::rint:
545 case Intrinsic::round:
554 case Intrinsic::fmuladd:
557 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
558 case Intrinsic::lifetime_start:
559 case Intrinsic::lifetime_end:
561 case Intrinsic::masked_store:
562 return static_cast<T *>(this)
563 ->getMaskedMemoryOpCost(Instruction::Store, Tys[0], 0, 0);
564 case Intrinsic::masked_load:
565 return static_cast<T *>(this)
566 ->getMaskedMemoryOpCost(Instruction::Load, RetTy, 0, 0);
569 const TargetLoweringBase *TLI = getTLI();
570 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(RetTy);
572 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
573 // The operation is legal. Assume it costs 1.
574 // If the type is split to multiple registers, assume that there is some
576 // TODO: Once we have extract/insert subvector cost we need to use them.
582 if (!TLI->isOperationExpand(ISD, LT.second)) {
583 // If the operation is custom lowered then assume
584 // thare the code is twice as expensive.
588 // If we can't lower fmuladd into an FMA estimate the cost as a floating
589 // point mul followed by an add.
590 if (IID == Intrinsic::fmuladd)
591 return static_cast<T *>(this)
592 ->getArithmeticInstrCost(BinaryOperator::FMul, RetTy) +
593 static_cast<T *>(this)
594 ->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy);
596 // Else, assume that we need to scalarize this intrinsic. For math builtins
597 // this will emit a costly libcall, adding call overhead and spills. Make it
599 if (RetTy->isVectorTy()) {
600 unsigned Num = RetTy->getVectorNumElements();
601 unsigned Cost = static_cast<T *>(this)->getIntrinsicInstrCost(
602 IID, RetTy->getScalarType(), Tys);
603 return 10 * Cost * Num;
606 // This is going to be turned into a library call, make it expensive.
610 unsigned getNumberOfParts(Type *Tp) {
611 std::pair<unsigned, MVT> LT = getTLI()->getTypeLegalizationCost(Tp);
615 unsigned getAddressComputationCost(Type *Ty, bool IsComplex) { return 0; }
617 unsigned getReductionCost(unsigned Opcode, Type *Ty, bool IsPairwise) {
618 assert(Ty->isVectorTy() && "Expect a vector type");
619 unsigned NumVecElts = Ty->getVectorNumElements();
620 unsigned NumReduxLevels = Log2_32(NumVecElts);
623 static_cast<T *>(this)->getArithmeticInstrCost(Opcode, Ty);
624 // Assume the pairwise shuffles add a cost.
625 unsigned ShuffleCost =
626 NumReduxLevels * (IsPairwise + 1) *
627 static_cast<T *>(this)
628 ->getShuffleCost(TTI::SK_ExtractSubvector, Ty, NumVecElts / 2, Ty);
629 return ShuffleCost + ArithCost + getScalarizationOverhead(Ty, false, true);
635 /// \brief Concrete BasicTTIImpl that can be used if no further customization
637 class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
638 typedef BasicTTIImplBase<BasicTTIImpl> BaseT;
639 friend class BasicTTIImplBase<BasicTTIImpl>;
641 const TargetSubtargetInfo *ST;
642 const TargetLoweringBase *TLI;
644 const TargetSubtargetInfo *getST() const { return ST; }
645 const TargetLoweringBase *getTLI() const { return TLI; }
648 explicit BasicTTIImpl(const TargetMachine *ST, Function &F);
650 // Provide value semantics. MSVC requires that we spell all of these out.
651 BasicTTIImpl(const BasicTTIImpl &Arg)
652 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
653 BasicTTIImpl(BasicTTIImpl &&Arg)
654 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
655 TLI(std::move(Arg.TLI)) {}
656 BasicTTIImpl &operator=(const BasicTTIImpl &RHS) {
657 BaseT::operator=(static_cast<const BaseT &>(RHS));
662 BasicTTIImpl &operator=(BasicTTIImpl &&RHS) {
663 BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
664 ST = std::move(RHS.ST);
665 TLI = std::move(RHS.TLI);