1 //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the CCState and CCValAssign classes, used for lowering
11 // and implementing calling conventions.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/IR/CallingConv.h"
22 #include "llvm/Target/TargetCallingConv.h"
28 class TargetRegisterInfo;
30 /// CCValAssign - Represent assignment of one arg/retval to a location.
34 Full, // The value fills the full location.
35 SExt, // The value is sign extended in the location.
36 ZExt, // The value is zero extended in the location.
37 AExt, // The value is extended with undefined upper bits.
38 BCvt, // The value is bit-converted in the location.
39 VExt, // The value is vector-widened in the location.
40 // FIXME: Not implemented yet. Code that uses AExt to mean
41 // vector-widen should be fixed to use VExt instead.
42 FPExt, // The floating-point value is fp-extended in the location.
43 Indirect // The location contains pointer to the value.
44 // TODO: a subset of the value is in the location.
47 /// ValNo - This is the value number begin assigned (e.g. an argument number).
50 /// Loc is either a stack offset or a register number.
53 /// isMem - True if this is a memory loc, false if it is a register loc.
56 /// isCustom - True if this arg/retval requires special handling.
57 unsigned isCustom : 1;
59 /// Information about how the value is assigned.
62 /// ValVT - The type of the value being assigned.
65 /// LocVT - The type of the location being assigned to.
69 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
70 unsigned RegNo, MVT LocVT,
83 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
84 unsigned RegNo, MVT LocVT,
87 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
92 static CCValAssign getMem(unsigned ValNo, MVT ValVT,
93 unsigned Offset, MVT LocVT,
106 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
107 unsigned Offset, MVT LocVT,
110 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
115 // There is no need to differentiate between a pending CCValAssign and other
116 // kinds, as they are stored in a different list.
117 static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
119 return getReg(ValNo, ValVT, 0, LocVT, HTP);
122 void convertToReg(unsigned RegNo) {
127 void convertToMem(unsigned Offset) {
132 unsigned getValNo() const { return ValNo; }
133 MVT getValVT() const { return ValVT; }
135 bool isRegLoc() const { return !isMem; }
136 bool isMemLoc() const { return isMem; }
138 bool needsCustom() const { return isCustom; }
140 unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
141 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
142 MVT getLocVT() const { return LocVT; }
144 LocInfo getLocInfo() const { return HTP; }
145 bool isExtInLoc() const {
146 return (HTP == AExt || HTP == SExt || HTP == ZExt);
151 /// CCAssignFn - This function assigns a location for Val, updating State to
152 /// reflect the change. It returns 'true' if it failed to handle Val.
153 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
154 MVT LocVT, CCValAssign::LocInfo LocInfo,
155 ISD::ArgFlagsTy ArgFlags, CCState &State);
157 /// CCCustomFn - This function assigns a location for Val, possibly updating
158 /// all args to reflect changes and indicates if it handled it. It must set
159 /// isCustom if it handles the arg and returns true.
160 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
161 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
162 ISD::ArgFlagsTy &ArgFlags, CCState &State);
164 /// ParmContext - This enum tracks whether calling convention lowering is in
165 /// the context of prologue or call generation. Not all backends make use of
166 /// this information.
167 typedef enum { Unknown, Prologue, Call } ParmContext;
169 /// CCState - This class holds information needed while lowering arguments and
170 /// return values. It captures which registers are already assigned and which
171 /// stack slots are used. It provides accessors to allocate these values.
174 CallingConv::ID CallingConv;
177 const TargetMachine &TM;
178 const TargetRegisterInfo &TRI;
179 SmallVectorImpl<CCValAssign> &Locs;
180 LLVMContext &Context;
182 unsigned StackOffset;
183 SmallVector<uint32_t, 16> UsedRegs;
184 SmallVector<CCValAssign, 4> PendingLocs;
186 // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
188 // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
190 // Or, in another words it tracks byval parameters that are stored in
191 // general purpose registers.
193 // For 4 byte stack alignment,
194 // instance index means byval parameter number in formal
195 // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
196 // then, for function "foo":
198 // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
200 // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
201 // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
203 // In case of 8 bytes stack alignment,
204 // ByValRegs may also contain information about wasted registers.
205 // In function shown above, r3 would be wasted according to AAPCS rules.
206 // And in that case ByValRegs[1].Waste would be "true".
207 // ByValRegs vector size still would be 2,
208 // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
210 // Supposed use-case for this collection:
211 // 1. Initially ByValRegs is empty, InRegsParamsProceed is 0.
212 // 2. HandleByVal fillups ByValRegs.
213 // 3. Argument analysis (LowerFormatArguments, for example). After
214 // some byval argument was analyzed, InRegsParamsProceed is increased.
216 ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
217 Begin(B), End(E), Waste(IsWaste) {}
218 // First register allocated for current parameter.
221 // First after last register allocated for current parameter.
224 // Means that current range of registers doesn't belong to any
225 // parameters. It was wasted due to stack alignment rules.
226 // For more information see:
227 // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
230 SmallVector<ByValInfo, 4 > ByValRegs;
232 // InRegsParamsProceed - shows how many instances of ByValRegs was proceed
233 // during argument analysis.
234 unsigned InRegsParamsProceed;
237 ParmContext CallOrPrologue;
240 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
241 const TargetMachine &TM, SmallVectorImpl<CCValAssign> &locs,
244 void addLoc(const CCValAssign &V) {
248 LLVMContext &getContext() const { return Context; }
249 const TargetMachine &getTarget() const { return TM; }
250 MachineFunction &getMachineFunction() const { return MF; }
251 CallingConv::ID getCallingConv() const { return CallingConv; }
252 bool isVarArg() const { return IsVarArg; }
254 unsigned getNextStackOffset() const { return StackOffset; }
256 /// isAllocated - Return true if the specified register (or an alias) is
258 bool isAllocated(unsigned Reg) const {
259 return UsedRegs[Reg/32] & (1 << (Reg&31));
262 /// AnalyzeFormalArguments - Analyze an array of argument values,
263 /// incorporating info about the formals into this state.
264 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
267 /// AnalyzeReturn - Analyze the returned values of a return,
268 /// incorporating info about the result values into this state.
269 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
272 /// CheckReturn - Analyze the return values of a function, returning
273 /// true if the return can be performed without sret-demotion, and
275 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
278 /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
279 /// incorporating info about the passed values into this state.
280 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
283 /// AnalyzeCallOperands - Same as above except it takes vectors of types
284 /// and argument flags.
285 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
286 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
289 /// AnalyzeCallResult - Analyze the return values of a call,
290 /// incorporating info about the passed values into this state.
291 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
294 /// AnalyzeCallResult - Same as above except it's specialized for calls which
295 /// produce a single value.
296 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
298 /// getFirstUnallocated - Return the first unallocated register in the set, or
299 /// NumRegs if they are all allocated.
300 unsigned getFirstUnallocated(const MCPhysReg *Regs, unsigned NumRegs) const {
301 for (unsigned i = 0; i != NumRegs; ++i)
302 if (!isAllocated(Regs[i]))
307 /// AllocateReg - Attempt to allocate one register. If it is not available,
308 /// return zero. Otherwise, return the register, marking it and any aliases
310 unsigned AllocateReg(unsigned Reg) {
311 if (isAllocated(Reg)) return 0;
316 /// Version of AllocateReg with extra register to be shadowed.
317 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
318 if (isAllocated(Reg)) return 0;
320 MarkAllocated(ShadowReg);
324 /// AllocateReg - Attempt to allocate one of the specified registers. If none
325 /// are available, return zero. Otherwise, return the first one available,
326 /// marking it and any aliases as allocated.
327 unsigned AllocateReg(const MCPhysReg *Regs, unsigned NumRegs) {
328 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
329 if (FirstUnalloc == NumRegs)
330 return 0; // Didn't find the reg.
332 // Mark the register and any aliases as allocated.
333 unsigned Reg = Regs[FirstUnalloc];
338 /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
339 /// registers. If this is not possible, return zero. Otherwise, return the first
340 /// register of the block that were allocated, marking the entire block as allocated.
341 unsigned AllocateRegBlock(const uint16_t *Regs, unsigned NumRegs, unsigned RegsRequired) {
342 for (unsigned StartIdx = 0; StartIdx <= NumRegs - RegsRequired; ++StartIdx) {
343 bool BlockAvailable = true;
344 // Check for already-allocated regs in this block
345 for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
346 if (isAllocated(Regs[StartIdx + BlockIdx])) {
347 BlockAvailable = false;
351 if (BlockAvailable) {
352 // Mark the entire block as allocated
353 for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
354 MarkAllocated(Regs[StartIdx + BlockIdx]);
356 return Regs[StartIdx];
359 // No block was available
363 /// Version of AllocateReg with list of registers to be shadowed.
364 unsigned AllocateReg(const MCPhysReg *Regs, const MCPhysReg *ShadowRegs,
366 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
367 if (FirstUnalloc == NumRegs)
368 return 0; // Didn't find the reg.
370 // Mark the register and any aliases as allocated.
371 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
373 MarkAllocated(ShadowReg);
377 /// AllocateStack - Allocate a chunk of stack space with the specified size
379 unsigned AllocateStack(unsigned Size, unsigned Align) {
380 assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
381 StackOffset = ((StackOffset + Align-1) & ~(Align-1));
382 unsigned Result = StackOffset;
384 MF.getFrameInfo()->ensureMaxAlignment(Align);
388 /// Version of AllocateStack with extra register to be shadowed.
389 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
390 MarkAllocated(ShadowReg);
391 return AllocateStack(Size, Align);
394 /// Version of AllocateStack with list of extra registers to be shadowed.
395 /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
396 unsigned AllocateStack(unsigned Size, unsigned Align,
397 const MCPhysReg *ShadowRegs, unsigned NumShadowRegs) {
398 for (unsigned i = 0; i < NumShadowRegs; ++i)
399 MarkAllocated(ShadowRegs[i]);
400 return AllocateStack(Size, Align);
403 // HandleByVal - Allocate a stack slot large enough to pass an argument by
404 // value. The size and alignment information of the argument is encoded in its
405 // parameter attribute.
406 void HandleByVal(unsigned ValNo, MVT ValVT,
407 MVT LocVT, CCValAssign::LocInfo LocInfo,
408 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
410 // Returns count of byval arguments that are to be stored (even partly)
412 unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
414 // Returns count of byval in-regs arguments proceed.
415 unsigned getInRegsParamsProceed() const { return InRegsParamsProceed; }
417 // Get information about N-th byval parameter that is stored in registers.
418 // Here "ByValParamIndex" is N.
419 void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
420 unsigned& BeginReg, unsigned& EndReg) const {
421 assert(InRegsParamRecordIndex < ByValRegs.size() &&
422 "Wrong ByVal parameter index");
424 const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
425 BeginReg = info.Begin;
429 // Add information about parameter that is kept in registers.
430 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
431 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
434 // Goes either to next byval parameter (excluding "waste" record), or
435 // to the end of collection.
436 // Returns false, if end is reached.
437 bool nextInRegsParam() {
438 unsigned e = ByValRegs.size();
439 if (InRegsParamsProceed < e)
440 ++InRegsParamsProceed;
441 return InRegsParamsProceed < e;
444 // Clear byval registers tracking info.
445 void clearByValRegsInfo() {
446 InRegsParamsProceed = 0;
450 // Rewind byval registers tracking info.
451 void rewindByValRegsInfo() {
452 InRegsParamsProceed = 0;
455 ParmContext getCallOrPrologue() const { return CallOrPrologue; }
457 // Get list of pending assignments
458 SmallVectorImpl<llvm::CCValAssign> &getPendingLocs() {
463 /// MarkAllocated - Mark a register and all of its aliases as allocated.
464 void MarkAllocated(unsigned Reg);
469 } // end namespace llvm