1 //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the CCState and CCValAssign classes, used for lowering
11 // and implementing calling conventions.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/IR/CallingConv.h"
22 #include "llvm/Target/TargetCallingConv.h"
28 class TargetRegisterInfo;
30 /// CCValAssign - Represent assignment of one arg/retval to a location.
34 Full, // The value fills the full location.
35 SExt, // The value is sign extended in the location.
36 ZExt, // The value is zero extended in the location.
37 AExt, // The value is extended with undefined upper bits.
38 SExtUpper, // The value is in the upper bits of the location and should be
39 // sign extended when retrieved.
40 ZExtUpper, // The value is in the upper bits of the location and should be
41 // zero extended when retrieved.
42 AExtUpper, // The value is in the upper bits of the location and should be
43 // extended with undefined upper bits when retrieved.
44 BCvt, // The value is bit-converted in the location.
45 VExt, // The value is vector-widened in the location.
46 // FIXME: Not implemented yet. Code that uses AExt to mean
47 // vector-widen should be fixed to use VExt instead.
48 FPExt, // The floating-point value is fp-extended in the location.
49 Indirect // The location contains pointer to the value.
50 // TODO: a subset of the value is in the location.
54 /// ValNo - This is the value number begin assigned (e.g. an argument number).
57 /// Loc is either a stack offset or a register number.
60 /// isMem - True if this is a memory loc, false if it is a register loc.
63 /// isCustom - True if this arg/retval requires special handling.
64 unsigned isCustom : 1;
66 /// Information about how the value is assigned.
69 /// ValVT - The type of the value being assigned.
72 /// LocVT - The type of the location being assigned to.
76 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
77 unsigned RegNo, MVT LocVT,
90 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
91 unsigned RegNo, MVT LocVT,
94 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
99 static CCValAssign getMem(unsigned ValNo, MVT ValVT,
100 unsigned Offset, MVT LocVT,
106 Ret.isCustom = false;
113 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
114 unsigned Offset, MVT LocVT,
117 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
122 // There is no need to differentiate between a pending CCValAssign and other
123 // kinds, as they are stored in a different list.
124 static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
126 return getReg(ValNo, ValVT, 0, LocVT, HTP);
129 void convertToReg(unsigned RegNo) {
134 void convertToMem(unsigned Offset) {
139 unsigned getValNo() const { return ValNo; }
140 MVT getValVT() const { return ValVT; }
142 bool isRegLoc() const { return !isMem; }
143 bool isMemLoc() const { return isMem; }
145 bool needsCustom() const { return isCustom; }
147 unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
148 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
149 MVT getLocVT() const { return LocVT; }
151 LocInfo getLocInfo() const { return HTP; }
152 bool isExtInLoc() const {
153 return (HTP == AExt || HTP == SExt || HTP == ZExt);
156 bool isUpperBitsInLoc() const {
157 return HTP == AExtUpper || HTP == SExtUpper || HTP == ZExtUpper;
161 /// CCAssignFn - This function assigns a location for Val, updating State to
162 /// reflect the change. It returns 'true' if it failed to handle Val.
163 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
164 MVT LocVT, CCValAssign::LocInfo LocInfo,
165 ISD::ArgFlagsTy ArgFlags, CCState &State);
167 /// CCCustomFn - This function assigns a location for Val, possibly updating
168 /// all args to reflect changes and indicates if it handled it. It must set
169 /// isCustom if it handles the arg and returns true.
170 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
171 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
172 ISD::ArgFlagsTy &ArgFlags, CCState &State);
174 /// ParmContext - This enum tracks whether calling convention lowering is in
175 /// the context of prologue or call generation. Not all backends make use of
176 /// this information.
177 typedef enum { Unknown, Prologue, Call } ParmContext;
179 /// CCState - This class holds information needed while lowering arguments and
180 /// return values. It captures which registers are already assigned and which
181 /// stack slots are used. It provides accessors to allocate these values.
184 CallingConv::ID CallingConv;
187 const TargetRegisterInfo &TRI;
188 SmallVectorImpl<CCValAssign> &Locs;
189 LLVMContext &Context;
191 unsigned StackOffset;
192 SmallVector<uint32_t, 16> UsedRegs;
193 SmallVector<CCValAssign, 4> PendingLocs;
195 // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
197 // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
199 // Or, in another words it tracks byval parameters that are stored in
200 // general purpose registers.
202 // For 4 byte stack alignment,
203 // instance index means byval parameter number in formal
204 // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
205 // then, for function "foo":
207 // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
209 // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
210 // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
212 // In case of 8 bytes stack alignment,
213 // ByValRegs may also contain information about wasted registers.
214 // In function shown above, r3 would be wasted according to AAPCS rules.
215 // And in that case ByValRegs[1].Waste would be "true".
216 // ByValRegs vector size still would be 2,
217 // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
219 // Supposed use-case for this collection:
220 // 1. Initially ByValRegs is empty, InRegsParamsProcessed is 0.
221 // 2. HandleByVal fillups ByValRegs.
222 // 3. Argument analysis (LowerFormatArguments, for example). After
223 // some byval argument was analyzed, InRegsParamsProcessed is increased.
225 ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
226 Begin(B), End(E), Waste(IsWaste) {}
227 // First register allocated for current parameter.
230 // First after last register allocated for current parameter.
233 // Means that current range of registers doesn't belong to any
234 // parameters. It was wasted due to stack alignment rules.
235 // For more information see:
236 // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
239 SmallVector<ByValInfo, 4 > ByValRegs;
241 // InRegsParamsProcessed - shows how many instances of ByValRegs was proceed
242 // during argument analysis.
243 unsigned InRegsParamsProcessed;
246 ParmContext CallOrPrologue;
249 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
250 SmallVectorImpl<CCValAssign> &locs, LLVMContext &C);
252 void addLoc(const CCValAssign &V) {
256 LLVMContext &getContext() const { return Context; }
257 MachineFunction &getMachineFunction() const { return MF; }
258 CallingConv::ID getCallingConv() const { return CallingConv; }
259 bool isVarArg() const { return IsVarArg; }
261 unsigned getNextStackOffset() const { return StackOffset; }
263 /// isAllocated - Return true if the specified register (or an alias) is
265 bool isAllocated(unsigned Reg) const {
266 return UsedRegs[Reg/32] & (1 << (Reg&31));
269 /// AnalyzeFormalArguments - Analyze an array of argument values,
270 /// incorporating info about the formals into this state.
271 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
274 /// AnalyzeReturn - Analyze the returned values of a return,
275 /// incorporating info about the result values into this state.
276 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
279 /// CheckReturn - Analyze the return values of a function, returning
280 /// true if the return can be performed without sret-demotion, and
282 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
285 /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
286 /// incorporating info about the passed values into this state.
287 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
290 /// AnalyzeCallOperands - Same as above except it takes vectors of types
291 /// and argument flags.
292 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
293 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
296 /// AnalyzeCallResult - Analyze the return values of a call,
297 /// incorporating info about the passed values into this state.
298 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
301 /// AnalyzeCallResult - Same as above except it's specialized for calls which
302 /// produce a single value.
303 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
305 /// getFirstUnallocated - Return the first unallocated register in the set, or
306 /// NumRegs if they are all allocated.
307 unsigned getFirstUnallocated(const MCPhysReg *Regs, unsigned NumRegs) const {
308 for (unsigned i = 0; i != NumRegs; ++i)
309 if (!isAllocated(Regs[i]))
314 /// AllocateReg - Attempt to allocate one register. If it is not available,
315 /// return zero. Otherwise, return the register, marking it and any aliases
317 unsigned AllocateReg(unsigned Reg) {
318 if (isAllocated(Reg)) return 0;
323 /// Version of AllocateReg with extra register to be shadowed.
324 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
325 if (isAllocated(Reg)) return 0;
327 MarkAllocated(ShadowReg);
331 /// AllocateReg - Attempt to allocate one of the specified registers. If none
332 /// are available, return zero. Otherwise, return the first one available,
333 /// marking it and any aliases as allocated.
334 unsigned AllocateReg(const MCPhysReg *Regs, unsigned NumRegs) {
335 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
336 if (FirstUnalloc == NumRegs)
337 return 0; // Didn't find the reg.
339 // Mark the register and any aliases as allocated.
340 unsigned Reg = Regs[FirstUnalloc];
345 /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
346 /// registers. If this is not possible, return zero. Otherwise, return the first
347 /// register of the block that were allocated, marking the entire block as allocated.
348 unsigned AllocateRegBlock(const uint16_t *Regs, unsigned NumRegs, unsigned RegsRequired) {
349 for (unsigned StartIdx = 0; StartIdx <= NumRegs - RegsRequired; ++StartIdx) {
350 bool BlockAvailable = true;
351 // Check for already-allocated regs in this block
352 for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
353 if (isAllocated(Regs[StartIdx + BlockIdx])) {
354 BlockAvailable = false;
358 if (BlockAvailable) {
359 // Mark the entire block as allocated
360 for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
361 MarkAllocated(Regs[StartIdx + BlockIdx]);
363 return Regs[StartIdx];
366 // No block was available
370 /// Version of AllocateReg with list of registers to be shadowed.
371 unsigned AllocateReg(const MCPhysReg *Regs, const MCPhysReg *ShadowRegs,
373 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
374 if (FirstUnalloc == NumRegs)
375 return 0; // Didn't find the reg.
377 // Mark the register and any aliases as allocated.
378 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
380 MarkAllocated(ShadowReg);
384 /// AllocateStack - Allocate a chunk of stack space with the specified size
386 unsigned AllocateStack(unsigned Size, unsigned Align) {
387 assert(Align && ((Align - 1) & Align) == 0); // Align is power of 2.
388 StackOffset = ((StackOffset + Align - 1) & ~(Align - 1));
389 unsigned Result = StackOffset;
391 MF.getFrameInfo()->ensureMaxAlignment(Align);
395 /// Version of AllocateStack with extra register to be shadowed.
396 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
397 MarkAllocated(ShadowReg);
398 return AllocateStack(Size, Align);
401 /// Version of AllocateStack with list of extra registers to be shadowed.
402 /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
403 unsigned AllocateStack(unsigned Size, unsigned Align,
404 const MCPhysReg *ShadowRegs, unsigned NumShadowRegs) {
405 for (unsigned i = 0; i < NumShadowRegs; ++i)
406 MarkAllocated(ShadowRegs[i]);
407 return AllocateStack(Size, Align);
410 // HandleByVal - Allocate a stack slot large enough to pass an argument by
411 // value. The size and alignment information of the argument is encoded in its
412 // parameter attribute.
413 void HandleByVal(unsigned ValNo, MVT ValVT,
414 MVT LocVT, CCValAssign::LocInfo LocInfo,
415 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
417 // Returns count of byval arguments that are to be stored (even partly)
419 unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
421 // Returns count of byval in-regs arguments proceed.
422 unsigned getInRegsParamsProcessed() const { return InRegsParamsProcessed; }
424 // Get information about N-th byval parameter that is stored in registers.
425 // Here "ByValParamIndex" is N.
426 void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
427 unsigned& BeginReg, unsigned& EndReg) const {
428 assert(InRegsParamRecordIndex < ByValRegs.size() &&
429 "Wrong ByVal parameter index");
431 const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
432 BeginReg = info.Begin;
436 // Add information about parameter that is kept in registers.
437 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
438 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
441 // Goes either to next byval parameter (excluding "waste" record), or
442 // to the end of collection.
443 // Returns false, if end is reached.
444 bool nextInRegsParam() {
445 unsigned e = ByValRegs.size();
446 if (InRegsParamsProcessed < e)
447 ++InRegsParamsProcessed;
448 return InRegsParamsProcessed < e;
451 // Clear byval registers tracking info.
452 void clearByValRegsInfo() {
453 InRegsParamsProcessed = 0;
457 // Rewind byval registers tracking info.
458 void rewindByValRegsInfo() {
459 InRegsParamsProcessed = 0;
462 ParmContext getCallOrPrologue() const { return CallOrPrologue; }
464 // Get list of pending assignments
465 SmallVectorImpl<llvm::CCValAssign> &getPendingLocs() {
470 /// MarkAllocated - Mark a register and all of its aliases as allocated.
471 void MarkAllocated(unsigned Reg);
476 } // end namespace llvm