1 //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the CCState and CCValAssign classes, used for lowering
11 // and implementing calling conventions.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/Target/TargetCallingConv.h"
22 #include "llvm/CallingConv.h"
25 class TargetRegisterInfo;
29 /// CCValAssign - Represent assignment of one arg/retval to a location.
33 Full, // The value fills the full location.
34 SExt, // The value is sign extended in the location.
35 ZExt, // The value is zero extended in the location.
36 AExt, // The value is extended with undefined upper bits.
37 BCvt, // The value is bit-converted in the location.
38 VExt, // The value is vector-widened in the location.
39 // FIXME: Not implemented yet. Code that uses AExt to mean
40 // vector-widen should be fixed to use VExt instead.
41 Indirect // The location contains pointer to the value.
42 // TODO: a subset of the value is in the location.
45 /// ValNo - This is the value number begin assigned (e.g. an argument number).
48 /// Loc is either a stack offset or a register number.
51 /// isMem - True if this is a memory loc, false if it is a register loc.
54 /// isCustom - True if this arg/retval requires special handling.
57 /// Information about how the value is assigned.
60 /// ValVT - The type of the value being assigned.
63 /// LocVT - The type of the location being assigned to.
67 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
68 unsigned RegNo, MVT LocVT,
81 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
82 unsigned RegNo, MVT LocVT,
85 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
90 static CCValAssign getMem(unsigned ValNo, MVT ValVT,
91 unsigned Offset, MVT LocVT,
104 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
105 unsigned Offset, MVT LocVT,
108 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
113 unsigned getValNo() const { return ValNo; }
114 MVT getValVT() const { return ValVT; }
116 bool isRegLoc() const { return !isMem; }
117 bool isMemLoc() const { return isMem; }
119 bool needsCustom() const { return isCustom; }
121 unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
122 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
123 MVT getLocVT() const { return LocVT; }
125 LocInfo getLocInfo() const { return HTP; }
126 bool isExtInLoc() const {
127 return (HTP == AExt || HTP == SExt || HTP == ZExt);
132 /// CCAssignFn - This function assigns a location for Val, updating State to
133 /// reflect the change. It returns 'true' if it failed to handle Val.
134 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
135 MVT LocVT, CCValAssign::LocInfo LocInfo,
136 ISD::ArgFlagsTy ArgFlags, CCState &State);
138 /// CCCustomFn - This function assigns a location for Val, possibly updating
139 /// all args to reflect changes and indicates if it handled it. It must set
140 /// isCustom if it handles the arg and returns true.
141 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
142 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
143 ISD::ArgFlagsTy &ArgFlags, CCState &State);
145 /// ParmContext - This enum tracks whether calling convention lowering is in
146 /// the context of prologue or call generation. Not all backends make use of
147 /// this information.
148 typedef enum { Unknown, Prologue, Call } ParmContext;
150 /// CCState - This class holds information needed while lowering arguments and
151 /// return values. It captures which registers are already assigned and which
152 /// stack slots are used. It provides accessors to allocate these values.
155 CallingConv::ID CallingConv;
158 const TargetMachine &TM;
159 const TargetRegisterInfo &TRI;
160 SmallVector<CCValAssign, 16> &Locs;
161 LLVMContext &Context;
163 unsigned StackOffset;
164 SmallVector<uint32_t, 16> UsedRegs;
165 unsigned FirstByValReg;
166 bool FirstByValRegValid;
169 ParmContext CallOrPrologue;
172 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
173 const TargetMachine &TM, SmallVector<CCValAssign, 16> &locs,
176 void addLoc(const CCValAssign &V) {
180 LLVMContext &getContext() const { return Context; }
181 const TargetMachine &getTarget() const { return TM; }
182 MachineFunction &getMachineFunction() const { return MF; }
183 CallingConv::ID getCallingConv() const { return CallingConv; }
184 bool isVarArg() const { return IsVarArg; }
186 unsigned getNextStackOffset() const { return StackOffset; }
188 /// isAllocated - Return true if the specified register (or an alias) is
190 bool isAllocated(unsigned Reg) const {
191 return UsedRegs[Reg/32] & (1 << (Reg&31));
194 /// AnalyzeFormalArguments - Analyze an array of argument values,
195 /// incorporating info about the formals into this state.
196 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
199 /// AnalyzeReturn - Analyze the returned values of a return,
200 /// incorporating info about the result values into this state.
201 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
204 /// CheckReturn - Analyze the return values of a function, returning
205 /// true if the return can be performed without sret-demotion, and
207 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
210 /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
211 /// incorporating info about the passed values into this state.
212 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
215 /// AnalyzeCallOperands - Same as above except it takes vectors of types
216 /// and argument flags.
217 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
218 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
221 /// AnalyzeCallResult - Analyze the return values of a call,
222 /// incorporating info about the passed values into this state.
223 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
226 /// AnalyzeCallResult - Same as above except it's specialized for calls which
227 /// produce a single value.
228 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
230 /// getFirstUnallocated - Return the first unallocated register in the set, or
231 /// NumRegs if they are all allocated.
232 unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) const {
233 for (unsigned i = 0; i != NumRegs; ++i)
234 if (!isAllocated(Regs[i]))
239 /// AllocateReg - Attempt to allocate one register. If it is not available,
240 /// return zero. Otherwise, return the register, marking it and any aliases
242 unsigned AllocateReg(unsigned Reg) {
243 if (isAllocated(Reg)) return 0;
248 /// Version of AllocateReg with extra register to be shadowed.
249 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
250 if (isAllocated(Reg)) return 0;
252 MarkAllocated(ShadowReg);
256 /// AllocateReg - Attempt to allocate one of the specified registers. If none
257 /// are available, return zero. Otherwise, return the first one available,
258 /// marking it and any aliases as allocated.
259 unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) {
260 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
261 if (FirstUnalloc == NumRegs)
262 return 0; // Didn't find the reg.
264 // Mark the register and any aliases as allocated.
265 unsigned Reg = Regs[FirstUnalloc];
270 /// Version of AllocateReg with list of registers to be shadowed.
271 unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs,
273 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
274 if (FirstUnalloc == NumRegs)
275 return 0; // Didn't find the reg.
277 // Mark the register and any aliases as allocated.
278 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
280 MarkAllocated(ShadowReg);
284 /// AllocateStack - Allocate a chunk of stack space with the specified size
286 unsigned AllocateStack(unsigned Size, unsigned Align) {
287 assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
288 StackOffset = ((StackOffset + Align-1) & ~(Align-1));
289 unsigned Result = StackOffset;
294 /// Version of AllocateStack with extra register to be shadowed.
295 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
296 MarkAllocated(ShadowReg);
297 return AllocateStack(Size, Align);
300 // HandleByVal - Allocate a stack slot large enough to pass an argument by
301 // value. The size and alignment information of the argument is encoded in its
302 // parameter attribute.
303 void HandleByVal(unsigned ValNo, MVT ValVT,
304 MVT LocVT, CCValAssign::LocInfo LocInfo,
305 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
307 // First GPR that carries part of a byval aggregate that's split
308 // between registers and memory.
309 unsigned getFirstByValReg() const { return FirstByValRegValid ? FirstByValReg : 0; }
310 void setFirstByValReg(unsigned r) { FirstByValReg = r; FirstByValRegValid = true; }
311 void clearFirstByValReg() { FirstByValReg = 0; FirstByValRegValid = false; }
312 bool isFirstByValRegValid() const { return FirstByValRegValid; }
314 ParmContext getCallOrPrologue() const { return CallOrPrologue; }
317 /// MarkAllocated - Mark a register and all of its aliases as allocated.
318 void MarkAllocated(unsigned Reg);
323 } // end namespace llvm