1 //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the CCState and CCValAssign classes, used for lowering
11 // and implementing calling conventions.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/ValueTypes.h"
22 #include "llvm/Target/TargetCallingConv.h"
23 #include "llvm/CallingConv.h"
26 class TargetRegisterInfo;
30 /// CCValAssign - Represent assignment of one arg/retval to a location.
34 Full, // The value fills the full location.
35 SExt, // The value is sign extended in the location.
36 ZExt, // The value is zero extended in the location.
37 AExt, // The value is extended with undefined upper bits.
38 BCvt, // The value is bit-converted in the location.
39 VExt, // The value is vector-widened in the location.
40 // FIXME: Not implemented yet. Code that uses AExt to mean
41 // vector-widen should be fixed to use VExt instead.
42 Indirect // The location contains pointer to the value.
43 // TODO: a subset of the value is in the location.
46 /// ValNo - This is the value number begin assigned (e.g. an argument number).
49 /// Loc is either a stack offset or a register number.
52 /// isMem - True if this is a memory loc, false if it is a register loc.
55 /// isCustom - True if this arg/retval requires special handling.
58 /// Information about how the value is assigned.
61 /// ValVT - The type of the value being assigned.
64 /// LocVT - The type of the location being assigned to.
68 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
69 unsigned RegNo, MVT LocVT,
82 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
83 unsigned RegNo, MVT LocVT,
86 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
91 static CCValAssign getMem(unsigned ValNo, MVT ValVT,
92 unsigned Offset, MVT LocVT,
105 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
106 unsigned Offset, MVT LocVT,
109 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
114 unsigned getValNo() const { return ValNo; }
115 MVT getValVT() const { return ValVT; }
117 bool isRegLoc() const { return !isMem; }
118 bool isMemLoc() const { return isMem; }
120 bool needsCustom() const { return isCustom; }
122 unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
123 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
124 MVT getLocVT() const { return LocVT; }
126 LocInfo getLocInfo() const { return HTP; }
127 bool isExtInLoc() const {
128 return (HTP == AExt || HTP == SExt || HTP == ZExt);
133 /// CCAssignFn - This function assigns a location for Val, updating State to
134 /// reflect the change. It returns 'true' if it failed to handle Val.
135 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
136 MVT LocVT, CCValAssign::LocInfo LocInfo,
137 ISD::ArgFlagsTy ArgFlags, CCState &State);
139 /// CCCustomFn - This function assigns a location for Val, possibly updating
140 /// all args to reflect changes and indicates if it handled it. It must set
141 /// isCustom if it handles the arg and returns true.
142 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
143 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
144 ISD::ArgFlagsTy &ArgFlags, CCState &State);
146 /// ParmContext - This enum tracks whether calling convention lowering is in
147 /// the context of prologue or call generation. Not all backends make use of
148 /// this information.
149 typedef enum { Unknown, Prologue, Call } ParmContext;
151 /// CCState - This class holds information needed while lowering arguments and
152 /// return values. It captures which registers are already assigned and which
153 /// stack slots are used. It provides accessors to allocate these values.
156 CallingConv::ID CallingConv;
159 const TargetMachine &TM;
160 const TargetRegisterInfo &TRI;
161 SmallVector<CCValAssign, 16> &Locs;
162 LLVMContext &Context;
164 unsigned StackOffset;
165 SmallVector<uint32_t, 16> UsedRegs;
166 unsigned FirstByValReg;
167 bool FirstByValRegValid;
170 ParmContext CallOrPrologue;
173 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
174 const TargetMachine &TM, SmallVector<CCValAssign, 16> &locs,
177 void addLoc(const CCValAssign &V) {
181 LLVMContext &getContext() const { return Context; }
182 const TargetMachine &getTarget() const { return TM; }
183 MachineFunction &getMachineFunction() const { return MF; }
184 CallingConv::ID getCallingConv() const { return CallingConv; }
185 bool isVarArg() const { return IsVarArg; }
187 unsigned getNextStackOffset() const { return StackOffset; }
189 /// isAllocated - Return true if the specified register (or an alias) is
191 bool isAllocated(unsigned Reg) const {
192 return UsedRegs[Reg/32] & (1 << (Reg&31));
195 /// AnalyzeFormalArguments - Analyze an array of argument values,
196 /// incorporating info about the formals into this state.
197 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
200 /// AnalyzeReturn - Analyze the returned values of a return,
201 /// incorporating info about the result values into this state.
202 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
205 /// CheckReturn - Analyze the return values of a function, returning
206 /// true if the return can be performed without sret-demotion, and
208 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
211 /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
212 /// incorporating info about the passed values into this state.
213 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
216 /// AnalyzeCallOperands - Same as above except it takes vectors of types
217 /// and argument flags.
218 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
219 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
222 /// AnalyzeCallResult - Analyze the return values of a call,
223 /// incorporating info about the passed values into this state.
224 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
227 /// AnalyzeCallResult - Same as above except it's specialized for calls which
228 /// produce a single value.
229 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
231 /// getFirstUnallocated - Return the first unallocated register in the set, or
232 /// NumRegs if they are all allocated.
233 unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) const {
234 for (unsigned i = 0; i != NumRegs; ++i)
235 if (!isAllocated(Regs[i]))
240 /// AllocateReg - Attempt to allocate one register. If it is not available,
241 /// return zero. Otherwise, return the register, marking it and any aliases
243 unsigned AllocateReg(unsigned Reg) {
244 if (isAllocated(Reg)) return 0;
249 /// Version of AllocateReg with extra register to be shadowed.
250 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
251 if (isAllocated(Reg)) return 0;
253 MarkAllocated(ShadowReg);
257 /// AllocateReg - Attempt to allocate one of the specified registers. If none
258 /// are available, return zero. Otherwise, return the first one available,
259 /// marking it and any aliases as allocated.
260 unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) {
261 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
262 if (FirstUnalloc == NumRegs)
263 return 0; // Didn't find the reg.
265 // Mark the register and any aliases as allocated.
266 unsigned Reg = Regs[FirstUnalloc];
271 /// Version of AllocateReg with list of registers to be shadowed.
272 unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs,
274 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
275 if (FirstUnalloc == NumRegs)
276 return 0; // Didn't find the reg.
278 // Mark the register and any aliases as allocated.
279 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
281 MarkAllocated(ShadowReg);
285 /// AllocateStack - Allocate a chunk of stack space with the specified size
287 unsigned AllocateStack(unsigned Size, unsigned Align) {
288 assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
289 StackOffset = ((StackOffset + Align-1) & ~(Align-1));
290 unsigned Result = StackOffset;
292 MF.getFrameInfo()->ensureMaxAlignment(Align);
296 /// Version of AllocateStack with extra register to be shadowed.
297 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
298 MarkAllocated(ShadowReg);
299 return AllocateStack(Size, Align);
302 // HandleByVal - Allocate a stack slot large enough to pass an argument by
303 // value. The size and alignment information of the argument is encoded in its
304 // parameter attribute.
305 void HandleByVal(unsigned ValNo, MVT ValVT,
306 MVT LocVT, CCValAssign::LocInfo LocInfo,
307 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
309 // First GPR that carries part of a byval aggregate that's split
310 // between registers and memory.
311 unsigned getFirstByValReg() const { return FirstByValRegValid ? FirstByValReg : 0; }
312 void setFirstByValReg(unsigned r) { FirstByValReg = r; FirstByValRegValid = true; }
313 void clearFirstByValReg() { FirstByValReg = 0; FirstByValRegValid = false; }
314 bool isFirstByValRegValid() const { return FirstByValRegValid; }
316 ParmContext getCallOrPrologue() const { return CallOrPrologue; }
319 /// MarkAllocated - Mark a register and all of its aliases as allocated.
320 void MarkAllocated(unsigned Reg);
325 } // end namespace llvm