1 //===-- FastISel.h - Definition of the FastISel class ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the FastISel class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_FASTISEL_H
15 #define LLVM_CODEGEN_FASTISEL_H
17 #include "llvm/BasicBlock.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/CodeGen/SelectionDAGNodes.h"
23 class MachineBasicBlock;
24 class MachineFunction;
25 class TargetInstrInfo;
26 class TargetRegisterClass;
28 /// This file defines the FastISel class. This is a fast-path instruction
29 /// selection class that generates poor code and doesn't support illegal
30 /// types or non-trivial lowering, but runs quickly.
32 MachineBasicBlock *MBB;
34 const TargetInstrInfo *TII;
37 /// SelectInstructions - Do "fast" instruction selection over the
38 /// LLVM IR instructions in the range [Begin, N) where N is either
39 /// End or the first unsupported instruction. Return N.
40 /// ValueMap is filled in with a mapping of LLVM IR Values to
43 SelectInstructions(BasicBlock::iterator Begin, BasicBlock::iterator End,
44 DenseMap<const Value*, unsigned> &ValueMap);
47 FastISel(MachineBasicBlock *mbb, MachineFunction *mf,
48 const TargetInstrInfo *tii)
49 : MBB(mbb), MF(mf), TII(tii) {}
53 virtual unsigned FastEmit_(MVT::SimpleValueType VT,
54 ISD::NodeType Opcode);
55 virtual unsigned FastEmit_r(MVT::SimpleValueType VT,
56 ISD::NodeType Opcode, unsigned Op0);
57 virtual unsigned FastEmit_rr(MVT::SimpleValueType VT,
59 unsigned Op0, unsigned Op1);
61 unsigned FastEmitInst_(unsigned MachineInstOpcode,
62 const TargetRegisterClass *RC);
63 unsigned FastEmitInst_r(unsigned MachineInstOpcode,
64 const TargetRegisterClass *RC,
66 unsigned FastEmitInst_rr(unsigned MachineInstOpcode,
67 const TargetRegisterClass *RC,
68 unsigned Op0, unsigned Op1);