1 //===-- FastISel.h - Definition of the FastISel class ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the FastISel class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_FASTISEL_H
15 #define LLVM_CODEGEN_FASTISEL_H
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/ValueTypes.h"
26 class FunctionLoweringInfo;
29 class MachineBasicBlock;
30 class MachineConstantPool;
31 class MachineFunction;
33 class MachineFrameInfo;
34 class MachineRegisterInfo;
36 class TargetInstrInfo;
37 class TargetLibraryInfo;
40 class TargetRegisterClass;
41 class TargetRegisterInfo;
45 /// FastISel - This is a fast-path instruction selection class that
46 /// generates poor code and doesn't support illegal types or non-trivial
47 /// lowering, but runs quickly.
50 DenseMap<const Value *, unsigned> LocalValueMap;
51 FunctionLoweringInfo &FuncInfo;
52 MachineRegisterInfo &MRI;
53 MachineFrameInfo &MFI;
54 MachineConstantPool &MCP;
56 const TargetMachine &TM;
58 const TargetInstrInfo &TII;
59 const TargetLowering &TLI;
60 const TargetRegisterInfo &TRI;
61 const TargetLibraryInfo *LibInfo;
63 /// The position of the last instruction for materializing constants
64 /// for use in the current block. It resets to EmitStartPt when it
65 /// makes sense (for example, it's usually profitable to avoid function
66 /// calls between the definition and the use)
67 MachineInstr *LastLocalValue;
69 /// The top most instruction in the current block that is allowed for
70 /// emitting local variables. LastLocalValue resets to EmitStartPt when
71 /// it makes sense (for example, on function calls)
72 MachineInstr *EmitStartPt;
75 /// getLastLocalValue - Return the position of the last instruction
76 /// emitted for materializing constants for use in the current block.
77 MachineInstr *getLastLocalValue() { return LastLocalValue; }
79 /// setLastLocalValue - Update the position of the last instruction
80 /// emitted for materializing constants for use in the current block.
81 void setLastLocalValue(MachineInstr *I) {
86 /// startNewBlock - Set the current block to which generated machine
87 /// instructions will be appended, and clear the local CSE map.
91 /// getCurDebugLoc() - Return current debug location information.
92 DebugLoc getCurDebugLoc() const { return DL; }
94 /// LowerArguments - Do "fast" instruction selection for function arguments
95 /// and append machine instructions to the current block. Return true if
97 bool LowerArguments();
99 /// SelectInstruction - Do "fast" instruction selection for the given
100 /// LLVM IR instruction, and append generated machine instructions to
101 /// the current block. Return true if selection was successful.
103 bool SelectInstruction(const Instruction *I);
105 /// SelectOperator - Do "fast" instruction selection for the given
106 /// LLVM IR operator (Instruction or ConstantExpr), and append
107 /// generated machine instructions to the current block. Return true
108 /// if selection was successful.
110 bool SelectOperator(const User *I, unsigned Opcode);
112 /// getRegForValue - Create a virtual register and arrange for it to
113 /// be assigned the value for the given LLVM value.
114 unsigned getRegForValue(const Value *V);
116 /// lookUpRegForValue - Look up the value to see if its value is already
117 /// cached in a register. It may be defined by instructions across blocks or
119 unsigned lookUpRegForValue(const Value *V);
121 /// getRegForGEPIndex - This is a wrapper around getRegForValue that also
122 /// takes care of truncating or sign-extending the given getelementptr
124 std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
126 /// \brief We're checking to see if we can fold \p LI into \p FoldInst.
127 /// Note that we could have a sequence where multiple LLVM IR instructions
128 /// are folded into the same machineinstr. For example we could have:
129 /// A: x = load i32 *P
130 /// B: y = icmp A, 42
133 /// In this scenario, \p LI is "A", and \p FoldInst is "C". We know
134 /// about "B" (and any other folded instructions) because it is between
137 /// If we succeed folding, return true.
139 bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
141 /// \brief The specified machine instr operand is a vreg, and that
142 /// vreg is being provided by the specified load instruction. If possible,
143 /// try to fold the load as an operand to the instruction, returning true if
145 /// This method should be implemented by targets.
146 virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
147 const LoadInst * /*LI*/) {
151 /// recomputeInsertPt - Reset InsertPt to prepare for inserting instructions
152 /// into the current block.
153 void recomputeInsertPt();
155 /// removeDeadCode - Remove all dead instructions between the I and E.
156 void removeDeadCode(MachineBasicBlock::iterator I,
157 MachineBasicBlock::iterator E);
160 MachineBasicBlock::iterator InsertPt;
164 /// enterLocalValueArea - Prepare InsertPt to begin inserting instructions
165 /// into the local value area and return the old insert position.
166 SavePoint enterLocalValueArea();
168 /// leaveLocalValueArea - Reset InsertPt to the given old insert position.
169 void leaveLocalValueArea(SavePoint Old);
174 explicit FastISel(FunctionLoweringInfo &funcInfo,
175 const TargetLibraryInfo *libInfo);
177 /// TargetSelectInstruction - This method is called by target-independent
178 /// code when the normal FastISel process fails to select an instruction.
179 /// This gives targets a chance to emit code for anything that doesn't
180 /// fit into FastISel's framework. It returns true if it was successful.
183 TargetSelectInstruction(const Instruction *I) = 0;
185 /// FastLowerArguments - This method is called by target-independent code to
186 /// do target specific argument lowering. It returns true if it was
188 virtual bool FastLowerArguments();
190 /// FastEmit_r - This method is called by target-independent code
191 /// to request that an instruction with the given type and opcode
193 virtual unsigned FastEmit_(MVT VT,
197 /// FastEmit_r - This method is called by target-independent code
198 /// to request that an instruction with the given type, opcode, and
199 /// register operand be emitted.
201 virtual unsigned FastEmit_r(MVT VT,
204 unsigned Op0, bool Op0IsKill);
206 /// FastEmit_rr - This method is called by target-independent code
207 /// to request that an instruction with the given type, opcode, and
208 /// register operands be emitted.
210 virtual unsigned FastEmit_rr(MVT VT,
213 unsigned Op0, bool Op0IsKill,
214 unsigned Op1, bool Op1IsKill);
216 /// FastEmit_ri - This method is called by target-independent code
217 /// to request that an instruction with the given type, opcode, and
218 /// register and immediate operands be emitted.
220 virtual unsigned FastEmit_ri(MVT VT,
223 unsigned Op0, bool Op0IsKill,
226 /// FastEmit_rf - This method is called by target-independent code
227 /// to request that an instruction with the given type, opcode, and
228 /// register and floating-point immediate operands be emitted.
230 virtual unsigned FastEmit_rf(MVT VT,
233 unsigned Op0, bool Op0IsKill,
234 const ConstantFP *FPImm);
236 /// FastEmit_rri - This method is called by target-independent code
237 /// to request that an instruction with the given type, opcode, and
238 /// register and immediate operands be emitted.
240 virtual unsigned FastEmit_rri(MVT VT,
243 unsigned Op0, bool Op0IsKill,
244 unsigned Op1, bool Op1IsKill,
247 /// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries
248 /// to emit an instruction with an immediate operand using FastEmit_ri.
249 /// If that fails, it materializes the immediate into a register and try
250 /// FastEmit_rr instead.
251 unsigned FastEmit_ri_(MVT VT,
253 unsigned Op0, bool Op0IsKill,
254 uint64_t Imm, MVT ImmType);
256 /// FastEmit_i - This method is called by target-independent code
257 /// to request that an instruction with the given type, opcode, and
258 /// immediate operand be emitted.
259 virtual unsigned FastEmit_i(MVT VT,
264 /// FastEmit_f - This method is called by target-independent code
265 /// to request that an instruction with the given type, opcode, and
266 /// floating-point immediate operand be emitted.
267 virtual unsigned FastEmit_f(MVT VT,
270 const ConstantFP *FPImm);
272 /// FastEmitInst_ - Emit a MachineInstr with no operands and a
273 /// result register in the given register class.
275 unsigned FastEmitInst_(unsigned MachineInstOpcode,
276 const TargetRegisterClass *RC);
278 /// FastEmitInst_r - Emit a MachineInstr with one register operand
279 /// and a result register in the given register class.
281 unsigned FastEmitInst_r(unsigned MachineInstOpcode,
282 const TargetRegisterClass *RC,
283 unsigned Op0, bool Op0IsKill);
285 /// FastEmitInst_rr - Emit a MachineInstr with two register operands
286 /// and a result register in the given register class.
288 unsigned FastEmitInst_rr(unsigned MachineInstOpcode,
289 const TargetRegisterClass *RC,
290 unsigned Op0, bool Op0IsKill,
291 unsigned Op1, bool Op1IsKill);
293 /// FastEmitInst_rrr - Emit a MachineInstr with three register operands
294 /// and a result register in the given register class.
296 unsigned FastEmitInst_rrr(unsigned MachineInstOpcode,
297 const TargetRegisterClass *RC,
298 unsigned Op0, bool Op0IsKill,
299 unsigned Op1, bool Op1IsKill,
300 unsigned Op2, bool Op2IsKill);
302 /// FastEmitInst_ri - Emit a MachineInstr with a register operand,
303 /// an immediate, and a result register in the given register class.
305 unsigned FastEmitInst_ri(unsigned MachineInstOpcode,
306 const TargetRegisterClass *RC,
307 unsigned Op0, bool Op0IsKill,
310 /// FastEmitInst_rii - Emit a MachineInstr with one register operand
311 /// and two immediate operands.
313 unsigned FastEmitInst_rii(unsigned MachineInstOpcode,
314 const TargetRegisterClass *RC,
315 unsigned Op0, bool Op0IsKill,
316 uint64_t Imm1, uint64_t Imm2);
318 /// FastEmitInst_rf - Emit a MachineInstr with two register operands
319 /// and a result register in the given register class.
321 unsigned FastEmitInst_rf(unsigned MachineInstOpcode,
322 const TargetRegisterClass *RC,
323 unsigned Op0, bool Op0IsKill,
324 const ConstantFP *FPImm);
326 /// FastEmitInst_rri - Emit a MachineInstr with two register operands,
327 /// an immediate, and a result register in the given register class.
329 unsigned FastEmitInst_rri(unsigned MachineInstOpcode,
330 const TargetRegisterClass *RC,
331 unsigned Op0, bool Op0IsKill,
332 unsigned Op1, bool Op1IsKill,
335 /// FastEmitInst_rrii - Emit a MachineInstr with two register operands,
336 /// two immediates operands, and a result register in the given register
338 unsigned FastEmitInst_rrii(unsigned MachineInstOpcode,
339 const TargetRegisterClass *RC,
340 unsigned Op0, bool Op0IsKill,
341 unsigned Op1, bool Op1IsKill,
342 uint64_t Imm1, uint64_t Imm2);
344 /// FastEmitInst_i - Emit a MachineInstr with a single immediate
345 /// operand, and a result register in the given register class.
346 unsigned FastEmitInst_i(unsigned MachineInstrOpcode,
347 const TargetRegisterClass *RC,
350 /// FastEmitInst_ii - Emit a MachineInstr with a two immediate operands.
351 unsigned FastEmitInst_ii(unsigned MachineInstrOpcode,
352 const TargetRegisterClass *RC,
353 uint64_t Imm1, uint64_t Imm2);
355 /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg
356 /// from a specified index of a superregister to a specified type.
357 unsigned FastEmitInst_extractsubreg(MVT RetVT,
358 unsigned Op0, bool Op0IsKill,
361 /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op
362 /// with all but the least significant bit set to zero.
363 unsigned FastEmitZExtFromI1(MVT VT,
364 unsigned Op0, bool Op0IsKill);
366 /// FastEmitBranch - Emit an unconditional branch to the given block,
367 /// unless it is the immediate (fall-through) successor, and update
369 void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
371 void UpdateValueMap(const Value* I, unsigned Reg, unsigned NumRegs = 1);
373 unsigned createResultReg(const TargetRegisterClass *RC);
375 /// TargetMaterializeConstant - Emit a constant in a register using
376 /// target-specific logic, such as constant pool loads.
377 virtual unsigned TargetMaterializeConstant(const Constant* C) {
381 /// TargetMaterializeAlloca - Emit an alloca address in a register using
382 /// target-specific logic.
383 virtual unsigned TargetMaterializeAlloca(const AllocaInst* C) {
387 virtual unsigned TargetMaterializeFloatZero(const ConstantFP* CF) {
392 bool SelectBinaryOp(const User *I, unsigned ISDOpcode);
394 bool SelectFNeg(const User *I);
396 bool SelectGetElementPtr(const User *I);
398 bool SelectCall(const User *I);
400 bool SelectBitCast(const User *I);
402 bool SelectCast(const User *I, unsigned Opcode);
404 bool SelectExtractValue(const User *I);
406 bool SelectInsertValue(const User *I);
408 /// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
409 /// Emit code to ensure constants are copied into registers when needed.
410 /// Remember the virtual registers that need to be added to the Machine PHI
411 /// nodes as input. We cannot just directly add them, because expansion
412 /// might result in multiple MBB's for one BB. As such, the start of the
413 /// BB might correspond to a different MBB than the end.
414 bool HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
416 /// materializeRegForValue - Helper for getRegForVale. This function is
417 /// called when the value isn't already available in a register and must
418 /// be materialized with new instructions.
419 unsigned materializeRegForValue(const Value *V, MVT VT);
421 /// flushLocalValueMap - clears LocalValueMap and moves the area for the
422 /// new local variables to the beginning of the block. It helps to avoid
423 /// spilling cached variables across heavy instructions like calls.
424 void flushLocalValueMap();
426 /// hasTrivialKill - Test whether the given value has exactly one use.
427 bool hasTrivialKill(const Value *V) const;