1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
18 #include "llvm/InlineAsm.h"
19 #include "llvm/Instructions.h"
20 #include "llvm/ADT/APInt.h"
21 #include "llvm/ADT/DenseMap.h"
22 #include "llvm/ADT/DenseSet.h"
23 #include "llvm/ADT/IndexedMap.h"
24 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/ADT/SmallSet.h"
28 #include "llvm/Analysis/BranchProbabilityInfo.h"
29 #include "llvm/CodeGen/ValueTypes.h"
30 #include "llvm/CodeGen/ISDOpcodes.h"
31 #include "llvm/CodeGen/MachineBasicBlock.h"
32 #include "llvm/Support/CallSite.h"
33 #include "llvm/Target/TargetRegisterInfo.h"
45 class MachineBasicBlock;
46 class MachineFunction;
47 class MachineModuleInfo;
48 class MachineRegisterInfo;
52 //===--------------------------------------------------------------------===//
53 /// FunctionLoweringInfo - This contains information that is global to a
54 /// function that is used when lowering a region of the function.
56 class FunctionLoweringInfo {
58 const TargetLowering &TLI;
61 MachineRegisterInfo *RegInfo;
62 BranchProbabilityInfo *BPI;
63 /// CanLowerReturn - true iff the function's return value can be lowered to
67 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
68 /// allocated to hold a pointer to the hidden sret parameter.
69 unsigned DemoteRegister;
71 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
72 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
74 /// ValueMap - Since we emit code for the function a basic block at a time,
75 /// we must remember which virtual registers hold the values for
76 /// cross-basic-block values.
77 DenseMap<const Value*, unsigned> ValueMap;
79 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
80 /// the entry block. This allows the allocas to be efficiently referenced
81 /// anywhere in the function.
82 DenseMap<const AllocaInst*, int> StaticAllocaMap;
84 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
85 DenseMap<const Argument*, int> ByValArgFrameIndexMap;
87 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
88 /// function arguments that are inserted after scheduling is completed.
89 SmallVector<MachineInstr*, 8> ArgDbgValues;
91 /// RegFixups - Registers which need to be replaced after isel is done.
92 DenseMap<unsigned, unsigned> RegFixups;
94 /// MBB - The current block.
95 MachineBasicBlock *MBB;
97 /// MBB - The current insert position inside the current block.
98 MachineBasicBlock::iterator InsertPt;
101 SmallSet<const Instruction *, 8> CatchInfoLost;
102 SmallSet<const Instruction *, 8> CatchInfoFound;
106 unsigned NumSignBits : 31;
108 APInt KnownOne, KnownZero;
109 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
113 /// VisitedBBs - The set of basic blocks visited thus far by instruction
115 DenseSet<const BasicBlock*> VisitedBBs;
117 /// PHINodesToUpdate - A list of phi instructions whose operand list will
118 /// be updated after processing the current basic block.
119 /// TODO: This isn't per-function state, it's per-basic-block state. But
120 /// there's no other convenient place for it to live right now.
121 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
123 explicit FunctionLoweringInfo(const TargetLowering &TLI);
125 /// set - Initialize this FunctionLoweringInfo with the given Function
126 /// and its associated MachineFunction.
128 void set(const Function &Fn, MachineFunction &MF);
130 /// clear - Clear out all the function-specific state. This returns this
131 /// FunctionLoweringInfo to an empty state, ready to be used for a
132 /// different function.
135 /// isExportedInst - Return true if the specified value is an instruction
136 /// exported from its block.
137 bool isExportedInst(const Value *V) {
138 return ValueMap.count(V);
141 unsigned CreateReg(EVT VT);
143 unsigned CreateRegs(Type *Ty);
145 unsigned InitializeRegForValue(const Value *V) {
146 unsigned &R = ValueMap[V];
147 assert(R == 0 && "Already initialized this value register!");
148 return R = CreateRegs(V->getType());
151 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
152 /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
153 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
154 if (!LiveOutRegInfo.inBounds(Reg))
157 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
164 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
165 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
166 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
167 /// the larger bit width by zero extension. The bit width must be no smaller
168 /// than the LiveOutInfo's existing bit width.
169 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
171 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
172 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
173 const APInt &KnownZero, const APInt &KnownOne) {
174 // Only install this information if it tells us something.
175 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
178 LiveOutRegInfo.grow(Reg);
179 LiveOutInfo &LOI = LiveOutRegInfo[Reg];
180 LOI.NumSignBits = NumSignBits;
181 LOI.KnownOne = KnownOne;
182 LOI.KnownZero = KnownZero;
185 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
186 /// register based on the LiveOutInfo of its operands.
187 void ComputePHILiveOutRegInfo(const PHINode*);
189 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
190 /// called when a block is visited before all of its predecessors.
191 void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
192 // PHIs with no uses have no ValueMap entry.
193 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
194 if (It == ValueMap.end())
197 unsigned Reg = It->second;
198 LiveOutRegInfo.grow(Reg);
199 LiveOutRegInfo[Reg].IsValid = false;
202 /// setByValArgumentFrameIndex - Record frame index for the byval
204 void setByValArgumentFrameIndex(const Argument *A, int FI);
206 /// getByValArgumentFrameIndex - Get frame index for the byval argument.
207 int getByValArgumentFrameIndex(const Argument *A);
210 /// LiveOutRegInfo - Information about live out vregs.
211 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
214 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
215 /// call, and add them to the specified machine basic block.
216 void AddCatchInfo(const CallInst &I,
217 MachineModuleInfo *MMI, MachineBasicBlock *MBB);
219 /// CopyCatchInfo - Copy catch information from SuccBB (or one of its
220 /// successors) to LPad.
221 void CopyCatchInfo(const BasicBlock *SuccBB, const BasicBlock *LPad,
222 MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
224 } // end namespace llvm