1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
18 #include "llvm/ADT/APInt.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/IndexedMap.h"
21 #include "llvm/ADT/SmallPtrSet.h"
22 #include "llvm/ADT/SmallVector.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/ISDOpcodes.h"
25 #include "llvm/IR/InlineAsm.h"
26 #include "llvm/IR/Instructions.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
34 class BranchProbabilityInfo;
40 class MachineBasicBlock;
41 class MachineFunction;
42 class MachineModuleInfo;
43 class MachineRegisterInfo;
49 //===--------------------------------------------------------------------===//
50 /// FunctionLoweringInfo - This contains information that is global to a
51 /// function that is used when lowering a region of the function.
53 class FunctionLoweringInfo {
57 const TargetLowering *TLI;
58 MachineRegisterInfo *RegInfo;
59 BranchProbabilityInfo *BPI;
60 /// CanLowerReturn - true iff the function's return value can be lowered to
64 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
65 /// allocated to hold a pointer to the hidden sret parameter.
66 unsigned DemoteRegister;
68 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
69 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
71 /// ValueMap - Since we emit code for the function a basic block at a time,
72 /// we must remember which virtual registers hold the values for
73 /// cross-basic-block values.
74 DenseMap<const Value*, unsigned> ValueMap;
76 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
77 /// the entry block. This allows the allocas to be efficiently referenced
78 /// anywhere in the function.
79 DenseMap<const AllocaInst*, int> StaticAllocaMap;
81 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
82 DenseMap<const Argument*, int> ByValArgFrameIndexMap;
84 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
85 /// function arguments that are inserted after scheduling is completed.
86 SmallVector<MachineInstr*, 8> ArgDbgValues;
88 /// RegFixups - Registers which need to be replaced after isel is done.
89 DenseMap<unsigned, unsigned> RegFixups;
91 /// MBB - The current block.
92 MachineBasicBlock *MBB;
94 /// MBB - The current insert position inside the current block.
95 MachineBasicBlock::iterator InsertPt;
98 SmallPtrSet<const Instruction *, 8> CatchInfoLost;
99 SmallPtrSet<const Instruction *, 8> CatchInfoFound;
103 unsigned NumSignBits : 31;
105 APInt KnownOne, KnownZero;
106 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
110 /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
112 DenseMap<const Value *, ISD::NodeType> PreferredExtendType;
114 /// VisitedBBs - The set of basic blocks visited thus far by instruction
116 SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
118 /// PHINodesToUpdate - A list of phi instructions whose operand list will
119 /// be updated after processing the current basic block.
120 /// TODO: This isn't per-function state, it's per-basic-block state. But
121 /// there's no other convenient place for it to live right now.
122 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
123 unsigned OrigNumPHINodesToUpdate;
125 /// If the current MBB is a landing pad, the exception pointer and exception
126 /// selector registers are copied into these virtual registers by
127 /// SelectionDAGISel::PrepareEHLandingPad().
128 unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
130 /// set - Initialize this FunctionLoweringInfo with the given Function
131 /// and its associated MachineFunction.
133 void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG);
135 /// clear - Clear out all the function-specific state. This returns this
136 /// FunctionLoweringInfo to an empty state, ready to be used for a
137 /// different function.
140 /// isExportedInst - Return true if the specified value is an instruction
141 /// exported from its block.
142 bool isExportedInst(const Value *V) {
143 return ValueMap.count(V);
146 unsigned CreateReg(MVT VT);
148 unsigned CreateRegs(Type *Ty);
150 unsigned InitializeRegForValue(const Value *V) {
151 unsigned &R = ValueMap[V];
152 assert(R == 0 && "Already initialized this value register!");
153 return R = CreateRegs(V->getType());
156 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
157 /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
158 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
159 if (!LiveOutRegInfo.inBounds(Reg))
162 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
169 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
170 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
171 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
172 /// the larger bit width by zero extension. The bit width must be no smaller
173 /// than the LiveOutInfo's existing bit width.
174 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
176 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
177 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
178 const APInt &KnownZero, const APInt &KnownOne) {
179 // Only install this information if it tells us something.
180 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
183 LiveOutRegInfo.grow(Reg);
184 LiveOutInfo &LOI = LiveOutRegInfo[Reg];
185 LOI.NumSignBits = NumSignBits;
186 LOI.KnownOne = KnownOne;
187 LOI.KnownZero = KnownZero;
190 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
191 /// register based on the LiveOutInfo of its operands.
192 void ComputePHILiveOutRegInfo(const PHINode*);
194 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
195 /// called when a block is visited before all of its predecessors.
196 void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
197 // PHIs with no uses have no ValueMap entry.
198 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
199 if (It == ValueMap.end())
202 unsigned Reg = It->second;
203 LiveOutRegInfo.grow(Reg);
204 LiveOutRegInfo[Reg].IsValid = false;
207 /// setArgumentFrameIndex - Record frame index for the byval
209 void setArgumentFrameIndex(const Argument *A, int FI);
211 /// getArgumentFrameIndex - Get frame index for the byval argument.
212 int getArgumentFrameIndex(const Argument *A);
215 /// LiveOutRegInfo - Information about live out vregs.
216 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
219 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
220 /// being passed to this variadic function, and set the MachineModuleInfo's
221 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
222 /// reference to _fltused on Windows, which will link in MSVCRT's
223 /// floating-point support.
224 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
226 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
227 /// call, and add them to the specified machine basic block.
228 void AddCatchInfo(const CallInst &I,
229 MachineModuleInfo *MMI, MachineBasicBlock *MBB);
231 /// AddLandingPadInfo - Extract the exception handling information from the
232 /// landingpad instruction and add them to the specified machine module info.
233 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
234 MachineBasicBlock *MBB);
236 } // end namespace llvm