1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
18 #include "llvm/ADT/APInt.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/IndexedMap.h"
21 #include "llvm/ADT/SmallPtrSet.h"
22 #include "llvm/ADT/SmallVector.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/ISDOpcodes.h"
25 #include "llvm/IR/InlineAsm.h"
26 #include "llvm/IR/Instructions.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
34 class BranchProbabilityInfo;
40 class MachineBasicBlock;
41 class MachineFunction;
42 class MachineModuleInfo;
43 class MachineRegisterInfo;
49 //===--------------------------------------------------------------------===//
50 /// FunctionLoweringInfo - This contains information that is global to a
51 /// function that is used when lowering a region of the function.
53 class FunctionLoweringInfo {
54 const TargetMachine &TM;
58 MachineRegisterInfo *RegInfo;
59 BranchProbabilityInfo *BPI;
60 /// CanLowerReturn - true iff the function's return value can be lowered to
64 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
65 /// allocated to hold a pointer to the hidden sret parameter.
66 unsigned DemoteRegister;
68 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
69 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
71 /// ValueMap - Since we emit code for the function a basic block at a time,
72 /// we must remember which virtual registers hold the values for
73 /// cross-basic-block values.
74 DenseMap<const Value*, unsigned> ValueMap;
76 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
77 /// the entry block. This allows the allocas to be efficiently referenced
78 /// anywhere in the function.
79 DenseMap<const AllocaInst*, int> StaticAllocaMap;
81 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
82 DenseMap<const Argument*, int> ByValArgFrameIndexMap;
84 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
85 /// function arguments that are inserted after scheduling is completed.
86 SmallVector<MachineInstr*, 8> ArgDbgValues;
88 /// RegFixups - Registers which need to be replaced after isel is done.
89 DenseMap<unsigned, unsigned> RegFixups;
91 /// MBB - The current block.
92 MachineBasicBlock *MBB;
94 /// MBB - The current insert position inside the current block.
95 MachineBasicBlock::iterator InsertPt;
98 SmallPtrSet<const Instruction *, 8> CatchInfoLost;
99 SmallPtrSet<const Instruction *, 8> CatchInfoFound;
103 unsigned NumSignBits : 31;
105 APInt KnownOne, KnownZero;
106 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
110 /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
112 DenseMap<const Value *, ISD::NodeType> PreferredExtendType;
114 /// VisitedBBs - The set of basic blocks visited thus far by instruction
116 SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
118 /// PHINodesToUpdate - A list of phi instructions whose operand list will
119 /// be updated after processing the current basic block.
120 /// TODO: This isn't per-function state, it's per-basic-block state. But
121 /// there's no other convenient place for it to live right now.
122 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
123 unsigned OrigNumPHINodesToUpdate;
125 /// If the current MBB is a landing pad, the exception pointer and exception
126 /// selector registers are copied into these virtual registers by
127 /// SelectionDAGISel::PrepareEHLandingPad().
128 unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
130 explicit FunctionLoweringInfo(const TargetMachine &TM) : TM(TM) {}
132 /// set - Initialize this FunctionLoweringInfo with the given Function
133 /// and its associated MachineFunction.
135 void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG);
137 /// clear - Clear out all the function-specific state. This returns this
138 /// FunctionLoweringInfo to an empty state, ready to be used for a
139 /// different function.
142 /// isExportedInst - Return true if the specified value is an instruction
143 /// exported from its block.
144 bool isExportedInst(const Value *V) {
145 return ValueMap.count(V);
148 unsigned CreateReg(MVT VT);
150 unsigned CreateRegs(Type *Ty);
152 unsigned InitializeRegForValue(const Value *V) {
153 unsigned &R = ValueMap[V];
154 assert(R == 0 && "Already initialized this value register!");
155 return R = CreateRegs(V->getType());
158 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
159 /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
160 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
161 if (!LiveOutRegInfo.inBounds(Reg))
164 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
171 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
172 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
173 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
174 /// the larger bit width by zero extension. The bit width must be no smaller
175 /// than the LiveOutInfo's existing bit width.
176 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
178 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
179 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
180 const APInt &KnownZero, const APInt &KnownOne) {
181 // Only install this information if it tells us something.
182 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
185 LiveOutRegInfo.grow(Reg);
186 LiveOutInfo &LOI = LiveOutRegInfo[Reg];
187 LOI.NumSignBits = NumSignBits;
188 LOI.KnownOne = KnownOne;
189 LOI.KnownZero = KnownZero;
192 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
193 /// register based on the LiveOutInfo of its operands.
194 void ComputePHILiveOutRegInfo(const PHINode*);
196 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
197 /// called when a block is visited before all of its predecessors.
198 void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
199 // PHIs with no uses have no ValueMap entry.
200 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
201 if (It == ValueMap.end())
204 unsigned Reg = It->second;
205 LiveOutRegInfo.grow(Reg);
206 LiveOutRegInfo[Reg].IsValid = false;
209 /// setArgumentFrameIndex - Record frame index for the byval
211 void setArgumentFrameIndex(const Argument *A, int FI);
213 /// getArgumentFrameIndex - Get frame index for the byval argument.
214 int getArgumentFrameIndex(const Argument *A);
217 /// LiveOutRegInfo - Information about live out vregs.
218 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
221 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
222 /// being passed to this variadic function, and set the MachineModuleInfo's
223 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
224 /// reference to _fltused on Windows, which will link in MSVCRT's
225 /// floating-point support.
226 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
228 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
229 /// call, and add them to the specified machine basic block.
230 void AddCatchInfo(const CallInst &I,
231 MachineModuleInfo *MMI, MachineBasicBlock *MBB);
233 /// AddLandingPadInfo - Extract the exception handling information from the
234 /// landingpad instruction and add them to the specified machine module info.
235 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
236 MachineBasicBlock *MBB);
238 } // end namespace llvm