1 //===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares codegen opcodes and related utilities.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_ISDOPCODES_H
15 #define LLVM_CODEGEN_ISDOPCODES_H
19 /// ISD namespace - This namespace contains an enum which represents all of the
20 /// SelectionDAG node types and value types.
24 //===--------------------------------------------------------------------===//
25 /// ISD::NodeType enum - This enum defines the target-independent operators
26 /// for a SelectionDAG.
28 /// Targets may also define target-dependent operator codes for SDNodes. For
29 /// example, on x86, these are the enum values in the X86ISD namespace.
30 /// Targets should aim to use target-independent operators to model their
31 /// instruction sets as much as possible, and only use target-dependent
32 /// operators when they have special requirements.
34 /// Finally, during and after selection proper, SNodes may use special
35 /// operator codes that correspond directly with MachineInstr opcodes. These
36 /// are used to represent selected instructions. See the isMachineOpcode()
37 /// and getMachineOpcode() member functions of SDNode.
40 // DELETED_NODE - This is an illegal value that is used to catch
41 // errors. This opcode is not a legal opcode for any node.
44 // EntryToken - This is the marker used to indicate the start of the region.
47 // TokenFactor - This node takes multiple tokens as input and produces a
48 // single token result. This is used to represent the fact that the operand
49 // operators are independent of each other.
52 // AssertSext, AssertZext - These nodes record if a register contains a
53 // value that has already been zero or sign extended from a narrower type.
54 // These nodes take two operands. The first is the node that has already
55 // been extended, and the second is a value type node indicating the width
57 AssertSext, AssertZext,
59 // Various leaf nodes.
60 BasicBlock, VALUETYPE, CONDCODE, Register,
62 GlobalAddress, GlobalTLSAddress, FrameIndex,
63 JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
65 // The address of the GOT
68 // FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
69 // llvm.returnaddress on the DAG. These nodes take one operand, the index
70 // of the frame or return address to return. An index of zero corresponds
71 // to the current function's frame or return address, an index of one to the
72 // parent's frame or return address, and so on.
73 FRAMEADDR, RETURNADDR,
75 // FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
76 // first (possible) on-stack argument. This is needed for correct stack
77 // adjustment during unwind.
80 // RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the
81 // address of the exception block on entry to an landing pad block.
84 // RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the
85 // address of the Language Specific Data Area for the enclosing function.
88 // RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node represents
89 // the selection index of the exception thrown.
92 // OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
93 // 'eh_return' gcc dwarf builtin, which is used to return from
94 // exception. The general meaning is: adjust stack by OFFSET and pass
95 // execution to HANDLER. Many platform-related details also :)
98 // OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer)
99 // This corresponds to the eh.sjlj.setjmp intrinsic.
100 // It takes an input chain and a pointer to the jump buffer as inputs
101 // and returns an outchain.
104 // OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
105 // This corresponds to the eh.sjlj.longjmp intrinsic.
106 // It takes an input chain and a pointer to the jump buffer as inputs
107 // and returns an outchain.
110 // TargetConstant* - Like Constant*, but the DAG does not do any folding,
111 // simplification, or lowering of the constant. They are used for constants
112 // which are known to fit in the immediate fields of their users, or for
113 // carrying magic numbers which are not values which need to be materialized
118 // TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
119 // anything else with this node, and this is valid in the target-specific
120 // dag, turning into a GlobalAddress operand.
122 TargetGlobalTLSAddress,
126 TargetExternalSymbol,
129 /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
130 /// This node represents a target intrinsic function with no side effects.
131 /// The first operand is the ID number of the intrinsic from the
132 /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The
133 /// node returns the result of the intrinsic.
136 /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
137 /// This node represents a target intrinsic function with side effects that
138 /// returns a result. The first operand is a chain pointer. The second is
139 /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The
140 /// operands to the intrinsic follow. The node has two results, the result
141 /// of the intrinsic and an output chain.
144 /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
145 /// This node represents a target intrinsic function with side effects that
146 /// does not return a result. The first operand is a chain pointer. The
147 /// second is the ID number of the intrinsic from the llvm::Intrinsic
148 /// namespace. The operands to the intrinsic follow.
151 // CopyToReg - This node has three operands: a chain, a register number to
152 // set to this value, and a value.
155 // CopyFromReg - This node indicates that the input value is a virtual or
156 // physical register that is defined outside of the scope of this
157 // SelectionDAG. The register is available from the RegisterSDNode object.
160 // UNDEF - An undefined node
163 // EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
164 // a Constant, which is required to be operand #1) half of the integer or
165 // float value specified as operand #0. This is only for use before
166 // legalization, for values that will be broken into multiple registers.
169 // BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. Given
170 // two values of the same integer value type, this produces a value twice as
171 // big. Like EXTRACT_ELEMENT, this can only be used before legalization.
174 // MERGE_VALUES - This node takes multiple discrete operands and returns
175 // them all as its individual results. This nodes has exactly the same
176 // number of inputs and outputs. This node is useful for some pieces of the
177 // code generator that want to think about a single node with multiple
178 // results, not multiple nodes.
181 // Simple integer binary arithmetic operators.
182 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
184 // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
185 // a signed/unsigned value of type i[2*N], and return the full value as
186 // two results, each of type iN.
187 SMUL_LOHI, UMUL_LOHI,
189 // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
193 // CARRY_FALSE - This node is used when folding other nodes,
194 // like ADDC/SUBC, which indicate the carry result is always false.
197 // Carry-setting nodes for multiple precision addition and subtraction.
198 // These nodes take two operands of the same value type, and produce two
199 // results. The first result is the normal add or sub result, the second
200 // result is the carry flag result.
203 // Carry-using nodes for multiple precision addition and subtraction. These
204 // nodes take three operands: The first two are the normal lhs and rhs to
205 // the add or sub, and the third is the input carry flag. These nodes
206 // produce two results; the normal result of the add or sub, and the output
207 // carry flag. These nodes both read and write a carry flag to allow them
208 // to them to be chained together for add and sub of arbitrarily large
212 // RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
213 // These nodes take two operands: the normal LHS and RHS to the add. They
214 // produce two results: the normal result of the add, and a boolean that
215 // indicates if an overflow occured (*not* a flag, because it may be stored
216 // to memory, etc.). If the type of the boolean is not i1 then the high
217 // bits conform to getBooleanContents.
218 // These nodes are generated from the llvm.[su]add.with.overflow intrinsics.
221 // Same for subtraction
224 // Same for multiplication
227 // Simple binary floating point operators.
228 FADD, FSUB, FMUL, FDIV, FREM,
230 // FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
231 // DAG node does not require that X and Y have the same type, just that they
232 // are both floating point. X and the result must have the same type.
233 // FCOPYSIGN(f32, f64) is allowed.
236 // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
237 // value as an integer 0/1 value.
240 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
241 /// specified, possibly variable, elements. The number of elements is
242 /// required to be a power of two. The types of the operands must all be
243 /// the same and must match the vector element type, except that integer
244 /// types are allowed to be larger than the element type, in which case
245 /// the operands are implicitly truncated.
248 /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
249 /// at IDX replaced with VAL. If the type of VAL is larger than the vector
250 /// element type then VAL is truncated before replacement.
253 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
254 /// identified by the (potentially variable) element number IDX. If the
255 /// return type is an integer type larger than the element type of the
256 /// vector, the result is extended to the width of the return type.
259 /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
260 /// vector type with the same length and element type, this produces a
261 /// concatenated vector result value, with length equal to the sum of the
262 /// lengths of the input vectors.
265 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
266 /// vector value) starting with the (potentially variable) element number
267 /// IDX, which must be a multiple of the result vector length.
270 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
271 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
272 /// values that indicate which value (or undef) each result element will
273 /// get. These constant ints are accessible through the
274 /// ShuffleVectorSDNode class. This is quite similar to the Altivec
275 /// 'vperm' instruction, except that the indices must be constants and are
276 /// in terms of the element size of VEC1/VEC2, not in terms of bytes.
279 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
280 /// scalar value into element 0 of the resultant vector type. The top
281 /// elements 1 to N-1 of the N-element vector are undefined. The type
282 /// of the operand must match the vector element type, except when they
283 /// are integer types. In this case the operand is allowed to be wider
284 /// than the vector element type, and is implicitly truncated to it.
287 // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing
288 // an unsigned/signed value of type i[2*N], then return the top part.
291 // Bitwise operators - logical and, logical or, logical xor, shift left,
292 // shift right algebraic (shift in sign bits), shift right logical (shift in
293 // zeroes), rotate left, rotate right, and byteswap.
294 AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP,
296 // Counting operators
299 // Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
300 // i1 then the high bits must conform to getBooleanContents.
303 // Select with condition operator - This selects between a true value and
304 // a false value (ops #2 and #3) based on the boolean result of comparing
305 // the lhs and rhs (ops #0 and #1) of a conditional expression with the
306 // condition code in op #4, a CondCodeSDNode.
309 // SetCC operator - This evaluates to a true value iff the condition is
310 // true. If the result value type is not i1 then the high bits conform
311 // to getBooleanContents. The operands to this are the left and right
312 // operands to compare (ops #0, and #1) and the condition code to compare
313 // them with (op #2) as a CondCodeSDNode.
316 // RESULT = VSETCC(LHS, RHS, COND) operator - This evaluates to a vector of
317 // integer elements with all bits of the result elements set to true if the
318 // comparison is true or all cleared if the comparison is false. The
319 // operands to this are the left and right operands to compare (LHS/RHS) and
320 // the condition code to compare them with (COND) as a CondCodeSDNode.
323 // SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
324 // integer shift operations, just like ADD/SUB_PARTS. The operation
326 // [Lo,Hi] = op [LoLHS,HiLHS], Amt
327 SHL_PARTS, SRA_PARTS, SRL_PARTS,
329 // Conversion operators. These are all single input single output
330 // operations. For all of these, the result type must be strictly
331 // wider or narrower (depending on the operation) than the source
334 // SIGN_EXTEND - Used for integer types, replicating the sign bit
338 // ZERO_EXTEND - Used for integer types, zeroing the new bits.
341 // ANY_EXTEND - Used for integer types. The high bits are undefined.
344 // TRUNCATE - Completely drop the high bits.
347 // [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
348 // depends on the first letter) to floating point.
352 // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
353 // sign extend a small value in a large integer register (e.g. sign
354 // extending the low 8 bits of a 32-bit register to fill the top 24 bits
355 // with the 7th bit). The size of the smaller type is indicated by the 1th
356 // operand, a ValueType node.
359 /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
364 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
365 /// down to the precision of the destination VT. TRUNC is a flag, which is
366 /// always an integer that is zero or one. If TRUNC is 0, this is a
367 /// normal rounding, if it is 1, this FP_ROUND is known to not change the
370 /// The TRUNC = 1 case is used in cases where we know that the value will
371 /// not be modified by the node, because Y is not using any of the extra
372 /// precision of source type. This allows certain transformations like
373 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
374 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
377 // FLT_ROUNDS_ - Returns current rounding mode:
380 // 1 Round to nearest
385 /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
386 /// rounds it to a floating point value. It then promotes it and returns it
387 /// in a register of the same size. This operation effectively just
388 /// discards excess precision. The type to round down to is specified by
389 /// the VT operand, a VTSDNode.
392 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
395 // BIT_CONVERT - This operator converts between integer, vector and FP
396 // values, as if the value was stored to memory with one type and loaded
397 // from the same address with the other type (or equivalently for vector
398 // format conversions, etc). The source and result are required to have
399 // the same bit size (e.g. f32 <-> i32). This can also be used for
400 // int-to-int or fp-to-fp conversions, but that is a noop, deleted by
404 // CONVERT_RNDSAT - This operator is used to support various conversions
405 // between various types (float, signed, unsigned and vectors of those
406 // types) with rounding and saturation. NOTE: Avoid using this operator as
407 // most target don't support it and the operator might be removed in the
408 // future. It takes the following arguments:
410 // 1) dest type (type to convert to)
411 // 2) src type (type to convert from)
414 // 5) ISD::CvtCode indicating the type of conversion to do
417 // FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform
418 // promotions and truncation for half-precision (16 bit) floating
419 // numbers. We need special nodes since FP16 is a storage-only type with
420 // special semantics of operations.
421 FP16_TO_FP32, FP32_TO_FP16,
423 // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
424 // FLOG, FLOG2, FLOG10, FEXP, FEXP2,
425 // FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating
426 // point operations. These are inspired by libm.
427 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
428 FLOG, FLOG2, FLOG10, FEXP, FEXP2,
429 FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR,
431 // LOAD and STORE have token chains as their first operand, then the same
432 // operands as an LLVM load/store instruction, then an offset node that
433 // is added / subtracted from the base pointer to form the address (for
434 // indexed memory ops).
437 // DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
438 // to a specified boundary. This node always has two return values: a new
439 // stack pointer value and a chain. The first operand is the token chain,
440 // the second is the number of bytes to allocate, and the third is the
441 // alignment boundary. The size is guaranteed to be a multiple of the stack
442 // alignment, and the alignment is guaranteed to be bigger than the stack
443 // alignment (if required) or 0 to get standard stack alignment.
446 // Control flow instructions. These all have token chains.
448 // BR - Unconditional branch. The first operand is the chain
449 // operand, the second is the MBB to branch to.
452 // BRIND - Indirect branch. The first operand is the chain, the second
453 // is the value to branch to, which must be of the same type as the target's
457 // BR_JT - Jumptable branch. The first operand is the chain, the second
458 // is the jumptable index, the last one is the jumptable entry index.
461 // BRCOND - Conditional branch. The first operand is the chain, the
462 // second is the condition, the third is the block to branch to if the
463 // condition is true. If the type of the condition is not i1, then the
464 // high bits must conform to getBooleanContents.
467 // BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
468 // that the condition is represented as condition code, and two nodes to
469 // compare, rather than as a combined SetCC node. The operands in order are
470 // chain, cc, lhs, rhs, block to branch to if condition is true.
473 // INLINEASM - Represents an inline asm block. This node always has two
474 // return values: a chain and a flag result. The inputs are as follows:
475 // Operand #0 : Input chain.
476 // Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.
477 // Operand #2 : a MDNodeSDNode with the !srcloc metadata.
478 // After this, it is followed by a list of operands with this format:
479 // ConstantSDNode: Flags that encode whether it is a mem or not, the
480 // of operands that follow, etc. See InlineAsm.h.
481 // ... however many operands ...
482 // Operand #last: Optional, an incoming flag.
484 // The variable width operands are required to represent target addressing
485 // modes as a single "operand", even though they may have multiple
489 // EH_LABEL - Represents a label in mid basic block used to track
490 // locations needed for debug and exception handling tables. These nodes
491 // take a chain as input and return a chain.
494 // STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
495 // value, the same type as the pointer type for the system, and an output
499 // STACKRESTORE has two operands, an input chain and a pointer to restore to
500 // it returns an output chain.
503 // CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of
504 // a call sequence, and carry arbitrary information that target might want
505 // to know. The first operand is a chain, the rest are specified by the
506 // target and not touched by the DAG optimizers.
507 // CALLSEQ_START..CALLSEQ_END pairs may not be nested.
508 CALLSEQ_START, // Beginning of a call sequence
509 CALLSEQ_END, // End of a call sequence
511 // VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE,
512 // and the alignment. It returns a pair of values: the vaarg value and a
516 // VACOPY - VACOPY has five operands: an input chain, a destination pointer,
517 // a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
521 // VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a
522 // pointer, and a SRCVALUE.
525 // SRCVALUE - This is a node type that holds a Value* that is used to
526 // make reference to a value in the LLVM IR.
529 // MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
530 // reference metadata in the IR.
533 // PCMARKER - This corresponds to the pcmarker intrinsic.
536 // READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
537 // The only operand is a chain and a value and a chain are produced. The
538 // value is the contents of the architecture specific cycle counter like
539 // register (or other high accuracy low latency clock source)
542 // HANDLENODE node - Used as a handle for various purposes.
545 // TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
546 // It takes as input a token chain, the pointer to the trampoline,
547 // the pointer to the nested function, the pointer to pass for the
548 // 'nest' parameter, a SRCVALUE for the trampoline and another for
549 // the nested function (allowing targets to access the original
550 // Function*). It produces the result of the intrinsic and a token
554 // TRAP - Trapping instruction
557 // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are
558 // their first operand. The other operands are the address to prefetch,
559 // read / write specifier, and locality specifier.
562 // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load,
563 // store-store, device)
564 // This corresponds to the memory.barrier intrinsic.
565 // it takes an input chain, 4 operands to specify the type of barrier, an
566 // operand specifying if the barrier applies to device and uncached memory
567 // and produces an output chain.
570 // Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
571 // this corresponds to the atomic.lcs intrinsic.
572 // cmp is compared to *ptr, and if equal, swap is stored in *ptr.
573 // the return is always the original value in *ptr
576 // Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
577 // this corresponds to the atomic.swap intrinsic.
578 // amt is stored to *ptr atomically.
579 // the return is always the original value in *ptr
582 // Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
583 // this corresponds to the atomic.load.[OpName] intrinsic.
584 // op(*ptr, amt) is stored to *ptr atomically.
585 // the return is always the original value in *ptr
597 /// BUILTIN_OP_END - This must be the last enum value in this list.
598 /// The target-specific pre-isel opcode values start here.
602 /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
603 /// which do not reference a specific memory location should be less than
604 /// this value. Those that do must not be less than this value, and can
605 /// be used with SelectionDAG::getMemIntrinsicNode.
606 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+150;
608 //===--------------------------------------------------------------------===//
609 /// MemIndexedMode enum - This enum defines the load / store indexed
610 /// addressing modes.
612 /// UNINDEXED "Normal" load / store. The effective address is already
613 /// computed and is available in the base pointer. The offset
614 /// operand is always undefined. In addition to producing a
615 /// chain, an unindexed load produces one value (result of the
616 /// load); an unindexed store does not produce a value.
618 /// PRE_INC Similar to the unindexed mode where the effective address is
619 /// PRE_DEC the value of the base pointer add / subtract the offset.
620 /// It considers the computation as being folded into the load /
621 /// store operation (i.e. the load / store does the address
622 /// computation as well as performing the memory transaction).
623 /// The base operand is always undefined. In addition to
624 /// producing a chain, pre-indexed load produces two values
625 /// (result of the load and the result of the address
626 /// computation); a pre-indexed store produces one value (result
627 /// of the address computation).
629 /// POST_INC The effective address is the value of the base pointer. The
630 /// POST_DEC value of the offset operand is then added to / subtracted
631 /// from the base after memory transaction. In addition to
632 /// producing a chain, post-indexed load produces two values
633 /// (the result of the load and the result of the base +/- offset
634 /// computation); a post-indexed store produces one value (the
635 /// the result of the base +/- offset computation).
636 enum MemIndexedMode {
645 //===--------------------------------------------------------------------===//
646 /// LoadExtType enum - This enum defines the three variants of LOADEXT
647 /// (load with extension).
649 /// SEXTLOAD loads the integer operand and sign extends it to a larger
650 /// integer result type.
651 /// ZEXTLOAD loads the integer operand and zero extends it to a larger
652 /// integer result type.
653 /// EXTLOAD is used for two things: floating point extending loads and
654 /// integer extending loads [the top bits are undefined].
663 //===--------------------------------------------------------------------===//
664 /// ISD::CondCode enum - These are ordered carefully to make the bitfields
665 /// below work out, when considering SETFALSE (something that never exists
666 /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered
667 /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
668 /// to. If the "N" column is 1, the result of the comparison is undefined if
669 /// the input is a NAN.
671 /// All of these (except for the 'always folded ops') should be handled for
672 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
673 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
675 /// Note that these are laid out in a specific order to allow bit-twiddling
676 /// to transform conditions.
678 // Opcode N U L G E Intuitive operation
679 SETFALSE, // 0 0 0 0 Always false (always folded)
680 SETOEQ, // 0 0 0 1 True if ordered and equal
681 SETOGT, // 0 0 1 0 True if ordered and greater than
682 SETOGE, // 0 0 1 1 True if ordered and greater than or equal
683 SETOLT, // 0 1 0 0 True if ordered and less than
684 SETOLE, // 0 1 0 1 True if ordered and less than or equal
685 SETONE, // 0 1 1 0 True if ordered and operands are unequal
686 SETO, // 0 1 1 1 True if ordered (no nans)
687 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
688 SETUEQ, // 1 0 0 1 True if unordered or equal
689 SETUGT, // 1 0 1 0 True if unordered or greater than
690 SETUGE, // 1 0 1 1 True if unordered, greater than, or equal
691 SETULT, // 1 1 0 0 True if unordered or less than
692 SETULE, // 1 1 0 1 True if unordered, less than, or equal
693 SETUNE, // 1 1 1 0 True if unordered or not equal
694 SETTRUE, // 1 1 1 1 Always true (always folded)
695 // Don't care operations: undefined if the input is a nan.
696 SETFALSE2, // 1 X 0 0 0 Always false (always folded)
697 SETEQ, // 1 X 0 0 1 True if equal
698 SETGT, // 1 X 0 1 0 True if greater than
699 SETGE, // 1 X 0 1 1 True if greater than or equal
700 SETLT, // 1 X 1 0 0 True if less than
701 SETLE, // 1 X 1 0 1 True if less than or equal
702 SETNE, // 1 X 1 1 0 True if not equal
703 SETTRUE2, // 1 X 1 1 1 Always true (always folded)
705 SETCC_INVALID // Marker value.
708 /// isSignedIntSetCC - Return true if this is a setcc instruction that
709 /// performs a signed comparison when used with integer operands.
710 inline bool isSignedIntSetCC(CondCode Code) {
711 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
714 /// isUnsignedIntSetCC - Return true if this is a setcc instruction that
715 /// performs an unsigned comparison when used with integer operands.
716 inline bool isUnsignedIntSetCC(CondCode Code) {
717 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
720 /// isTrueWhenEqual - Return true if the specified condition returns true if
721 /// the two operands to the condition are equal. Note that if one of the two
722 /// operands is a NaN, this value is meaningless.
723 inline bool isTrueWhenEqual(CondCode Cond) {
724 return ((int)Cond & 1) != 0;
727 /// getUnorderedFlavor - This function returns 0 if the condition is always
728 /// false if an operand is a NaN, 1 if the condition is always true if the
729 /// operand is a NaN, and 2 if the condition is undefined if the operand is a
731 inline unsigned getUnorderedFlavor(CondCode Cond) {
732 return ((int)Cond >> 3) & 3;
735 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
736 /// 'op' is a valid SetCC operation.
737 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
739 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
740 /// when given the operation for (X op Y).
741 CondCode getSetCCSwappedOperands(CondCode Operation);
743 /// getSetCCOrOperation - Return the result of a logical OR between different
744 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This
745 /// function returns SETCC_INVALID if it is not possible to represent the
746 /// resultant comparison.
747 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
749 /// getSetCCAndOperation - Return the result of a logical AND between
750 /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
751 /// function returns SETCC_INVALID if it is not possible to represent the
752 /// resultant comparison.
753 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
755 //===--------------------------------------------------------------------===//
756 /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
759 CVT_FF, // Float from Float
760 CVT_FS, // Float from Signed
761 CVT_FU, // Float from Unsigned
762 CVT_SF, // Signed from Float
763 CVT_UF, // Unsigned from Float
764 CVT_SS, // Signed from Signed
765 CVT_SU, // Signed from Unsigned
766 CVT_US, // Unsigned from Signed
767 CVT_UU, // Unsigned from Unsigned
768 CVT_INVALID // Marker - Invalid opcode
771 } // end llvm::ISD namespace
773 } // end llvm namespace