1 //===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares codegen opcodes and related utilities.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_ISDOPCODES_H
15 #define LLVM_CODEGEN_ISDOPCODES_H
19 /// ISD namespace - This namespace contains an enum which represents all of the
20 /// SelectionDAG node types and value types.
24 //===--------------------------------------------------------------------===//
25 /// ISD::NodeType enum - This enum defines the target-independent operators
26 /// for a SelectionDAG.
28 /// Targets may also define target-dependent operator codes for SDNodes. For
29 /// example, on x86, these are the enum values in the X86ISD namespace.
30 /// Targets should aim to use target-independent operators to model their
31 /// instruction sets as much as possible, and only use target-dependent
32 /// operators when they have special requirements.
34 /// Finally, during and after selection proper, SNodes may use special
35 /// operator codes that correspond directly with MachineInstr opcodes. These
36 /// are used to represent selected instructions. See the isMachineOpcode()
37 /// and getMachineOpcode() member functions of SDNode.
40 // DELETED_NODE - This is an illegal value that is used to catch
41 // errors. This opcode is not a legal opcode for any node.
44 // EntryToken - This is the marker used to indicate the start of the region.
47 // TokenFactor - This node takes multiple tokens as input and produces a
48 // single token result. This is used to represent the fact that the operand
49 // operators are independent of each other.
52 // AssertSext, AssertZext - These nodes record if a register contains a
53 // value that has already been zero or sign extended from a narrower type.
54 // These nodes take two operands. The first is the node that has already
55 // been extended, and the second is a value type node indicating the width
57 AssertSext, AssertZext,
59 // Various leaf nodes.
60 BasicBlock, VALUETYPE, CONDCODE, Register,
62 GlobalAddress, GlobalTLSAddress, FrameIndex,
63 JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
65 // The address of the GOT
68 // FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
69 // llvm.returnaddress on the DAG. These nodes take one operand, the index
70 // of the frame or return address to return. An index of zero corresponds
71 // to the current function's frame or return address, an index of one to the
72 // parent's frame or return address, and so on.
73 FRAMEADDR, RETURNADDR,
75 // FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
76 // first (possible) on-stack argument. This is needed for correct stack
77 // adjustment during unwind.
80 // RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the
81 // address of the exception block on entry to an landing pad block.
84 // RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the
85 // address of the Language Specific Data Area for the enclosing function.
88 // RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node represents
89 // the selection index of the exception thrown.
92 // OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
93 // 'eh_return' gcc dwarf builtin, which is used to return from
94 // exception. The general meaning is: adjust stack by OFFSET and pass
95 // execution to HANDLER. Many platform-related details also :)
99 // OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
100 // This corresponds to the eh.sjlj.longjmp intrinsic.
101 // It takes an input chain and a pointer to the jump buffer as inputs
102 // and returns an outchain.
105 // TargetConstant* - Like Constant*, but the DAG does not do any folding,
106 // simplification, or lowering of the constant. They are used for constants
107 // which are known to fit in the immediate fields of their users, or for
108 // carrying magic numbers which are not values which need to be materialized
113 // TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
114 // anything else with this node, and this is valid in the target-specific
115 // dag, turning into a GlobalAddress operand.
117 TargetGlobalTLSAddress,
121 TargetExternalSymbol,
124 /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
125 /// This node represents a target intrinsic function with no side effects.
126 /// The first operand is the ID number of the intrinsic from the
127 /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The
128 /// node has returns the result of the intrinsic.
131 /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
132 /// This node represents a target intrinsic function with side effects that
133 /// returns a result. The first operand is a chain pointer. The second is
134 /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The
135 /// operands to the intrinsic follow. The node has two results, the result
136 /// of the intrinsic and an output chain.
139 /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
140 /// This node represents a target intrinsic function with side effects that
141 /// does not return a result. The first operand is a chain pointer. The
142 /// second is the ID number of the intrinsic from the llvm::Intrinsic
143 /// namespace. The operands to the intrinsic follow.
146 // CopyToReg - This node has three operands: a chain, a register number to
147 // set to this value, and a value.
150 // CopyFromReg - This node indicates that the input value is a virtual or
151 // physical register that is defined outside of the scope of this
152 // SelectionDAG. The register is available from the RegisterSDNode object.
155 // UNDEF - An undefined node
158 // EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
159 // a Constant, which is required to be operand #1) half of the integer or
160 // float value specified as operand #0. This is only for use before
161 // legalization, for values that will be broken into multiple registers.
164 // BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. Given
165 // two values of the same integer value type, this produces a value twice as
166 // big. Like EXTRACT_ELEMENT, this can only be used before legalization.
169 // MERGE_VALUES - This node takes multiple discrete operands and returns
170 // them all as its individual results. This nodes has exactly the same
171 // number of inputs and outputs. This node is useful for some pieces of the
172 // code generator that want to think about a single node with multiple
173 // results, not multiple nodes.
176 // Simple integer binary arithmetic operators.
177 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
179 // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
180 // a signed/unsigned value of type i[2*N], and return the full value as
181 // two results, each of type iN.
182 SMUL_LOHI, UMUL_LOHI,
184 // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
188 // CARRY_FALSE - This node is used when folding other nodes,
189 // like ADDC/SUBC, which indicate the carry result is always false.
192 // Carry-setting nodes for multiple precision addition and subtraction.
193 // These nodes take two operands of the same value type, and produce two
194 // results. The first result is the normal add or sub result, the second
195 // result is the carry flag result.
198 // Carry-using nodes for multiple precision addition and subtraction. These
199 // nodes take three operands: The first two are the normal lhs and rhs to
200 // the add or sub, and the third is the input carry flag. These nodes
201 // produce two results; the normal result of the add or sub, and the output
202 // carry flag. These nodes both read and write a carry flag to allow them
203 // to them to be chained together for add and sub of arbitrarily large
207 // RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
208 // These nodes take two operands: the normal LHS and RHS to the add. They
209 // produce two results: the normal result of the add, and a boolean that
210 // indicates if an overflow occured (*not* a flag, because it may be stored
211 // to memory, etc.). If the type of the boolean is not i1 then the high
212 // bits conform to getBooleanContents.
213 // These nodes are generated from the llvm.[su]add.with.overflow intrinsics.
216 // Same for subtraction
219 // Same for multiplication
222 // Simple binary floating point operators.
223 FADD, FSUB, FMUL, FDIV, FREM,
225 // FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
226 // DAG node does not require that X and Y have the same type, just that they
227 // are both floating point. X and the result must have the same type.
228 // FCOPYSIGN(f32, f64) is allowed.
231 // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
232 // value as an integer 0/1 value.
235 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
236 /// specified, possibly variable, elements. The number of elements is
237 /// required to be a power of two. The types of the operands must all be
238 /// the same and must match the vector element type, except that integer
239 /// types are allowed to be larger than the element type, in which case
240 /// the operands are implicitly truncated.
243 /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
244 /// at IDX replaced with VAL. If the type of VAL is larger than the vector
245 /// element type then VAL is truncated before replacement.
248 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
249 /// identified by the (potentially variable) element number IDX. If the
250 /// return type is an integer type larger than the element type of the
251 /// vector, the result is extended to the width of the return type.
254 /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
255 /// vector type with the same length and element type, this produces a
256 /// concatenated vector result value, with length equal to the sum of the
257 /// lengths of the input vectors.
260 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
261 /// vector value) starting with the (potentially variable) element number
262 /// IDX, which must be a multiple of the result vector length.
265 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
266 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
267 /// values that indicate which value (or undef) each result element will
268 /// get. These constant ints are accessible through the
269 /// ShuffleVectorSDNode class. This is quite similar to the Altivec
270 /// 'vperm' instruction, except that the indices must be constants and are
271 /// in terms of the element size of VEC1/VEC2, not in terms of bytes.
274 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
275 /// scalar value into element 0 of the resultant vector type. The top
276 /// elements 1 to N-1 of the N-element vector are undefined. The type
277 /// of the operand must match the vector element type, except when they
278 /// are integer types. In this case the operand is allowed to be wider
279 /// than the vector element type, and is implicitly truncated to it.
282 // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing
283 // an unsigned/signed value of type i[2*N], then return the top part.
286 // Bitwise operators - logical and, logical or, logical xor, shift left,
287 // shift right algebraic (shift in sign bits), shift right logical (shift in
288 // zeroes), rotate left, rotate right, and byteswap.
289 AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP,
291 // Counting operators
294 // Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
295 // i1 then the high bits must conform to getBooleanContents.
298 // Select with condition operator - This selects between a true value and
299 // a false value (ops #2 and #3) based on the boolean result of comparing
300 // the lhs and rhs (ops #0 and #1) of a conditional expression with the
301 // condition code in op #4, a CondCodeSDNode.
304 // SetCC operator - This evaluates to a true value iff the condition is
305 // true. If the result value type is not i1 then the high bits conform
306 // to getBooleanContents. The operands to this are the left and right
307 // operands to compare (ops #0, and #1) and the condition code to compare
308 // them with (op #2) as a CondCodeSDNode.
311 // RESULT = VSETCC(LHS, RHS, COND) operator - This evaluates to a vector of
312 // integer elements with all bits of the result elements set to true if the
313 // comparison is true or all cleared if the comparison is false. The
314 // operands to this are the left and right operands to compare (LHS/RHS) and
315 // the condition code to compare them with (COND) as a CondCodeSDNode.
318 // SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
319 // integer shift operations, just like ADD/SUB_PARTS. The operation
321 // [Lo,Hi] = op [LoLHS,HiLHS], Amt
322 SHL_PARTS, SRA_PARTS, SRL_PARTS,
324 // Conversion operators. These are all single input single output
325 // operations. For all of these, the result type must be strictly
326 // wider or narrower (depending on the operation) than the source
329 // SIGN_EXTEND - Used for integer types, replicating the sign bit
333 // ZERO_EXTEND - Used for integer types, zeroing the new bits.
336 // ANY_EXTEND - Used for integer types. The high bits are undefined.
339 // TRUNCATE - Completely drop the high bits.
342 // [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
343 // depends on the first letter) to floating point.
347 // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
348 // sign extend a small value in a large integer register (e.g. sign
349 // extending the low 8 bits of a 32-bit register to fill the top 24 bits
350 // with the 7th bit). The size of the smaller type is indicated by the 1th
351 // operand, a ValueType node.
354 /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
359 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
360 /// down to the precision of the destination VT. TRUNC is a flag, which is
361 /// always an integer that is zero or one. If TRUNC is 0, this is a
362 /// normal rounding, if it is 1, this FP_ROUND is known to not change the
365 /// The TRUNC = 1 case is used in cases where we know that the value will
366 /// not be modified by the node, because Y is not using any of the extra
367 /// precision of source type. This allows certain transformations like
368 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
369 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
372 // FLT_ROUNDS_ - Returns current rounding mode:
375 // 1 Round to nearest
380 /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
381 /// rounds it to a floating point value. It then promotes it and returns it
382 /// in a register of the same size. This operation effectively just
383 /// discards excess precision. The type to round down to is specified by
384 /// the VT operand, a VTSDNode.
387 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
390 // BIT_CONVERT - This operator converts between integer, vector and FP
391 // values, as if the value was stored to memory with one type and loaded
392 // from the same address with the other type (or equivalently for vector
393 // format conversions, etc). The source and result are required to have
394 // the same bit size (e.g. f32 <-> i32). This can also be used for
395 // int-to-int or fp-to-fp conversions, but that is a noop, deleted by
399 // CONVERT_RNDSAT - This operator is used to support various conversions
400 // between various types (float, signed, unsigned and vectors of those
401 // types) with rounding and saturation. NOTE: Avoid using this operator as
402 // most target don't support it and the operator might be removed in the
403 // future. It takes the following arguments:
405 // 1) dest type (type to convert to)
406 // 2) src type (type to convert from)
409 // 5) ISD::CvtCode indicating the type of conversion to do
412 // FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform
413 // promotions and truncation for half-precision (16 bit) floating
414 // numbers. We need special nodes since FP16 is a storage-only type with
415 // special semantics of operations.
416 FP16_TO_FP32, FP32_TO_FP16,
418 // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
419 // FLOG, FLOG2, FLOG10, FEXP, FEXP2,
420 // FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating
421 // point operations. These are inspired by libm.
422 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
423 FLOG, FLOG2, FLOG10, FEXP, FEXP2,
424 FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR,
426 // LOAD and STORE have token chains as their first operand, then the same
427 // operands as an LLVM load/store instruction, then an offset node that
428 // is added / subtracted from the base pointer to form the address (for
429 // indexed memory ops).
432 // DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
433 // to a specified boundary. This node always has two return values: a new
434 // stack pointer value and a chain. The first operand is the token chain,
435 // the second is the number of bytes to allocate, and the third is the
436 // alignment boundary. The size is guaranteed to be a multiple of the stack
437 // alignment, and the alignment is guaranteed to be bigger than the stack
438 // alignment (if required) or 0 to get standard stack alignment.
441 // Control flow instructions. These all have token chains.
443 // BR - Unconditional branch. The first operand is the chain
444 // operand, the second is the MBB to branch to.
447 // BRIND - Indirect branch. The first operand is the chain, the second
448 // is the value to branch to, which must be of the same type as the target's
452 // BR_JT - Jumptable branch. The first operand is the chain, the second
453 // is the jumptable index, the last one is the jumptable entry index.
456 // BRCOND - Conditional branch. The first operand is the chain, the
457 // second is the condition, the third is the block to branch to if the
458 // condition is true. If the type of the condition is not i1, then the
459 // high bits must conform to getBooleanContents.
462 // BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
463 // that the condition is represented as condition code, and two nodes to
464 // compare, rather than as a combined SetCC node. The operands in order are
465 // chain, cc, lhs, rhs, block to branch to if condition is true.
468 // INLINEASM - Represents an inline asm block. This node always has two
469 // return values: a chain and a flag result. The inputs are as follows:
470 // Operand #0 : Input chain.
471 // Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.
472 // Operand #2 : a MDNodeSDNode with the !srcloc metadata.
473 // After this, it is followed by a list of operands with this format:
474 // ConstantSDNode: Flags that encode whether it is a mem or not, the
475 // of operands that follow, etc. See InlineAsm.h.
476 // ... however many operands ...
477 // Operand #last: Optional, an incoming flag.
479 // The variable width operands are required to represent target addressing
480 // modes as a single "operand", even though they may have multiple
484 // EH_LABEL - Represents a label in mid basic block used to track
485 // locations needed for debug and exception handling tables. These nodes
486 // take a chain as input and return a chain.
489 // STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
490 // value, the same type as the pointer type for the system, and an output
494 // STACKRESTORE has two operands, an input chain and a pointer to restore to
495 // it returns an output chain.
498 // CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of
499 // a call sequence, and carry arbitrary information that target might want
500 // to know. The first operand is a chain, the rest are specified by the
501 // target and not touched by the DAG optimizers.
502 // CALLSEQ_START..CALLSEQ_END pairs may not be nested.
503 CALLSEQ_START, // Beginning of a call sequence
504 CALLSEQ_END, // End of a call sequence
506 // VAARG - VAARG has three operands: an input chain, a pointer, and a
507 // SRCVALUE. It returns a pair of values: the vaarg value and a new chain.
510 // VACOPY - VACOPY has five operands: an input chain, a destination pointer,
511 // a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
515 // VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a
516 // pointer, and a SRCVALUE.
519 // SRCVALUE - This is a node type that holds a Value* that is used to
520 // make reference to a value in the LLVM IR.
523 // MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
524 // reference metadata in the IR.
527 // PCMARKER - This corresponds to the pcmarker intrinsic.
530 // READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
531 // The only operand is a chain and a value and a chain are produced. The
532 // value is the contents of the architecture specific cycle counter like
533 // register (or other high accuracy low latency clock source)
536 // HANDLENODE node - Used as a handle for various purposes.
539 // TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
540 // It takes as input a token chain, the pointer to the trampoline,
541 // the pointer to the nested function, the pointer to pass for the
542 // 'nest' parameter, a SRCVALUE for the trampoline and another for
543 // the nested function (allowing targets to access the original
544 // Function*). It produces the result of the intrinsic and a token
548 // TRAP - Trapping instruction
551 // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are
552 // their first operand. The other operands are the address to prefetch,
553 // read / write specifier, and locality specifier.
556 // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load,
557 // store-store, device)
558 // This corresponds to the memory.barrier intrinsic.
559 // it takes an input chain, 4 operands to specify the type of barrier, an
560 // operand specifying if the barrier applies to device and uncached memory
561 // and produces an output chain.
564 // Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
565 // this corresponds to the atomic.lcs intrinsic.
566 // cmp is compared to *ptr, and if equal, swap is stored in *ptr.
567 // the return is always the original value in *ptr
570 // Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
571 // this corresponds to the atomic.swap intrinsic.
572 // amt is stored to *ptr atomically.
573 // the return is always the original value in *ptr
576 // Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
577 // this corresponds to the atomic.load.[OpName] intrinsic.
578 // op(*ptr, amt) is stored to *ptr atomically.
579 // the return is always the original value in *ptr
591 /// BUILTIN_OP_END - This must be the last enum value in this list.
592 /// The target-specific pre-isel opcode values start here.
596 /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
597 /// which do not reference a specific memory location should be less than
598 /// this value. Those that do must not be less than this value, and can
599 /// be used with SelectionDAG::getMemIntrinsicNode.
600 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+100;
602 //===--------------------------------------------------------------------===//
603 /// MemIndexedMode enum - This enum defines the load / store indexed
604 /// addressing modes.
606 /// UNINDEXED "Normal" load / store. The effective address is already
607 /// computed and is available in the base pointer. The offset
608 /// operand is always undefined. In addition to producing a
609 /// chain, an unindexed load produces one value (result of the
610 /// load); an unindexed store does not produce a value.
612 /// PRE_INC Similar to the unindexed mode where the effective address is
613 /// PRE_DEC the value of the base pointer add / subtract the offset.
614 /// It considers the computation as being folded into the load /
615 /// store operation (i.e. the load / store does the address
616 /// computation as well as performing the memory transaction).
617 /// The base operand is always undefined. In addition to
618 /// producing a chain, pre-indexed load produces two values
619 /// (result of the load and the result of the address
620 /// computation); a pre-indexed store produces one value (result
621 /// of the address computation).
623 /// POST_INC The effective address is the value of the base pointer. The
624 /// POST_DEC value of the offset operand is then added to / subtracted
625 /// from the base after memory transaction. In addition to
626 /// producing a chain, post-indexed load produces two values
627 /// (the result of the load and the result of the base +/- offset
628 /// computation); a post-indexed store produces one value (the
629 /// the result of the base +/- offset computation).
631 enum MemIndexedMode {
640 //===--------------------------------------------------------------------===//
641 /// LoadExtType enum - This enum defines the three variants of LOADEXT
642 /// (load with extension).
644 /// SEXTLOAD loads the integer operand and sign extends it to a larger
645 /// integer result type.
646 /// ZEXTLOAD loads the integer operand and zero extends it to a larger
647 /// integer result type.
648 /// EXTLOAD is used for three things: floating point extending loads,
649 /// integer extending loads [the top bits are undefined], and vector
650 /// extending loads [load into low elt].
660 //===--------------------------------------------------------------------===//
661 /// ISD::CondCode enum - These are ordered carefully to make the bitfields
662 /// below work out, when considering SETFALSE (something that never exists
663 /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered
664 /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
665 /// to. If the "N" column is 1, the result of the comparison is undefined if
666 /// the input is a NAN.
668 /// All of these (except for the 'always folded ops') should be handled for
669 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
670 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
672 /// Note that these are laid out in a specific order to allow bit-twiddling
673 /// to transform conditions.
675 // Opcode N U L G E Intuitive operation
676 SETFALSE, // 0 0 0 0 Always false (always folded)
677 SETOEQ, // 0 0 0 1 True if ordered and equal
678 SETOGT, // 0 0 1 0 True if ordered and greater than
679 SETOGE, // 0 0 1 1 True if ordered and greater than or equal
680 SETOLT, // 0 1 0 0 True if ordered and less than
681 SETOLE, // 0 1 0 1 True if ordered and less than or equal
682 SETONE, // 0 1 1 0 True if ordered and operands are unequal
683 SETO, // 0 1 1 1 True if ordered (no nans)
684 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
685 SETUEQ, // 1 0 0 1 True if unordered or equal
686 SETUGT, // 1 0 1 0 True if unordered or greater than
687 SETUGE, // 1 0 1 1 True if unordered, greater than, or equal
688 SETULT, // 1 1 0 0 True if unordered or less than
689 SETULE, // 1 1 0 1 True if unordered, less than, or equal
690 SETUNE, // 1 1 1 0 True if unordered or not equal
691 SETTRUE, // 1 1 1 1 Always true (always folded)
692 // Don't care operations: undefined if the input is a nan.
693 SETFALSE2, // 1 X 0 0 0 Always false (always folded)
694 SETEQ, // 1 X 0 0 1 True if equal
695 SETGT, // 1 X 0 1 0 True if greater than
696 SETGE, // 1 X 0 1 1 True if greater than or equal
697 SETLT, // 1 X 1 0 0 True if less than
698 SETLE, // 1 X 1 0 1 True if less than or equal
699 SETNE, // 1 X 1 1 0 True if not equal
700 SETTRUE2, // 1 X 1 1 1 Always true (always folded)
702 SETCC_INVALID // Marker value.
705 /// isSignedIntSetCC - Return true if this is a setcc instruction that
706 /// performs a signed comparison when used with integer operands.
707 inline bool isSignedIntSetCC(CondCode Code) {
708 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
711 /// isUnsignedIntSetCC - Return true if this is a setcc instruction that
712 /// performs an unsigned comparison when used with integer operands.
713 inline bool isUnsignedIntSetCC(CondCode Code) {
714 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
717 /// isTrueWhenEqual - Return true if the specified condition returns true if
718 /// the two operands to the condition are equal. Note that if one of the two
719 /// operands is a NaN, this value is meaningless.
720 inline bool isTrueWhenEqual(CondCode Cond) {
721 return ((int)Cond & 1) != 0;
724 /// getUnorderedFlavor - This function returns 0 if the condition is always
725 /// false if an operand is a NaN, 1 if the condition is always true if the
726 /// operand is a NaN, and 2 if the condition is undefined if the operand is a
728 inline unsigned getUnorderedFlavor(CondCode Cond) {
729 return ((int)Cond >> 3) & 3;
732 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
733 /// 'op' is a valid SetCC operation.
734 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
736 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
737 /// when given the operation for (X op Y).
738 CondCode getSetCCSwappedOperands(CondCode Operation);
740 /// getSetCCOrOperation - Return the result of a logical OR between different
741 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This
742 /// function returns SETCC_INVALID if it is not possible to represent the
743 /// resultant comparison.
744 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
746 /// getSetCCAndOperation - Return the result of a logical AND between
747 /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
748 /// function returns SETCC_INVALID if it is not possible to represent the
749 /// resultant comparison.
750 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
752 //===--------------------------------------------------------------------===//
753 /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
756 CVT_FF, // Float from Float
757 CVT_FS, // Float from Signed
758 CVT_FU, // Float from Unsigned
759 CVT_SF, // Signed from Float
760 CVT_UF, // Unsigned from Float
761 CVT_SS, // Signed from Signed
762 CVT_SU, // Signed from Unsigned
763 CVT_US, // Unsigned from Signed
764 CVT_UU, // Unsigned from Unsigned
765 CVT_INVALID // Marker - Invalid opcode
768 } // end llvm::ISD namespace
770 } // end llvm namespace