2 //***************************************************************************
4 // InstrSelectionSupport.h
7 // Target-independent instruction selection code.
8 // See SparcInstrSelection.cpp for usage.
11 // 10/10/01 - Vikram Adve - Created
12 //**************************************************************************/
14 #ifndef LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
15 #define LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
17 #include "llvm/Instruction.h"
18 #include "llvm/CodeGen/MachineInstr.h"
22 class InstructionNode;
27 //************************ Exported Functions ******************************/
30 //---------------------------------------------------------------------------
31 // Function: FoldGetElemChain
34 // Fold a chain of GetElementPtr instructions into an equivalent
35 // (Pointer, IndexVector) pair. Returns the pointer Value, and
36 // stores the resulting IndexVector in argument chainIdxVec.
37 //---------------------------------------------------------------------------
39 Value* FoldGetElemChain (const InstructionNode* getElemInstrNode,
40 vector<ConstPoolVal*>& chainIdxVec);
43 //------------------------------------------------------------------------
44 // Function Set2OperandsFromInstr
45 // Function Set3OperandsFromInstr
49 // For the common case of 2- and 3-operand arithmetic/logical instructions,
50 // set the m/c instr. operands directly from the VM instruction's operands.
51 // Check whether the first or second operand is 0 and can use a dedicated
53 // Check whether the second operand should use an immediate field or register.
54 // (First and third operands are never immediates for such instructions.)
57 // canDiscardResult: Specifies that the result operand can be discarded
58 // by using the dedicated "0"
60 // op1position, op2position and resultPosition: Specify in which position
61 // in the machine instruction the 3 operands (arg1, arg2
62 // and result) should go.
64 // RETURN VALUE: unsigned int flags, where
65 // flags & 0x01 => operand 1 is constant and needs a register
66 // flags & 0x02 => operand 2 is constant and needs a register
67 //------------------------------------------------------------------------
69 void Set2OperandsFromInstr (MachineInstr* minstr,
70 InstructionNode* vmInstrNode,
71 const TargetMachine& targetMachine,
72 bool canDiscardResult = false,
74 int resultPosition = 1);
76 void Set3OperandsFromInstr (MachineInstr* minstr,
77 InstructionNode* vmInstrNode,
78 const TargetMachine& targetMachine,
79 bool canDiscardResult = false,
82 int resultPosition = 2);
85 //---------------------------------------------------------------------------
86 // Function: ChooseRegOrImmed
90 //---------------------------------------------------------------------------
92 MachineOperand::MachineOperandType
93 ChooseRegOrImmed (Value* val,
95 const TargetMachine& targetMachine,
97 unsigned int& getMachineRegNum,
98 int64_t& getImmedValue);
100 //**************************************************************************/