include/llvm/CodeGen/InstrSelectionSupport.h

   1 // $Id$ -*-c++-*-
   2 //***************************************************************************
   3 // File:
   4 //      InstrSelectionSupport.h
   5 //
   6 // Purpose:
   7 //      Target-independent instruction selection code.
   8 //      See SparcInstrSelection.cpp for usage.
   9 //
  10 // History:
  11 //      10/10/01         -  Vikram Adve  -  Created
  12 //**************************************************************************/
  13
  14 #ifndef LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
  15 #define LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
  16
  17 #include "llvm/Instruction.h"
  18 #include "llvm/CodeGen/MachineInstr.h"
  19 class Method;
  20 class InstrForest;
  21 class MachineInstr;
  22 class InstructionNode;
  23 class TmpInstruction;
  24 class ConstPoolVal;
  25 class TargetMachine;
  26
  27 //************************ Exported Functions ******************************/
  28
  29
  30 //---------------------------------------------------------------------------
  31 // Function: FoldGetElemChain
  32 //
  33 // Purpose:
  34 //   Fold a chain of GetElementPtr instructions into an equivalent
  35 //   (Pointer, IndexVector) pair.  Returns the pointer Value, and
  36 //   stores the resulting IndexVector in argument chainIdxVec.
  37 //---------------------------------------------------------------------------
  38
  39 Value*          FoldGetElemChain    (const InstructionNode* getElemInstrNode,
  40                                      vector<ConstPoolVal*>& chainIdxVec);
  41
  42
  43 //------------------------------------------------------------------------
  44 // Function Set2OperandsFromInstr
  45 // Function Set3OperandsFromInstr
  46 //
  47 // Purpose:
  48 //
  49 // For the common case of 2- and 3-operand arithmetic/logical instructions,
  50 // set the m/c instr. operands directly from the VM instruction's operands.
  51 // Check whether the first or second operand is 0 and can use a dedicated
  52 // "0" register.
  53 // Check whether the second operand should use an immediate field or register.
  54 // (First and third operands are never immediates for such instructions.)
  55 //
  56 // Arguments:
  57 // canDiscardResult: Specifies that the result operand can be discarded
  58 //                   by using the dedicated "0"
  59 //
  60 // op1position, op2position and resultPosition: Specify in which position
  61 //                   in the machine instruction the 3 operands (arg1, arg2
  62 //                   and result) should go.
  63 //
  64 // RETURN VALUE: unsigned int flags, where
  65 //      flags & 0x01    => operand 1 is constant and needs a register
  66 //      flags & 0x02    => operand 2 is constant and needs a register
  67 //------------------------------------------------------------------------
  68
  69 void            Set2OperandsFromInstr   (MachineInstr* minstr,
  70                                          InstructionNode* vmInstrNode,
  71                                          const TargetMachine& targetMachine,
  72                                          bool canDiscardResult = false,
  73                                          int op1Position = 0,
  74                                          int resultPosition = 1);
  75
  76 void            Set3OperandsFromInstr   (MachineInstr* minstr,
  77                                          InstructionNode* vmInstrNode,
  78                                          const TargetMachine& targetMachine,
  79                                          bool canDiscardResult = false,
  80                                          int op1Position = 0,
  81                                          int op2Position = 1,
  82                                          int resultPosition = 2);
  83
  84
  85 //---------------------------------------------------------------------------
  86 // Function: ChooseRegOrImmed
  87 //
  88 // Purpose:
  89 //
  90 //---------------------------------------------------------------------------
  91
  92 MachineOperand::MachineOperandType
  93                 ChooseRegOrImmed        (Value* val,
  94                                          MachineOpCode opCode,
  95                                          const TargetMachine& targetMachine,
  96                                          bool canUseImmed,
  97                                          unsigned int& getMachineRegNum,
  98                                          int64_t& getImmedValue);
  99
 100 //**************************************************************************/
 101
 102 #endif