1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/ADT/DenseMap.h"
24 #include "llvm/CodeGen/MachineFunctionPass.h"
25 #include "llvm/CodeGen/LiveInterval.h"
31 class TargetInstrInfo;
34 class LiveIntervals : public MachineFunctionPass {
36 const TargetMachine* tm_;
37 const MRegisterInfo* mri_;
38 const TargetInstrInfo* tii_;
41 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
44 typedef std::vector<MachineInstr*> Index2MiMap;
47 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
48 Reg2IntervalMap r2iMap_;
50 typedef DenseMap<unsigned> Reg2RegMap;
53 std::vector<bool> allocatableRegs_;
66 static unsigned getBaseIndex(unsigned index) {
67 return index - (index % InstrSlots::NUM);
69 static unsigned getBoundaryIndex(unsigned index) {
70 return getBaseIndex(index + InstrSlots::NUM - 1);
72 static unsigned getLoadIndex(unsigned index) {
73 return getBaseIndex(index) + InstrSlots::LOAD;
75 static unsigned getUseIndex(unsigned index) {
76 return getBaseIndex(index) + InstrSlots::USE;
78 static unsigned getDefIndex(unsigned index) {
79 return getBaseIndex(index) + InstrSlots::DEF;
81 static unsigned getStoreIndex(unsigned index) {
82 return getBaseIndex(index) + InstrSlots::STORE;
85 typedef Reg2IntervalMap::iterator iterator;
86 typedef Reg2IntervalMap::const_iterator const_iterator;
87 const_iterator begin() const { return r2iMap_.begin(); }
88 const_iterator end() const { return r2iMap_.end(); }
89 iterator begin() { return r2iMap_.begin(); }
90 iterator end() { return r2iMap_.end(); }
91 unsigned getNumIntervals() const { return r2iMap_.size(); }
93 LiveInterval &getInterval(unsigned reg) {
94 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
95 assert(I != r2iMap_.end() && "Interval does not exist for register");
99 const LiveInterval &getInterval(unsigned reg) const {
100 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
101 assert(I != r2iMap_.end() && "Interval does not exist for register");
105 /// getInstructionIndex - returns the base index of instr
106 unsigned getInstructionIndex(MachineInstr* instr) const {
107 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
108 assert(it != mi2iMap_.end() && "Invalid instruction!");
112 /// getInstructionFromIndex - given an index in any slot of an
113 /// instruction return a pointer the instruction
114 MachineInstr* getInstructionFromIndex(unsigned index) const {
115 index /= InstrSlots::NUM; // convert index to vector index
116 assert(index < i2miMap_.size() &&
117 "index does not correspond to an instruction");
118 return i2miMap_[index];
121 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
125 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
126 virtual void releaseMemory();
128 /// runOnMachineFunction - pass entry point
129 virtual bool runOnMachineFunction(MachineFunction&);
131 /// print - Implement the dump method.
132 virtual void print(std::ostream &O, const Module* = 0) const;
135 /// RemoveMachineInstrFromMaps - This marks the specified machine instr as
137 void RemoveMachineInstrFromMaps(MachineInstr *MI) {
138 // remove index -> MachineInstr and
139 // MachineInstr -> index mappings
140 Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
141 if (mi2i != mi2iMap_.end()) {
142 i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
143 mi2iMap_.erase(mi2i);
147 /// computeIntervals - compute live intervals
148 void computeIntervals();
150 /// joinIntervals - join compatible live intervals
151 void joinIntervals();
153 /// CopyCoallesceInMBB - Coallsece copies in the specified MBB.
154 void CopyCoallesceInMBB(MachineBasicBlock *MBB);
156 /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
157 /// which are the src/dst of the copy instruction CopyMI. This returns true
158 /// if the copy was successfully coallesced away, or if it is never possible
159 /// to coallesce these this copy, due to register constraints. It returns
160 /// false if it is not currently possible to coallesce this interval, but
161 /// it may be possible if other things get coallesced.
162 bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg);
164 /// JoinIntervals - Attempt to join these two intervals. On failure, this
165 /// returns false. Otherwise, if one of the intervals being joined is a
166 /// physreg, this method always canonicalizes DestInt to be it. The output
167 /// "SrcInt" will not have been modified, so we can use this information
168 /// below to update aliases.
169 bool JoinIntervals(LiveInterval &LHS, LiveInterval &RHS);
171 /// handleRegisterDef - update intervals for a register def
172 /// (calls handlePhysicalRegisterDef and
173 /// handleVirtualRegisterDef)
174 void handleRegisterDef(MachineBasicBlock* mbb,
175 MachineBasicBlock::iterator mi,
178 /// handleVirtualRegisterDef - update intervals for a virtual
180 void handleVirtualRegisterDef(MachineBasicBlock* mbb,
181 MachineBasicBlock::iterator mi,
182 LiveInterval& interval);
184 /// handlePhysicalRegisterDef - update intervals for a physical register
186 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
187 MachineBasicBlock::iterator mi,
188 LiveInterval &interval,
191 /// Return true if the two specified registers belong to different
192 /// register classes. The registers may be either phys or virt regs.
193 bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
196 bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
197 MachineInstr *CopyMI);
199 bool overlapsAliases(const LiveInterval *lhs,
200 const LiveInterval *rhs) const;
202 static LiveInterval createInterval(unsigned Reg);
204 LiveInterval &getOrCreateInterval(unsigned reg) {
205 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
206 if (I == r2iMap_.end())
207 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
211 /// rep - returns the representative of this register
212 unsigned rep(unsigned Reg) {
213 unsigned Rep = r2rMap_[Reg];
215 return r2rMap_[Reg] = rep(Rep);
219 void printRegName(unsigned reg) const;
222 } // End llvm namespace