1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/LiveInterval.h"
25 #include "llvm/ADT/BitVector.h"
26 #include "llvm/ADT/DenseMap.h"
27 #include "llvm/ADT/IndexedMap.h"
33 class TargetInstrInfo;
34 class TargetRegisterClass;
37 class LiveIntervals : public MachineFunctionPass {
39 const TargetMachine* tm_;
40 const MRegisterInfo* mri_;
41 const TargetInstrInfo* tii_;
44 /// MBB2IdxMap - The index of the first instruction in the specified basic
46 std::vector<unsigned> MBB2IdxMap;
48 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
51 typedef std::vector<MachineInstr*> Index2MiMap;
54 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
55 Reg2IntervalMap r2iMap_;
57 BitVector allocatableRegs_;
60 static char ID; // Pass identification, replacement for typeid
61 LiveIntervals() : MachineFunctionPass((intptr_t)&ID) {}
73 static unsigned getBaseIndex(unsigned index) {
74 return index - (index % InstrSlots::NUM);
76 static unsigned getBoundaryIndex(unsigned index) {
77 return getBaseIndex(index + InstrSlots::NUM - 1);
79 static unsigned getLoadIndex(unsigned index) {
80 return getBaseIndex(index) + InstrSlots::LOAD;
82 static unsigned getUseIndex(unsigned index) {
83 return getBaseIndex(index) + InstrSlots::USE;
85 static unsigned getDefIndex(unsigned index) {
86 return getBaseIndex(index) + InstrSlots::DEF;
88 static unsigned getStoreIndex(unsigned index) {
89 return getBaseIndex(index) + InstrSlots::STORE;
92 typedef Reg2IntervalMap::iterator iterator;
93 typedef Reg2IntervalMap::const_iterator const_iterator;
94 const_iterator begin() const { return r2iMap_.begin(); }
95 const_iterator end() const { return r2iMap_.end(); }
96 iterator begin() { return r2iMap_.begin(); }
97 iterator end() { return r2iMap_.end(); }
98 unsigned getNumIntervals() const { return r2iMap_.size(); }
100 LiveInterval &getInterval(unsigned reg) {
101 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
102 assert(I != r2iMap_.end() && "Interval does not exist for register");
106 const LiveInterval &getInterval(unsigned reg) const {
107 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
108 assert(I != r2iMap_.end() && "Interval does not exist for register");
112 bool hasInterval(unsigned reg) const {
113 return r2iMap_.count(reg);
116 /// getMBBStartIdx - Return the base index of the first instruction in the
117 /// specified MachineBasicBlock.
118 unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
119 return getMBBStartIdx(MBB->getNumber());
122 unsigned getMBBStartIdx(unsigned MBBNo) const {
123 assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
124 return MBB2IdxMap[MBBNo];
127 /// getInstructionIndex - returns the base index of instr
128 unsigned getInstructionIndex(MachineInstr* instr) const {
129 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
130 assert(it != mi2iMap_.end() && "Invalid instruction!");
134 /// getInstructionFromIndex - given an index in any slot of an
135 /// instruction return a pointer the instruction
136 MachineInstr* getInstructionFromIndex(unsigned index) const {
137 index /= InstrSlots::NUM; // convert index to vector index
138 assert(index < i2miMap_.size() &&
139 "index does not correspond to an instruction");
140 return i2miMap_[index];
145 LiveInterval &getOrCreateInterval(unsigned reg) {
146 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
147 if (I == r2iMap_.end())
148 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
152 /// CreateNewLiveInterval - Create a new live interval with the given live
153 /// ranges. The new live interval will have an infinite spill weight.
154 LiveInterval &CreateNewLiveInterval(const LiveInterval *LI,
155 const std::vector<LiveRange> &LRs);
157 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
163 void removeInterval(unsigned Reg) {
167 /// isRemoved - returns true if the specified machine instr has been
169 bool isRemoved(MachineInstr* instr) const {
170 return !mi2iMap_.count(instr);
173 /// RemoveMachineInstrFromMaps - This marks the specified machine instr as
175 void RemoveMachineInstrFromMaps(MachineInstr *MI) {
176 // remove index -> MachineInstr and
177 // MachineInstr -> index mappings
178 Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
179 if (mi2i != mi2iMap_.end()) {
180 i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
181 mi2iMap_.erase(mi2i);
185 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
186 virtual void releaseMemory();
188 /// runOnMachineFunction - pass entry point
189 virtual bool runOnMachineFunction(MachineFunction&);
191 /// print - Implement the dump method.
192 virtual void print(std::ostream &O, const Module* = 0) const;
193 void print(std::ostream *O, const Module* M = 0) const {
198 /// computeIntervals - Compute live intervals.
199 void computeIntervals();
201 /// handleRegisterDef - update intervals for a register def
202 /// (calls handlePhysicalRegisterDef and
203 /// handleVirtualRegisterDef)
204 void handleRegisterDef(MachineBasicBlock *MBB,
205 MachineBasicBlock::iterator MI, unsigned MIIdx,
208 /// handleVirtualRegisterDef - update intervals for a virtual
210 void handleVirtualRegisterDef(MachineBasicBlock *MBB,
211 MachineBasicBlock::iterator MI,
213 LiveInterval& interval);
215 /// handlePhysicalRegisterDef - update intervals for a physical register
217 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
218 MachineBasicBlock::iterator mi,
220 LiveInterval &interval,
223 /// handleLiveInRegister - Create interval for a livein register.
224 void handleLiveInRegister(MachineBasicBlock* mbb,
226 LiveInterval &interval, bool isAlias = false);
228 static LiveInterval createInterval(unsigned Reg);
230 void printRegName(unsigned reg) const;
233 } // End llvm namespace