1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/ADT/DenseMap.h"
24 #include "llvm/CodeGen/MachineFunctionPass.h"
25 #include "LiveInterval.h"
31 class TargetInstrInfo;
34 class LiveIntervals : public MachineFunctionPass {
36 const TargetMachine* tm_;
37 const MRegisterInfo* mri_;
38 const TargetInstrInfo* tii_;
41 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
44 typedef std::vector<MachineInstr*> Index2MiMap;
47 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
48 Reg2IntervalMap r2iMap_;
50 typedef DenseMap<unsigned> Reg2RegMap;
53 std::vector<bool> allocatableRegs_;
67 static unsigned getBaseIndex(unsigned index) {
68 return index - (index % InstrSlots::NUM);
70 static unsigned getBoundaryIndex(unsigned index) {
71 return getBaseIndex(index + InstrSlots::NUM - 1);
73 static unsigned getLoadIndex(unsigned index) {
74 return getBaseIndex(index) + InstrSlots::LOAD;
76 static unsigned getUseIndex(unsigned index) {
77 return getBaseIndex(index) + InstrSlots::USE;
79 static unsigned getDefIndex(unsigned index) {
80 return getBaseIndex(index) + InstrSlots::DEF;
82 static unsigned getStoreIndex(unsigned index) {
83 return getBaseIndex(index) + InstrSlots::STORE;
86 typedef Reg2IntervalMap::iterator iterator;
87 typedef Reg2IntervalMap::const_iterator const_iterator;
88 const_iterator begin() const { return r2iMap_.begin(); }
89 const_iterator end() const { return r2iMap_.end(); }
90 iterator begin() { return r2iMap_.begin(); }
91 iterator end() { return r2iMap_.end(); }
92 unsigned getNumIntervals() const { return r2iMap_.size(); }
94 LiveInterval &getInterval(unsigned reg) {
95 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
96 assert(I != r2iMap_.end() && "Interval does not exist for register");
100 const LiveInterval &getInterval(unsigned reg) const {
101 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
102 assert(I != r2iMap_.end() && "Interval does not exist for register");
106 /// getInstructionIndex - returns the base index of instr
107 unsigned getInstructionIndex(MachineInstr* instr) const {
108 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
109 assert(it != mi2iMap_.end() && "Invalid instruction!");
113 /// getInstructionFromIndex - given an index in any slot of an
114 /// instruction return a pointer the instruction
115 MachineInstr* getInstructionFromIndex(unsigned index) const {
116 index /= InstrSlots::NUM; // convert index to vector index
117 assert(index < i2miMap_.size() &&
118 "index does not correspond to an instruction");
119 return i2miMap_[index];
122 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
126 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
127 virtual void releaseMemory();
129 /// runOnMachineFunction - pass entry point
130 virtual bool runOnMachineFunction(MachineFunction&);
132 /// print - Implement the dump method.
133 virtual void print(std::ostream &O, const Module* = 0) const;
136 /// computeIntervals - compute live intervals
137 void computeIntervals();
139 /// joinIntervals - join compatible live intervals
140 void joinIntervals();
142 /// joinIntervalsInMachineBB - Join intervals based on move
143 /// instructions in the specified basic block.
144 void joinIntervalsInMachineBB(MachineBasicBlock *MBB);
146 /// handleRegisterDef - update intervals for a register def
147 /// (calls handlePhysicalRegisterDef and
148 /// handleVirtualRegisterDef)
149 void handleRegisterDef(MachineBasicBlock* mbb,
150 MachineBasicBlock::iterator mi,
153 /// handleVirtualRegisterDef - update intervals for a virtual
155 void handleVirtualRegisterDef(MachineBasicBlock* mbb,
156 MachineBasicBlock::iterator mi,
157 LiveInterval& interval);
159 /// handlePhysicalRegisterDef - update intervals for a physical register
160 /// def. If the defining instruction is a move instruction, SrcReg will be
161 /// the input register, and DestReg will be the result. Note that Interval
162 /// may not match DestReg (it might be an alias instead).
164 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
165 MachineBasicBlock::iterator mi,
166 LiveInterval& interval,
167 unsigned SrcReg, unsigned DestReg);
169 /// Return true if the two specified registers belong to different
170 /// register classes. The registers may be either phys or virt regs.
171 bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
173 bool overlapsAliases(const LiveInterval *lhs,
174 const LiveInterval *rhs) const;
176 static LiveInterval createInterval(unsigned Reg);
178 LiveInterval &getOrCreateInterval(unsigned reg) {
179 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
180 if (I == r2iMap_.end())
181 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
185 /// rep - returns the representative of this register
186 unsigned rep(unsigned Reg) {
187 unsigned Rep = r2rMap_[Reg];
189 return r2rMap_[Reg] = rep(Rep);
193 void printRegName(unsigned reg) const;
196 } // End llvm namespace