1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/LiveInterval.h"
25 #include "llvm/ADT/BitVector.h"
26 #include "llvm/ADT/IndexedMap.h"
32 class TargetInstrInfo;
35 class LiveIntervals : public MachineFunctionPass {
37 const TargetMachine* tm_;
38 const MRegisterInfo* mri_;
39 const TargetInstrInfo* tii_;
42 /// MBB2IdxMap - The index of the first instruction in the specified basic
44 std::vector<unsigned> MBB2IdxMap;
46 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
49 typedef std::vector<MachineInstr*> Index2MiMap;
52 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
53 Reg2IntervalMap r2iMap_;
55 typedef IndexedMap<unsigned> Reg2RegMap;
58 BitVector allocatableRegs_;
60 /// JoinedLIs - Keep track which register intervals have been coalesced
61 /// with other intervals.
67 unsigned SrcReg, DstReg;
69 CopyRec getCopyRec(MachineInstr *MI, unsigned SrcReg, unsigned DstReg) {
86 static unsigned getBaseIndex(unsigned index) {
87 return index - (index % InstrSlots::NUM);
89 static unsigned getBoundaryIndex(unsigned index) {
90 return getBaseIndex(index + InstrSlots::NUM - 1);
92 static unsigned getLoadIndex(unsigned index) {
93 return getBaseIndex(index) + InstrSlots::LOAD;
95 static unsigned getUseIndex(unsigned index) {
96 return getBaseIndex(index) + InstrSlots::USE;
98 static unsigned getDefIndex(unsigned index) {
99 return getBaseIndex(index) + InstrSlots::DEF;
101 static unsigned getStoreIndex(unsigned index) {
102 return getBaseIndex(index) + InstrSlots::STORE;
105 typedef Reg2IntervalMap::iterator iterator;
106 typedef Reg2IntervalMap::const_iterator const_iterator;
107 const_iterator begin() const { return r2iMap_.begin(); }
108 const_iterator end() const { return r2iMap_.end(); }
109 iterator begin() { return r2iMap_.begin(); }
110 iterator end() { return r2iMap_.end(); }
111 unsigned getNumIntervals() const { return r2iMap_.size(); }
113 LiveInterval &getInterval(unsigned reg) {
114 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
115 assert(I != r2iMap_.end() && "Interval does not exist for register");
119 const LiveInterval &getInterval(unsigned reg) const {
120 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
121 assert(I != r2iMap_.end() && "Interval does not exist for register");
125 bool hasInterval(unsigned reg) const {
126 return r2iMap_.count(reg);
129 /// getMBBStartIdx - Return the base index of the first instruction in the
130 /// specified MachineBasicBlock.
131 unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
132 return getMBBStartIdx(MBB->getNumber());
135 unsigned getMBBStartIdx(unsigned MBBNo) const {
136 assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
137 return MBB2IdxMap[MBBNo];
140 /// getInstructionIndex - returns the base index of instr
141 unsigned getInstructionIndex(MachineInstr* instr) const {
142 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
143 assert(it != mi2iMap_.end() && "Invalid instruction!");
147 /// getInstructionFromIndex - given an index in any slot of an
148 /// instruction return a pointer the instruction
149 MachineInstr* getInstructionFromIndex(unsigned index) const {
150 index /= InstrSlots::NUM; // convert index to vector index
151 assert(index < i2miMap_.size() &&
152 "index does not correspond to an instruction");
153 return i2miMap_[index];
156 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
160 /// CreateNewLiveInterval - Create a new live interval with the given live
161 /// ranges. The new live interval will have an infinite spill weight.
162 LiveInterval &CreateNewLiveInterval(const LiveInterval *LI,
163 const std::vector<LiveRange> &LRs);
165 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
166 virtual void releaseMemory();
168 /// runOnMachineFunction - pass entry point
169 virtual bool runOnMachineFunction(MachineFunction&);
171 /// print - Implement the dump method.
172 virtual void print(std::ostream &O, const Module* = 0) const;
173 void print(std::ostream *O, const Module* M = 0) const {
178 /// isRemoved - returns true if the specified machine instr has been
180 bool isRemoved(MachineInstr* instr) const {
181 return !mi2iMap_.count(instr);
184 /// RemoveMachineInstrFromMaps - This marks the specified machine instr as
186 void RemoveMachineInstrFromMaps(MachineInstr *MI) {
187 // remove index -> MachineInstr and
188 // MachineInstr -> index mappings
189 Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
190 if (mi2i != mi2iMap_.end()) {
191 i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
192 mi2iMap_.erase(mi2i);
196 /// computeIntervals - Compute live intervals.
197 void computeIntervals();
199 /// joinIntervals - join compatible live intervals
200 void joinIntervals();
202 /// CopyCoallesceInMBB - Coallsece copies in the specified MBB, putting
203 /// copies that cannot yet be coallesced into the "TryAgain" list.
204 void CopyCoallesceInMBB(MachineBasicBlock *MBB,
205 std::vector<CopyRec> &TryAgain);
207 /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
208 /// which are the src/dst of the copy instruction CopyMI. This returns true
209 /// if the copy was successfully coallesced away, or if it is never possible
210 /// to coallesce these this copy, due to register constraints. It returns
211 /// false if it is not currently possible to coallesce this interval, but
212 /// it may be possible if other things get coallesced.
213 bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg);
215 /// JoinIntervals - Attempt to join these two intervals. On failure, this
216 /// returns false. Otherwise, if one of the intervals being joined is a
217 /// physreg, this method always canonicalizes DestInt to be it. The output
218 /// "SrcInt" will not have been modified, so we can use this information
219 /// below to update aliases.
220 bool JoinIntervals(LiveInterval &LHS, LiveInterval &RHS);
222 /// SimpleJoin - Attempt to join the specified interval into this one. The
223 /// caller of this method must guarantee that the RHS only contains a single
224 /// value number and that the RHS is not defined by a copy from this
225 /// interval. This returns false if the intervals are not joinable, or it
226 /// joins them and returns true.
227 bool SimpleJoin(LiveInterval &LHS, LiveInterval &RHS);
229 /// handleRegisterDef - update intervals for a register def
230 /// (calls handlePhysicalRegisterDef and
231 /// handleVirtualRegisterDef)
232 void handleRegisterDef(MachineBasicBlock *MBB,
233 MachineBasicBlock::iterator MI, unsigned MIIdx,
236 /// handleVirtualRegisterDef - update intervals for a virtual
238 void handleVirtualRegisterDef(MachineBasicBlock *MBB,
239 MachineBasicBlock::iterator MI,
241 LiveInterval& interval);
243 /// handlePhysicalRegisterDef - update intervals for a physical register
245 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
246 MachineBasicBlock::iterator mi,
248 LiveInterval &interval,
251 /// handleLiveInRegister - Create interval for a livein register.
252 void handleLiveInRegister(MachineBasicBlock* mbb,
254 LiveInterval &interval);
256 /// Return true if the two specified registers belong to different
257 /// register classes. The registers may be either phys or virt regs.
258 bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
261 bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
262 MachineInstr *CopyMI);
264 /// lastRegisterUse - Returns the last use of the specific register between
265 /// cycles Start and End. It also returns the use operand by reference. It
266 /// returns NULL if there are no uses.
267 MachineInstr *lastRegisterUse(unsigned Reg, unsigned Start, unsigned End,
268 MachineOperand *&MOU);
270 /// unsetRegisterKill - Unset IsKill property of all uses of the specific
271 /// register of the specific instruction.
272 void unsetRegisterKill(MachineInstr *MI, unsigned Reg);
274 /// hasRegisterDef - True if the instruction defines the specific register.
276 bool hasRegisterDef(MachineInstr *MI, unsigned Reg);
278 static LiveInterval createInterval(unsigned Reg);
280 void removeInterval(unsigned Reg) {
284 LiveInterval &getOrCreateInterval(unsigned reg) {
285 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
286 if (I == r2iMap_.end())
287 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
291 /// rep - returns the representative of this register
292 unsigned rep(unsigned Reg) {
293 unsigned Rep = r2rMap_[Reg];
295 return r2rMap_[Reg] = rep(Rep);
299 void printRegName(unsigned reg) const;
302 } // End llvm namespace