1 //===-- LiveStackAnalysis.h - Live Stack Slot Analysis ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the live stack slot analysis pass. It is analogous to
11 // live interval analysis except it's analyzing liveness of stack slots rather
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_LIVESTACK_ANALYSIS_H
17 #define LLVM_CODEGEN_LIVESTACK_ANALYSIS_H
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/LiveInterval.h"
21 #include "llvm/Target/TargetRegisterInfo.h"
22 #include "llvm/Support/Allocator.h"
27 class LiveStacks : public MachineFunctionPass {
28 /// Special pool allocator for VNInfo's (LiveInterval val#).
30 VNInfo::Allocator VNInfoAllocator;
32 /// S2IMap - Stack slot indices to live interval mapping.
34 typedef std::map<int, LiveInterval> SS2IntervalMap;
35 SS2IntervalMap S2IMap;
37 /// S2RCMap - Stack slot indices to register class mapping.
38 std::map<int, const TargetRegisterClass*> S2RCMap;
41 static char ID; // Pass identification, replacement for typeid
42 LiveStacks() : MachineFunctionPass(ID) {}
44 typedef SS2IntervalMap::iterator iterator;
45 typedef SS2IntervalMap::const_iterator const_iterator;
46 const_iterator begin() const { return S2IMap.begin(); }
47 const_iterator end() const { return S2IMap.end(); }
48 iterator begin() { return S2IMap.begin(); }
49 iterator end() { return S2IMap.end(); }
51 unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); }
53 LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
54 assert(Slot >= 0 && "Spill slot indice must be >= 0");
55 SS2IntervalMap::iterator I = S2IMap.find(Slot);
56 if (I == S2IMap.end()) {
57 I = S2IMap.insert(I,std::make_pair(Slot, LiveInterval(Slot,0.0F,true)));
58 S2RCMap.insert(std::make_pair(Slot, RC));
60 // Use the largest common subclass register class.
61 const TargetRegisterClass *OldRC = S2RCMap[Slot];
62 S2RCMap[Slot] = getCommonSubClass(OldRC, RC);
67 LiveInterval &getInterval(int Slot) {
68 assert(Slot >= 0 && "Spill slot indice must be >= 0");
69 SS2IntervalMap::iterator I = S2IMap.find(Slot);
70 assert(I != S2IMap.end() && "Interval does not exist for stack slot");
74 const LiveInterval &getInterval(int Slot) const {
75 assert(Slot >= 0 && "Spill slot indice must be >= 0");
76 SS2IntervalMap::const_iterator I = S2IMap.find(Slot);
77 assert(I != S2IMap.end() && "Interval does not exist for stack slot");
81 bool hasInterval(int Slot) const {
82 return S2IMap.count(Slot);
85 const TargetRegisterClass *getIntervalRegClass(int Slot) const {
86 assert(Slot >= 0 && "Spill slot indice must be >= 0");
87 std::map<int, const TargetRegisterClass*>::const_iterator
88 I = S2RCMap.find(Slot);
89 assert(I != S2RCMap.end() &&
90 "Register class info does not exist for stack slot");
94 VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
96 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
97 virtual void releaseMemory();
99 /// runOnMachineFunction - pass entry point
100 virtual bool runOnMachineFunction(MachineFunction&);
102 /// print - Implement the dump method.
103 virtual void print(raw_ostream &O, const Module* = 0) const;
107 #endif /* LLVM_CODEGEN_LIVESTACK_ANALYSIS_H */