1 //===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveVariable analysis pass. For each machine
11 // instruction in the function, this pass calculates the set of registers that
12 // are immediately dead after the instruction (i.e., the instruction calculates
13 // the value, but it is never used) and the set of registers that are used by
14 // the instruction, but are never used after the instruction (i.e., they are
17 // This class computes live variables using are sparse implementation based on
18 // the machine code SSA form. This class computes live variable information for
19 // each virtual and _register allocatable_ physical register in a function. It
20 // uses the dominance properties of SSA form to efficiently compute live
21 // variables for virtual registers, and assumes that physical registers are only
22 // live within a single basic block (allowing it to do a single local analysis
23 // to resolve physical register lifetimes in each basic block). If a physical
24 // register is not register allocatable, it is not tracked. This is useful for
25 // things like the stack pointer and condition codes.
27 //===----------------------------------------------------------------------===//
29 #ifndef LLVM_CODEGEN_LIVEVARIABLES_H
30 #define LLVM_CODEGEN_LIVEVARIABLES_H
32 #include "llvm/CodeGen/MachineFunctionPass.h"
39 class LiveVariables : public MachineFunctionPass {
42 /// DefInst - The machine instruction that defines this register.
43 MachineInstr *DefInst;
45 /// AliveBlocks - Set of blocks of which this value is alive completely
46 /// through. This is a bit set which uses the basic block number as an
49 std::vector<bool> AliveBlocks;
51 /// Kills - List of MachineInstruction's which are the last use of this
52 /// virtual register (kill it) in their basic block.
54 std::vector<MachineInstr*> Kills;
56 VarInfo() : DefInst(0) {}
58 /// removeKill - Delete a kill corresponding to the specified
59 /// machine instruction. Returns true if there was a kill
60 /// corresponding to this instruction, false otherwise.
61 bool removeKill(MachineInstr *MI) {
62 for (std::vector<MachineInstr*>::iterator i = Kills.begin(),
63 e = Kills.end(); i != e; ++i)
73 /// VirtRegInfo - This list is a mapping from virtual register number to
74 /// variable information. FirstVirtualRegister is subtracted from the virtual
75 /// register number before indexing into this list.
77 std::vector<VarInfo> VirtRegInfo;
79 /// RegistersKilled - This multimap keeps track of all of the registers that
80 /// are dead immediately after an instruction reads its operands. If an
81 /// instruction does not have an entry in this map, it kills no registers.
83 std::multimap<MachineInstr*, unsigned> RegistersKilled;
85 /// RegistersDead - This multimap keeps track of all of the registers that are
86 /// dead immediately after an instruction executes, which are not dead after
87 /// the operands are evaluated. In practice, this only contains registers
88 /// which are defined by an instruction, but never used.
90 std::multimap<MachineInstr*, unsigned> RegistersDead;
92 /// AllocatablePhysicalRegisters - This vector keeps track of which registers
93 /// are actually register allocatable by the target machine. We can not track
94 /// liveness for values that are not in this set.
96 std::vector<bool> AllocatablePhysicalRegisters;
98 private: // Intermediate data structures
99 const MRegisterInfo *RegInfo;
101 MachineInstr **PhysRegInfo;
104 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
105 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
109 virtual bool runOnMachineFunction(MachineFunction &MF);
111 /// killed_iterator - Iterate over registers killed by a machine instruction
113 typedef std::multimap<MachineInstr*, unsigned>::iterator killed_iterator;
115 /// killed_begin/end - Get access to the range of registers killed by a
116 /// machine instruction.
117 killed_iterator killed_begin(MachineInstr *MI) {
118 return RegistersKilled.lower_bound(MI);
120 killed_iterator killed_end(MachineInstr *MI) {
121 return RegistersKilled.upper_bound(MI);
123 std::pair<killed_iterator, killed_iterator>
124 killed_range(MachineInstr *MI) {
125 return RegistersKilled.equal_range(MI);
128 killed_iterator dead_begin(MachineInstr *MI) {
129 return RegistersDead.lower_bound(MI);
131 killed_iterator dead_end(MachineInstr *MI) {
132 return RegistersDead.upper_bound(MI);
134 std::pair<killed_iterator, killed_iterator>
135 dead_range(MachineInstr *MI) {
136 return RegistersDead.equal_range(MI);
139 //===--------------------------------------------------------------------===//
140 // API to update live variable information
142 /// instructionChanged - When the address of an instruction changes, this
143 /// method should be called so that live variables can update its internal
144 /// data structures. This removes the records for OldMI, transfering them to
145 /// the records for NewMI.
146 void instructionChanged(MachineInstr *OldMI, MachineInstr *NewMI);
148 /// addVirtualRegisterKilled - Add information about the fact that the
149 /// specified register is killed after being used by the specified
152 void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
153 RegistersKilled.insert(std::make_pair(MI, IncomingReg));
154 getVarInfo(IncomingReg).Kills.push_back(MI);
157 /// removeVirtualRegisterKilled - Remove the specified virtual
158 /// register from the live variable information. Returns true if the
159 /// variable was marked as killed by the specified instruction,
161 bool removeVirtualRegisterKilled(unsigned reg,
162 MachineBasicBlock *MBB,
164 if (!getVarInfo(reg).removeKill(MI))
166 for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
167 if (i->second == reg)
168 RegistersKilled.erase(i++);
175 /// removeVirtualRegistersKilled - Remove all of the specified killed
176 /// registers from the live variable information.
177 void removeVirtualRegistersKilled(killed_iterator B, killed_iterator E) {
178 for (killed_iterator I = B; I != E; ++I) { // Remove VarInfo entries...
179 bool removed = getVarInfo(I->second).removeKill(I->first);
180 assert(removed && "kill not in register's VarInfo?");
182 RegistersKilled.erase(B, E);
185 /// addVirtualRegisterDead - Add information about the fact that the specified
186 /// register is dead after being used by the specified instruction.
188 void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
189 RegistersDead.insert(std::make_pair(MI, IncomingReg));
190 getVarInfo(IncomingReg).Kills.push_back(MI);
193 /// removeVirtualRegisterDead - Remove the specified virtual
194 /// register from the live variable information. Returns true if the
195 /// variable was marked dead at the specified instruction, false
197 bool removeVirtualRegisterDead(unsigned reg,
198 MachineBasicBlock *MBB,
200 if (!getVarInfo(reg).removeKill(MI))
203 for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
204 if (i->second == reg)
205 RegistersKilled.erase(i++);
212 /// removeVirtualRegistersDead - Remove all of the specified dead
213 /// registers from the live variable information.
214 void removeVirtualRegistersDead(killed_iterator B, killed_iterator E) {
215 for (killed_iterator I = B; I != E; ++I) // Remove VarInfo entries...
216 getVarInfo(I->second).removeKill(I->first);
217 RegistersDead.erase(B, E);
220 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
221 AU.setPreservesAll();
224 virtual void releaseMemory() {
226 RegistersKilled.clear();
227 RegistersDead.clear();
230 /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
232 VarInfo &getVarInfo(unsigned RegIdx);
234 const std::vector<bool>& getAllocatablePhysicalRegisters() const {
235 return AllocatablePhysicalRegisters;
238 void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *BB);
239 void HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
243 } // End llvm namespace