1 //===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveVariable analysis pass. For each machine
11 // instruction in the function, this pass calculates the set of registers that
12 // are immediately dead after the instruction (i.e., the instruction calculates
13 // the value, but it is never used) and the set of registers that are used by
14 // the instruction, but are never used after the instruction (i.e., they are
17 // This class computes live variables using are sparse implementation based on
18 // the machine code SSA form. This class computes live variable information for
19 // each virtual and _register allocatable_ physical register in a function. It
20 // uses the dominance properties of SSA form to efficiently compute live
21 // variables for virtual registers, and assumes that physical registers are only
22 // live within a single basic block (allowing it to do a single local analysis
23 // to resolve physical register lifetimes in each basic block). If a physical
24 // register is not register allocatable, it is not tracked. This is useful for
25 // things like the stack pointer and condition codes.
27 //===----------------------------------------------------------------------===//
29 #ifndef LLVM_CODEGEN_LIVEVARIABLES_H
30 #define LLVM_CODEGEN_LIVEVARIABLES_H
32 #include "llvm/CodeGen/MachineFunctionPass.h"
39 class LiveVariables : public MachineFunctionPass {
42 /// DefBlock - The basic block which defines this value...
43 MachineBasicBlock *DefBlock;
44 MachineInstr *DefInst;
46 /// AliveBlocks - Set of blocks of which this value is alive completely
47 /// through. This is a bit set which uses the basic block number as an
50 std::vector<bool> AliveBlocks;
52 /// Kills - List of MachineBasicblock's which contain the last use of this
53 /// virtual register (kill it). This also includes the specific instruction
54 /// which kills the value.
56 std::vector<std::pair<MachineBasicBlock*, MachineInstr*> > Kills;
58 VarInfo() : DefBlock(0), DefInst(0) {}
60 /// removeKill - Delete a kill corresponding to the specified
61 /// machine instruction. Returns true if there was a kill
62 /// corresponding to this instruction, false otherwise.
63 bool removeKill(MachineInstr *MI) {
64 for (std::vector<std::pair<MachineBasicBlock*, MachineInstr*> >::iterator
65 i = Kills.begin(); i != Kills.end(); ++i) {
66 if (i->second == MI) {
76 /// VirtRegInfo - This list is a mapping from virtual register number to
77 /// variable information. FirstVirtualRegister is subtracted from the virtual
78 /// register number before indexing into this list.
80 std::vector<VarInfo> VirtRegInfo;
82 /// RegistersKilled - This multimap keeps track of all of the registers that
83 /// are dead immediately after an instruction reads its operands. If an
84 /// instruction does not have an entry in this map, it kills no registers.
86 std::multimap<MachineInstr*, unsigned> RegistersKilled;
88 /// RegistersDead - This multimap keeps track of all of the registers that are
89 /// dead immediately after an instruction executes, which are not dead after
90 /// the operands are evaluated. In practice, this only contains registers
91 /// which are defined by an instruction, but never used.
93 std::multimap<MachineInstr*, unsigned> RegistersDead;
95 /// AllocatablePhysicalRegisters - This vector keeps track of which registers
96 /// are actually register allocatable by the target machine. We can not track
97 /// liveness for values that are not in this set.
99 std::vector<bool> AllocatablePhysicalRegisters;
101 private: // Intermediate data structures
102 const MRegisterInfo *RegInfo;
104 MachineInstr **PhysRegInfo;
107 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
108 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
112 virtual bool runOnMachineFunction(MachineFunction &MF);
114 /// killed_iterator - Iterate over registers killed by a machine instruction
116 typedef std::multimap<MachineInstr*, unsigned>::iterator killed_iterator;
118 /// killed_begin/end - Get access to the range of registers killed by a
119 /// machine instruction.
120 killed_iterator killed_begin(MachineInstr *MI) {
121 return RegistersKilled.lower_bound(MI);
123 killed_iterator killed_end(MachineInstr *MI) {
124 return RegistersKilled.upper_bound(MI);
126 std::pair<killed_iterator, killed_iterator>
127 killed_range(MachineInstr *MI) {
128 return RegistersKilled.equal_range(MI);
131 killed_iterator dead_begin(MachineInstr *MI) {
132 return RegistersDead.lower_bound(MI);
134 killed_iterator dead_end(MachineInstr *MI) {
135 return RegistersDead.upper_bound(MI);
137 std::pair<killed_iterator, killed_iterator>
138 dead_range(MachineInstr *MI) {
139 return RegistersDead.equal_range(MI);
142 //===--------------------------------------------------------------------===//
143 // API to update live variable information
145 /// instructionChanged - When the address of an instruction changes, this
146 /// method should be called so that live variables can update its internal
147 /// data structures. This removes the records for OldMI, transfering them to
148 /// the records for NewMI.
149 void instructionChanged(MachineInstr *OldMI, MachineInstr *NewMI);
151 /// addVirtualRegisterKilled - Add information about the fact that the
152 /// specified register is killed after being used by the specified
155 void addVirtualRegisterKilled(unsigned IncomingReg,
156 MachineBasicBlock *MBB,
158 RegistersKilled.insert(std::make_pair(MI, IncomingReg));
159 getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MBB, MI));
162 /// removeVirtualRegisterKilled - Remove the specified virtual
163 /// register from the live variable information. Returns true if the
164 /// variable was marked as killed by the specified instruction,
166 bool removeVirtualRegisterKilled(unsigned reg,
167 MachineBasicBlock *MBB,
169 if (!getVarInfo(reg).removeKill(MI))
171 for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
172 if (i->second == reg)
173 RegistersKilled.erase(i++);
180 /// removeVirtualRegistersKilled - Remove all of the specified killed
181 /// registers from the live variable information.
182 void removeVirtualRegistersKilled(killed_iterator B, killed_iterator E) {
183 for (killed_iterator I = B; I != E; ++I) { // Remove VarInfo entries...
184 bool removed = getVarInfo(I->second).removeKill(I->first);
185 assert(removed && "kill not in register's VarInfo?");
187 RegistersKilled.erase(B, E);
190 /// addVirtualRegisterDead - Add information about the fact that the specified
191 /// register is dead after being used by the specified instruction.
193 void addVirtualRegisterDead(unsigned IncomingReg,
194 MachineBasicBlock *MBB,
196 RegistersDead.insert(std::make_pair(MI, IncomingReg));
197 getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MBB, MI));
200 /// removeVirtualRegisterDead - Remove the specified virtual
201 /// register from the live variable information. Returns true if the
202 /// variable was marked dead at the specified instruction, false
204 bool removeVirtualRegisterDead(unsigned reg,
205 MachineBasicBlock *MBB,
207 if (!getVarInfo(reg).removeKill(MI))
210 for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
211 if (i->second == reg)
212 RegistersKilled.erase(i++);
219 /// removeVirtualRegistersDead - Remove all of the specified dead
220 /// registers from the live variable information.
221 void removeVirtualRegistersDead(killed_iterator B, killed_iterator E) {
222 for (killed_iterator I = B; I != E; ++I) // Remove VarInfo entries...
223 getVarInfo(I->second).removeKill(I->first);
224 RegistersDead.erase(B, E);
227 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
228 AU.setPreservesAll();
231 virtual void releaseMemory() {
233 RegistersKilled.clear();
234 RegistersDead.clear();
237 /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
239 VarInfo &getVarInfo(unsigned RegIdx);
241 const std::vector<bool>& getAllocatablePhysicalRegisters() const {
242 return AllocatablePhysicalRegisters;
245 void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *BB);
246 void HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
250 } // End llvm namespace