1 //===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveVariables analysis pass. For each machine
11 // instruction in the function, this pass calculates the set of registers that
12 // are immediately dead after the instruction (i.e., the instruction calculates
13 // the value, but it is never used) and the set of registers that are used by
14 // the instruction, but are never used after the instruction (i.e., they are
17 // This class computes live variables using a sparse implementation based on
18 // the machine code SSA form. This class computes live variable information for
19 // each virtual and _register allocatable_ physical register in a function. It
20 // uses the dominance properties of SSA form to efficiently compute live
21 // variables for virtual registers, and assumes that physical registers are only
22 // live within a single basic block (allowing it to do a single local analysis
23 // to resolve physical register lifetimes in each basic block). If a physical
24 // register is not register allocatable, it is not tracked. This is useful for
25 // things like the stack pointer and condition codes.
27 //===----------------------------------------------------------------------===//
29 #ifndef LLVM_CODEGEN_LIVEVARIABLES_H
30 #define LLVM_CODEGEN_LIVEVARIABLES_H
32 #include "llvm/CodeGen/MachineFunctionPass.h"
33 #include "llvm/ADT/BitVector.h"
34 #include "llvm/ADT/DenseMap.h"
35 #include "llvm/ADT/SmallSet.h"
36 #include "llvm/ADT/SmallVector.h"
40 class MachineRegisterInfo;
41 class TargetRegisterInfo;
43 class LiveVariables : public MachineFunctionPass {
45 static char ID; // Pass identification, replacement for typeid
46 LiveVariables() : MachineFunctionPass(&ID) {}
48 /// VarInfo - This represents the regions where a virtual register is live in
49 /// the program. We represent this with three different pieces of
50 /// information: the set of blocks in which the instruction is live
51 /// throughout, the set of blocks in which the instruction is actually used,
52 /// and the set of non-phi instructions that are the last users of the value.
54 /// If the value is live throughout any blocks, these blocks are listed in
55 /// AliveBlocks. Blocks where the liveness range ends are not included in
56 /// AliveBlocks, instead being captured by the Kills set. In these blocks,
57 /// the value is live into the block (unless the value is defined and killed
58 /// in the same block) and lives until the specified instruction. Note that
59 /// there cannot ever be a value whose Kills set contains two instructions
60 /// from the same basic block.
62 /// PHI nodes complicate things a bit. If a PHI node is the last user of a
63 /// value in one of its predecessor blocks, it is not listed in the kills set,
64 /// but does include the predecessor block in the AliveBlocks set (unless that
65 /// block also defines the value). This leads to the (perfectly sensical)
66 /// situation where a value is defined in a block, and the last use is a phi
67 /// node in the successor. In this case, AliveBlocks is empty (the value is
68 /// not live across any blocks) and Kills is empty (phi nodes are not
69 /// included). This is sensical because the value must be live to the end of
70 /// the block, but is not live in any successor blocks.
72 /// AliveBlocks - Set of blocks in which this value is alive completely
73 /// through. This is a bit set which uses the basic block number as an
76 BitVector AliveBlocks;
78 /// UsedBlocks - Set of blocks in which this value is actually used. This
79 /// is a bit set which uses the basic block number as an index.
82 /// NumUses - Number of uses of this register across the entire function.
86 /// Kills - List of MachineInstruction's which are the last use of this
87 /// virtual register (kill it) in their basic block.
89 std::vector<MachineInstr*> Kills;
91 VarInfo() : NumUses(0) {}
93 /// removeKill - Delete a kill corresponding to the specified
94 /// machine instruction. Returns true if there was a kill
95 /// corresponding to this instruction, false otherwise.
96 bool removeKill(MachineInstr *MI) {
97 std::vector<MachineInstr*>::iterator
98 I = std::find(Kills.begin(), Kills.end(), MI);
109 /// VirtRegInfo - This list is a mapping from virtual register number to
110 /// variable information. FirstVirtualRegister is subtracted from the virtual
111 /// register number before indexing into this list.
113 std::vector<VarInfo> VirtRegInfo;
115 /// ReservedRegisters - This vector keeps track of which registers
116 /// are reserved register which are not allocatable by the target machine.
117 /// We can not track liveness for values that are in this set.
119 BitVector ReservedRegisters;
121 private: // Intermediate data structures
124 MachineRegisterInfo* MRI;
126 const TargetRegisterInfo *TRI;
128 // PhysRegInfo - Keep track of which instruction was the last def of a
129 // physical register. This is a purely local property, because all physical
130 // register references are presumed dead across basic blocks.
131 MachineInstr **PhysRegDef;
133 // PhysRegInfo - Keep track of which instruction was the last use of a
134 // physical register. This is a purely local property, because all physical
135 // register references are presumed dead across basic blocks.
136 MachineInstr **PhysRegUse;
138 SmallVector<unsigned, 4> *PHIVarInfo;
140 // DistanceMap - Keep track the distance of a MI from the start of the
141 // current basic block.
142 DenseMap<MachineInstr*, unsigned> DistanceMap;
144 /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
145 /// uses. Pay special attention to the sub-register uses which may come below
146 /// the last use of the whole register.
147 bool HandlePhysRegKill(unsigned Reg);
149 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
150 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
152 /// FindLastPartialDef - Return the last partial def of the specified register.
153 /// Also returns the sub-register that's defined.
154 MachineInstr *FindLastPartialDef(unsigned Reg, unsigned &PartDefReg);
156 /// hasRegisterUseBelow - Return true if the specified register is used after
157 /// the current instruction and before it's next definition.
158 bool hasRegisterUseBelow(unsigned Reg, MachineBasicBlock::iterator I,
159 MachineBasicBlock *MBB);
161 /// analyzePHINodes - Gather information about the PHI nodes in here. In
162 /// particular, we want to map the variable information of a virtual
163 /// register which is used in a PHI node. We map that to the BB the vreg
165 void analyzePHINodes(const MachineFunction& Fn);
168 virtual bool runOnMachineFunction(MachineFunction &MF);
170 /// RegisterDefIsDead - Return true if the specified instruction defines the
171 /// specified register, but that definition is dead.
172 bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const;
174 //===--------------------------------------------------------------------===//
175 // API to update live variable information
177 /// replaceKillInstruction - Update register kill info by replacing a kill
178 /// instruction with a new one.
179 void replaceKillInstruction(unsigned Reg, MachineInstr *OldMI,
180 MachineInstr *NewMI);
182 /// addVirtualRegisterKilled - Add information about the fact that the
183 /// specified register is killed after being used by the specified
184 /// instruction. If AddIfNotFound is true, add a implicit operand if it's
186 void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI,
187 bool AddIfNotFound = false) {
188 if (MI->addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
189 getVarInfo(IncomingReg).Kills.push_back(MI);
192 /// removeVirtualRegisterKilled - Remove the specified kill of the virtual
193 /// register from the live variable information. Returns true if the
194 /// variable was marked as killed by the specified instruction,
196 bool removeVirtualRegisterKilled(unsigned reg, MachineInstr *MI) {
197 if (!getVarInfo(reg).removeKill(MI))
200 bool Removed = false;
201 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
202 MachineOperand &MO = MI->getOperand(i);
203 if (MO.isReg() && MO.isKill() && MO.getReg() == reg) {
210 assert(Removed && "Register is not used by this instruction!");
214 /// removeVirtualRegistersKilled - Remove all killed info for the specified
216 void removeVirtualRegistersKilled(MachineInstr *MI);
218 /// addVirtualRegisterDead - Add information about the fact that the specified
219 /// register is dead after being used by the specified instruction. If
220 /// AddIfNotFound is true, add a implicit operand if it's not found.
221 void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI,
222 bool AddIfNotFound = false) {
223 if (MI->addRegisterDead(IncomingReg, TRI, AddIfNotFound))
224 getVarInfo(IncomingReg).Kills.push_back(MI);
227 /// removeVirtualRegisterDead - Remove the specified kill of the virtual
228 /// register from the live variable information. Returns true if the
229 /// variable was marked dead at the specified instruction, false
231 bool removeVirtualRegisterDead(unsigned reg, MachineInstr *MI) {
232 if (!getVarInfo(reg).removeKill(MI))
235 bool Removed = false;
236 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
237 MachineOperand &MO = MI->getOperand(i);
238 if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
244 assert(Removed && "Register is not defined by this instruction!");
248 void getAnalysisUsage(AnalysisUsage &AU) const;
250 virtual void releaseMemory() {
254 /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
256 VarInfo &getVarInfo(unsigned RegIdx);
258 void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
259 MachineBasicBlock *BB);
260 void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
261 MachineBasicBlock *BB,
262 std::vector<MachineBasicBlock*> &WorkList);
263 void HandleVirtRegDef(unsigned reg, MachineInstr *MI);
264 void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
268 } // End llvm namespace