1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/ilist.h"
20 #include "llvm/ADT/ilist_node.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/CodeGen/MachineOperand.h"
23 #include "llvm/CodeGen/MachineMemOperand.h"
24 #include "llvm/Target/TargetInstrDesc.h"
25 #include "llvm/CodeGen/DebugLoc.h"
31 class TargetInstrDesc;
32 class TargetInstrInfo;
33 class TargetRegisterInfo;
34 class MachineFunction;
36 //===----------------------------------------------------------------------===//
37 /// MachineInstr - Representation of each machine instruction.
39 class MachineInstr : public ilist_node<MachineInstr> {
40 const TargetInstrDesc *TID; // Instruction descriptor.
41 unsigned short NumImplicitOps; // Number of implicit operands (which
42 // are determined at construction time).
44 std::vector<MachineOperand> Operands; // the operands
45 std::list<MachineMemOperand> MemOperands; // information on memory references
46 MachineBasicBlock *Parent; // Pointer to the owning basic block.
47 DebugLoc debugLoc; // Source line information.
49 // OperandComplete - Return true if it's illegal to add a new operand
50 bool OperandsComplete() const;
52 MachineInstr(const MachineInstr&); // DO NOT IMPLEMENT
53 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
55 // Intrusive list support
56 friend struct ilist_traits<MachineInstr>;
57 friend struct ilist_traits<MachineBasicBlock>;
58 friend struct ilist_sentinel_traits<MachineInstr>;
59 void setParent(MachineBasicBlock *P) { Parent = P; }
61 /// MachineInstr ctor - This constructor creates a copy of the given
62 /// MachineInstr in the given MachineFunction.
63 MachineInstr(MachineFunction &, const MachineInstr &);
65 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
66 /// TID NULL and no operands.
69 // The next two constructors have DebugLoc and non-DebugLoc versions;
70 // over time, the non-DebugLoc versions should be phased out and eventually
73 /// MachineInstr ctor - This constructor create a MachineInstr and add the
74 /// implicit operands. It reserves space for number of operands specified by
75 /// TargetInstrDesc. The version with a DebugLoc should be preferred.
76 explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false);
78 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
79 /// the MachineInstr is created and added to the end of the specified basic
80 /// block. The version with a DebugLoc should be preferred.
82 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID);
84 /// MachineInstr ctor - This constructor create a MachineInstr and add the
85 /// implicit operands. It reserves space for number of operands specified by
86 /// TargetInstrDesc. An explicit DebugLoc is supplied.
87 explicit MachineInstr(const TargetInstrDesc &TID, const DebugLoc dl,
90 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
91 /// the MachineInstr is created and added to the end of the specified basic
94 MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl,
95 const TargetInstrDesc &TID);
99 // MachineInstrs are pool-allocated and owned by MachineFunction.
100 friend class MachineFunction;
103 const MachineBasicBlock* getParent() const { return Parent; }
104 MachineBasicBlock* getParent() { return Parent; }
106 /// getDebugLoc - Returns the debug location id of this MachineInstr.
108 const DebugLoc getDebugLoc() const { return debugLoc; }
110 /// getDesc - Returns the target instruction descriptor of this
112 const TargetInstrDesc &getDesc() const { return *TID; }
114 /// getOpcode - Returns the opcode of this MachineInstr.
116 int getOpcode() const { return TID->Opcode; }
118 /// Access to explicit operands of the instruction.
120 unsigned getNumOperands() const { return (unsigned)Operands.size(); }
122 const MachineOperand& getOperand(unsigned i) const {
123 assert(i < getNumOperands() && "getOperand() out of range!");
126 MachineOperand& getOperand(unsigned i) {
127 assert(i < getNumOperands() && "getOperand() out of range!");
131 /// getNumExplicitOperands - Returns the number of non-implicit operands.
133 unsigned getNumExplicitOperands() const;
135 /// Access to memory operands of the instruction
136 std::list<MachineMemOperand>::iterator memoperands_begin()
137 { return MemOperands.begin(); }
138 std::list<MachineMemOperand>::iterator memoperands_end()
139 { return MemOperands.end(); }
140 std::list<MachineMemOperand>::const_iterator memoperands_begin() const
141 { return MemOperands.begin(); }
142 std::list<MachineMemOperand>::const_iterator memoperands_end() const
143 { return MemOperands.end(); }
144 bool memoperands_empty() const { return MemOperands.empty(); }
146 /// hasOneMemOperand - Return true if this instruction has exactly one
147 /// MachineMemOperand.
148 bool hasOneMemOperand() const {
149 return !memoperands_empty() &&
150 next(memoperands_begin()) == memoperands_end();
153 /// isIdenticalTo - Return true if this instruction is identical to (same
154 /// opcode and same operands as) the specified instruction.
155 bool isIdenticalTo(const MachineInstr *Other) const {
156 if (Other->getOpcode() != getOpcode() ||
157 Other->getNumOperands() != getNumOperands())
159 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
160 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
165 /// removeFromParent - This method unlinks 'this' from the containing basic
166 /// block, and returns it, but does not delete it.
167 MachineInstr *removeFromParent();
169 /// eraseFromParent - This method unlinks 'this' from the containing basic
170 /// block and deletes it.
171 void eraseFromParent();
173 /// isLabel - Returns true if the MachineInstr represents a label.
175 bool isLabel() const;
177 /// isDebugLabel - Returns true if the MachineInstr represents a debug label.
179 bool isDebugLabel() const;
181 /// readsRegister - Return true if the MachineInstr reads the specified
182 /// register. If TargetRegisterInfo is passed, then it also checks if there
183 /// is a read of a super-register.
184 bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
185 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
188 /// killsRegister - Return true if the MachineInstr kills the specified
189 /// register. If TargetRegisterInfo is passed, then it also checks if there is
190 /// a kill of a super-register.
191 bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
192 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
195 /// modifiesRegister - Return true if the MachineInstr modifies the
196 /// specified register. If TargetRegisterInfo is passed, then it also checks
197 /// if there is a def of a super-register.
198 bool modifiesRegister(unsigned Reg,
199 const TargetRegisterInfo *TRI = NULL) const {
200 return findRegisterDefOperandIdx(Reg, false, TRI) != -1;
203 /// registerDefIsDead - Returns true if the register is dead in this machine
204 /// instruction. If TargetRegisterInfo is passed, then it also checks
205 /// if there is a dead def of a super-register.
206 bool registerDefIsDead(unsigned Reg,
207 const TargetRegisterInfo *TRI = NULL) const {
208 return findRegisterDefOperandIdx(Reg, true, TRI) != -1;
211 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
212 /// the specific register or -1 if it is not found. It further tightening
213 /// the search criteria to a use that kills the register if isKill is true.
214 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
215 const TargetRegisterInfo *TRI = NULL) const;
217 /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns
218 /// a pointer to the MachineOperand rather than an index.
219 MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false,
220 const TargetRegisterInfo *TRI = NULL) {
221 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
222 return (Idx == -1) ? NULL : &getOperand(Idx);
225 /// findRegisterDefOperandIdx() - Returns the operand index that is a def of
226 /// the specified register or -1 if it is not found. If isDead is true, defs
227 /// that are not dead are skipped. If TargetRegisterInfo is non-null, then it
228 /// also checks if there is a def of a super-register.
229 int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false,
230 const TargetRegisterInfo *TRI = NULL) const;
232 /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
233 /// a pointer to the MachineOperand rather than an index.
234 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
235 const TargetRegisterInfo *TRI = NULL) {
236 int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
237 return (Idx == -1) ? NULL : &getOperand(Idx);
240 /// findFirstPredOperandIdx() - Find the index of the first operand in the
241 /// operand list that is used to represent the predicate. It returns -1 if
243 int findFirstPredOperandIdx() const;
245 /// isRegReDefinedByTwoAddr - Given the index of a register def operand,
246 /// check if the register def is a re-definition due to two addr elimination.
247 bool isRegReDefinedByTwoAddr(unsigned DefIdx) const;
249 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
251 void copyKillDeadInfo(const MachineInstr *MI);
253 /// copyPredicates - Copies predicate operand(s) from MI.
254 void copyPredicates(const MachineInstr *MI);
256 /// addRegisterKilled - We have determined MI kills a register. Look for the
257 /// operand that uses it and mark it as IsKill. If AddIfNotFound is true,
258 /// add a implicit operand if it's not found. Returns true if the operand
259 /// exists / is added.
260 bool addRegisterKilled(unsigned IncomingReg,
261 const TargetRegisterInfo *RegInfo,
262 bool AddIfNotFound = false);
264 /// addRegisterDead - We have determined MI defined a register without a use.
265 /// Look for the operand that defines it and mark it as IsDead. If
266 /// AddIfNotFound is true, add a implicit operand if it's not found. Returns
267 /// true if the operand exists / is added.
268 bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
269 bool AddIfNotFound = false);
271 /// isSafeToMove - Return true if it is safe to move this instruction. If
272 /// SawStore is set to true, it means that there is a store (or call) between
273 /// the instruction's location and its intended destination.
274 bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore) const;
276 /// isSafeToReMat - Return true if it's safe to rematerialize the specified
277 /// instruction which defined the specified register instead of copying it.
278 bool isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg) const;
280 /// hasVolatileMemoryRef - Return true if this instruction may have a
281 /// volatile memory reference, or if the information describing the
282 /// memory reference is not available. Return false if it is known to
283 /// have no volatile memory references.
284 bool hasVolatileMemoryRef() const;
289 void print(std::ostream *OS, const TargetMachine *TM) const {
290 if (OS) print(*OS, TM);
292 void print(std::ostream &OS, const TargetMachine *TM = 0) const;
293 void print(std::ostream *OS) const { if (OS) print(*OS); }
294 void print(raw_ostream *OS, const TargetMachine *TM) const {
295 if (OS) print(*OS, TM);
297 void print(raw_ostream &OS, const TargetMachine *TM = 0) const;
298 void print(raw_ostream *OS) const { if (OS) print(*OS); }
301 //===--------------------------------------------------------------------===//
302 // Accessors used to build up machine instructions.
304 /// addOperand - Add the specified operand to the instruction. If it is an
305 /// implicit operand, it is added to the end of the operand list. If it is
306 /// an explicit operand it is added at the end of the explicit operand list
307 /// (before the first implicit operand).
308 void addOperand(const MachineOperand &Op);
310 /// setDesc - Replace the instruction descriptor (thus opcode) of
311 /// the current instruction with a new one.
313 void setDesc(const TargetInstrDesc &tid) { TID = &tid; }
315 /// setDebugLoc - Replace current source information with new such.
316 /// Avoid using this, the constructor argument is preferable.
318 void setDebugLoc(const DebugLoc dl) { debugLoc = dl; }
320 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
321 /// fewer operand than it started with.
323 void RemoveOperand(unsigned i);
325 /// addMemOperand - Add a MachineMemOperand to the machine instruction,
326 /// referencing arbitrary storage.
327 void addMemOperand(MachineFunction &MF,
328 const MachineMemOperand &MO);
330 /// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands.
331 void clearMemOperands(MachineFunction &MF);
334 /// getRegInfo - If this instruction is embedded into a MachineFunction,
335 /// return the MachineRegisterInfo object for the current function, otherwise
337 MachineRegisterInfo *getRegInfo();
339 /// addImplicitDefUseOperands - Add all implicit def and use operands to
340 /// this instruction.
341 void addImplicitDefUseOperands();
343 /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
344 /// this instruction from their respective use lists. This requires that the
345 /// operands already be on their use lists.
346 void RemoveRegOperandsFromUseLists();
348 /// AddRegOperandsToUseLists - Add all of the register operands in
349 /// this instruction from their respective use lists. This requires that the
350 /// operands not be on their use lists yet.
351 void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo);
354 //===----------------------------------------------------------------------===//
357 inline std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI) {
362 inline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) {
367 } // End llvm namespace