1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/ilist.h"
20 #include "llvm/ADT/ilist_node.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/CodeGen/MachineOperand.h"
23 #include "llvm/CodeGen/MachineMemOperand.h"
24 #include "llvm/Target/TargetInstrDesc.h"
25 #include "llvm/Support/DebugLoc.h"
31 class TargetInstrDesc;
32 class TargetInstrInfo;
33 class TargetRegisterInfo;
34 class MachineFunction;
36 //===----------------------------------------------------------------------===//
37 /// MachineInstr - Representation of each machine instruction.
39 class MachineInstr : public ilist_node<MachineInstr> {
40 const TargetInstrDesc *TID; // Instruction descriptor.
41 unsigned short NumImplicitOps; // Number of implicit operands (which
42 // are determined at construction time).
44 std::vector<MachineOperand> Operands; // the operands
45 std::list<MachineMemOperand> MemOperands; // information on memory references
46 MachineBasicBlock *Parent; // Pointer to the owning basic block.
47 DebugLoc debugLoc; // Source line information.
49 // OperandComplete - Return true if it's illegal to add a new operand
50 bool OperandsComplete() const;
52 MachineInstr(const MachineInstr&); // DO NOT IMPLEMENT
53 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
55 // Intrusive list support
56 friend struct ilist_traits<MachineInstr>;
57 friend struct ilist_traits<MachineBasicBlock>;
58 void setParent(MachineBasicBlock *P) { Parent = P; }
60 /// MachineInstr ctor - This constructor creates a copy of the given
61 /// MachineInstr in the given MachineFunction.
62 MachineInstr(MachineFunction &, const MachineInstr &);
64 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
65 /// TID NULL and no operands.
68 // The next two constructors have DebugLoc and non-DebugLoc versions;
69 // over time, the non-DebugLoc versions should be phased out and eventually
72 /// MachineInstr ctor - This constructor create a MachineInstr and add the
73 /// implicit operands. It reserves space for number of operands specified by
74 /// TargetInstrDesc. The version with a DebugLoc should be preferred.
75 explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false);
77 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
78 /// the MachineInstr is created and added to the end of the specified basic
79 /// block. The version with a DebugLoc should be preferred.
81 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID);
83 /// MachineInstr ctor - This constructor create a MachineInstr and add the
84 /// implicit operands. It reserves space for number of operands specified by
85 /// TargetInstrDesc. An explicit DebugLoc is supplied.
86 explicit MachineInstr(const TargetInstrDesc &TID, const DebugLoc dl,
89 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
90 /// the MachineInstr is created and added to the end of the specified basic
93 MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl,
94 const TargetInstrDesc &TID);
98 // MachineInstrs are pool-allocated and owned by MachineFunction.
99 friend class MachineFunction;
102 const MachineBasicBlock* getParent() const { return Parent; }
103 MachineBasicBlock* getParent() { return Parent; }
105 /// getDebugLoc - Returns the debug location id of this MachineInstr.
107 DebugLoc getDebugLoc() const { return debugLoc; }
109 /// getDesc - Returns the target instruction descriptor of this
111 const TargetInstrDesc &getDesc() const { return *TID; }
113 /// getOpcode - Returns the opcode of this MachineInstr.
115 int getOpcode() const { return TID->Opcode; }
117 /// Access to explicit operands of the instruction.
119 unsigned getNumOperands() const { return (unsigned)Operands.size(); }
121 const MachineOperand& getOperand(unsigned i) const {
122 assert(i < getNumOperands() && "getOperand() out of range!");
125 MachineOperand& getOperand(unsigned i) {
126 assert(i < getNumOperands() && "getOperand() out of range!");
130 /// getNumExplicitOperands - Returns the number of non-implicit operands.
132 unsigned getNumExplicitOperands() const;
134 /// Access to memory operands of the instruction
135 std::list<MachineMemOperand>::iterator memoperands_begin()
136 { return MemOperands.begin(); }
137 std::list<MachineMemOperand>::iterator memoperands_end()
138 { return MemOperands.end(); }
139 std::list<MachineMemOperand>::const_iterator memoperands_begin() const
140 { return MemOperands.begin(); }
141 std::list<MachineMemOperand>::const_iterator memoperands_end() const
142 { return MemOperands.end(); }
143 bool memoperands_empty() const { return MemOperands.empty(); }
145 /// hasOneMemOperand - Return true if this instruction has exactly one
146 /// MachineMemOperand.
147 bool hasOneMemOperand() const {
148 return !memoperands_empty() &&
149 next(memoperands_begin()) == memoperands_end();
152 /// isIdenticalTo - Return true if this instruction is identical to (same
153 /// opcode and same operands as) the specified instruction.
154 bool isIdenticalTo(const MachineInstr *Other) const {
155 if (Other->getOpcode() != getOpcode() ||
156 Other->getNumOperands() != getNumOperands())
158 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
159 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
164 /// removeFromParent - This method unlinks 'this' from the containing basic
165 /// block, and returns it, but does not delete it.
166 MachineInstr *removeFromParent();
168 /// eraseFromParent - This method unlinks 'this' from the containing basic
169 /// block and deletes it.
170 void eraseFromParent();
172 /// isLabel - Returns true if the MachineInstr represents a label.
174 bool isLabel() const;
176 /// isDebugLabel - Returns true if the MachineInstr represents a debug label.
178 bool isDebugLabel() const;
180 /// readsRegister - Return true if the MachineInstr reads the specified
181 /// register. If TargetRegisterInfo is passed, then it also checks if there
182 /// is a read of a super-register.
183 bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
184 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
187 /// killsRegister - Return true if the MachineInstr kills the specified
188 /// register. If TargetRegisterInfo is passed, then it also checks if there is
189 /// a kill of a super-register.
190 bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
191 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
194 /// modifiesRegister - Return true if the MachineInstr modifies the
195 /// specified register. If TargetRegisterInfo is passed, then it also checks
196 /// if there is a def of a super-register.
197 bool modifiesRegister(unsigned Reg,
198 const TargetRegisterInfo *TRI = NULL) const {
199 return findRegisterDefOperandIdx(Reg, false, TRI) != -1;
202 /// registerDefIsDead - Returns true if the register is dead in this machine
203 /// instruction. If TargetRegisterInfo is passed, then it also checks
204 /// if there is a dead def of a super-register.
205 bool registerDefIsDead(unsigned Reg,
206 const TargetRegisterInfo *TRI = NULL) const {
207 return findRegisterDefOperandIdx(Reg, true, TRI) != -1;
210 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
211 /// the specific register or -1 if it is not found. It further tightening
212 /// the search criteria to a use that kills the register if isKill is true.
213 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
214 const TargetRegisterInfo *TRI = NULL) const;
216 /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns
217 /// a pointer to the MachineOperand rather than an index.
218 MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false,
219 const TargetRegisterInfo *TRI = NULL) {
220 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
221 return (Idx == -1) ? NULL : &getOperand(Idx);
224 /// findRegisterDefOperandIdx() - Returns the operand index that is a def of
225 /// the specified register or -1 if it is not found. If isDead is true, defs
226 /// that are not dead are skipped. If TargetRegisterInfo is non-null, then it
227 /// also checks if there is a def of a super-register.
228 int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false,
229 const TargetRegisterInfo *TRI = NULL) const;
231 /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
232 /// a pointer to the MachineOperand rather than an index.
233 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
234 const TargetRegisterInfo *TRI = NULL) {
235 int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
236 return (Idx == -1) ? NULL : &getOperand(Idx);
239 /// findFirstPredOperandIdx() - Find the index of the first operand in the
240 /// operand list that is used to represent the predicate. It returns -1 if
242 int findFirstPredOperandIdx() const;
244 /// isRegTiedToUseOperand - Given the index of a register def operand,
245 /// check if the register def is tied to a source operand, due to either
246 /// two-address elimination or inline assembly constraints. Returns the
247 /// first tied use operand index by reference is UseOpIdx is not null.
248 bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const;
250 /// isRegTiedToDefOperand - Return true if the use operand of the specified
251 /// index is tied to an def operand. It also returns the def operand index by
252 /// reference if DefOpIdx is not null.
253 bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const;
255 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
257 void copyKillDeadInfo(const MachineInstr *MI);
259 /// copyPredicates - Copies predicate operand(s) from MI.
260 void copyPredicates(const MachineInstr *MI);
262 /// addRegisterKilled - We have determined MI kills a register. Look for the
263 /// operand that uses it and mark it as IsKill. If AddIfNotFound is true,
264 /// add a implicit operand if it's not found. Returns true if the operand
265 /// exists / is added.
266 bool addRegisterKilled(unsigned IncomingReg,
267 const TargetRegisterInfo *RegInfo,
268 bool AddIfNotFound = false);
270 /// addRegisterDead - We have determined MI defined a register without a use.
271 /// Look for the operand that defines it and mark it as IsDead. If
272 /// AddIfNotFound is true, add a implicit operand if it's not found. Returns
273 /// true if the operand exists / is added.
274 bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
275 bool AddIfNotFound = false);
277 /// isSafeToMove - Return true if it is safe to move this instruction. If
278 /// SawStore is set to true, it means that there is a store (or call) between
279 /// the instruction's location and its intended destination.
280 bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore) const;
282 /// isSafeToReMat - Return true if it's safe to rematerialize the specified
283 /// instruction which defined the specified register instead of copying it.
284 bool isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg) const;
286 /// hasVolatileMemoryRef - Return true if this instruction may have a
287 /// volatile memory reference, or if the information describing the
288 /// memory reference is not available. Return false if it is known to
289 /// have no volatile memory references.
290 bool hasVolatileMemoryRef() const;
295 void print(std::ostream *OS, const TargetMachine *TM) const {
296 if (OS) print(*OS, TM);
298 void print(std::ostream &OS, const TargetMachine *TM = 0) const;
299 void print(std::ostream *OS) const { if (OS) print(*OS); }
300 void print(raw_ostream *OS, const TargetMachine *TM) const {
301 if (OS) print(*OS, TM);
303 void print(raw_ostream &OS, const TargetMachine *TM = 0) const;
304 void print(raw_ostream *OS) const { if (OS) print(*OS); }
307 //===--------------------------------------------------------------------===//
308 // Accessors used to build up machine instructions.
310 /// addOperand - Add the specified operand to the instruction. If it is an
311 /// implicit operand, it is added to the end of the operand list. If it is
312 /// an explicit operand it is added at the end of the explicit operand list
313 /// (before the first implicit operand).
314 void addOperand(const MachineOperand &Op);
316 /// setDesc - Replace the instruction descriptor (thus opcode) of
317 /// the current instruction with a new one.
319 void setDesc(const TargetInstrDesc &tid) { TID = &tid; }
321 /// setDebugLoc - Replace current source information with new such.
322 /// Avoid using this, the constructor argument is preferable.
324 void setDebugLoc(const DebugLoc dl) { debugLoc = dl; }
326 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
327 /// fewer operand than it started with.
329 void RemoveOperand(unsigned i);
331 /// addMemOperand - Add a MachineMemOperand to the machine instruction,
332 /// referencing arbitrary storage.
333 void addMemOperand(MachineFunction &MF,
334 const MachineMemOperand &MO);
336 /// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands.
337 void clearMemOperands(MachineFunction &MF);
340 /// getRegInfo - If this instruction is embedded into a MachineFunction,
341 /// return the MachineRegisterInfo object for the current function, otherwise
343 MachineRegisterInfo *getRegInfo();
345 /// addImplicitDefUseOperands - Add all implicit def and use operands to
346 /// this instruction.
347 void addImplicitDefUseOperands();
349 /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
350 /// this instruction from their respective use lists. This requires that the
351 /// operands already be on their use lists.
352 void RemoveRegOperandsFromUseLists();
354 /// AddRegOperandsToUseLists - Add all of the register operands in
355 /// this instruction from their respective use lists. This requires that the
356 /// operands not be on their use lists yet.
357 void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo);
360 //===----------------------------------------------------------------------===//
363 inline std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI) {
368 inline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) {
373 } // End llvm namespace