1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
20 #include "llvm/Support/DataTypes.h"
21 #include "llvm/Support/Streams.h"
30 class MachineBasicBlock;
31 class TargetInstrDescriptor;
35 template <typename T> struct ilist_traits;
36 template <typename T> struct ilist;
38 //===----------------------------------------------------------------------===//
39 // class MachineOperand
41 // Representation of each machine instruction operand.
43 struct MachineOperand {
44 enum MachineOperandType {
45 MO_Register, // Register operand.
46 MO_Immediate, // Immediate Operand
47 MO_MachineBasicBlock, // MachineBasicBlock reference
48 MO_FrameIndex, // Abstract Stack Frame Index
49 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
50 MO_JumpTableIndex, // Address of indexed Jump Table for switch
51 MO_ExternalSymbol, // Name of external global symbol
52 MO_GlobalAddress // Address of a global value
57 GlobalValue *GV; // For MO_GlobalAddress.
58 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
59 const char *SymbolName; // For MO_ExternalSymbol.
60 unsigned RegNo; // For MO_Register.
61 int64_t immedVal; // For MO_Immediate and MO_*Index.
64 MachineOperandType opType:8; // Discriminate the union.
65 bool IsDef : 1; // True if this is a def, false if this is a use.
66 bool IsImp : 1; // True if this is an implicit def or use.
68 bool IsKill : 1; // True if this is a reg use and the reg is dead
69 // immediately after the read.
70 bool IsDead : 1; // True if this is a reg def and the reg is dead
71 // immediately after the write. i.e. A register
72 // that is defined but never used.
74 /// offset - Offset to address of global or external, only valid for
75 /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
80 void print(std::ostream &os) const;
81 void print(std::ostream *os) const { if (os) print(*os); }
84 MachineOperand(const MachineOperand &M) {
90 static MachineOperand CreateImm(int64_t Val) {
92 Op.opType = MachineOperand::MO_Immediate;
93 Op.contents.immedVal = Val;
102 const MachineOperand &operator=(const MachineOperand &MO) {
103 contents = MO.contents;
113 /// getType - Returns the MachineOperandType for this operand.
115 MachineOperandType getType() const { return opType; }
117 /// Accessors that tell you what kind of MachineOperand you're looking at.
119 bool isReg() const { return opType == MO_Register; }
120 bool isImm() const { return opType == MO_Immediate; }
121 bool isMBB() const { return opType == MO_MachineBasicBlock; }
123 bool isRegister() const { return opType == MO_Register; }
124 bool isImmediate() const { return opType == MO_Immediate; }
125 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
126 bool isFrameIndex() const { return opType == MO_FrameIndex; }
127 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
128 bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
129 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
130 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
132 int64_t getImm() const {
133 assert(isImm() && "Wrong MachineOperand accessor");
134 return contents.immedVal;
137 int64_t getImmedValue() const {
138 assert(isImm() && "Wrong MachineOperand accessor");
139 return contents.immedVal;
141 MachineBasicBlock *getMBB() const {
142 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
145 MachineBasicBlock *getMachineBasicBlock() const {
146 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
149 void setMachineBasicBlock(MachineBasicBlock *MBB) {
150 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
153 int getFrameIndex() const {
154 assert(isFrameIndex() && "Wrong MachineOperand accessor");
155 return (int)contents.immedVal;
157 unsigned getConstantPoolIndex() const {
158 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
159 return (unsigned)contents.immedVal;
161 unsigned getJumpTableIndex() const {
162 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
163 return (unsigned)contents.immedVal;
165 GlobalValue *getGlobal() const {
166 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
169 int getOffset() const {
170 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
171 "Wrong MachineOperand accessor");
174 const char *getSymbolName() const {
175 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
176 return contents.SymbolName;
180 assert(isRegister() && "Wrong MachineOperand accessor");
184 assert(isRegister() && "Wrong MachineOperand accessor");
188 assert(isRegister() && "Wrong MachineOperand accessor");
192 assert(isRegister() && "Wrong MachineOperand accessor");
196 bool isImplicit() const {
197 assert(isRegister() && "Wrong MachineOperand accessor");
201 assert(isRegister() && "Wrong MachineOperand accessor");
205 bool isKill() const {
206 assert(isRegister() && "Wrong MachineOperand accessor");
209 bool isDead() const {
210 assert(isRegister() && "Wrong MachineOperand accessor");
214 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
218 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
222 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
226 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
230 /// getReg - Returns the register number.
232 unsigned getReg() const {
233 assert(isRegister() && "This is not a register operand!");
234 return contents.RegNo;
237 /// MachineOperand mutators.
239 void setReg(unsigned Reg) {
240 assert(isRegister() && "This is not a register operand!");
241 contents.RegNo = Reg;
244 void setImmedValue(int64_t immVal) {
245 assert(isImm() && "Wrong MachineOperand mutator");
246 contents.immedVal = immVal;
248 void setImm(int64_t immVal) {
249 assert(isImm() && "Wrong MachineOperand mutator");
250 contents.immedVal = immVal;
253 void setOffset(int Offset) {
254 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
255 isJumpTableIndex()) &&
256 "Wrong MachineOperand accessor");
259 void setConstantPoolIndex(unsigned Idx) {
260 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
261 contents.immedVal = Idx;
263 void setJumpTableIndex(unsigned Idx) {
264 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
265 contents.immedVal = Idx;
268 /// isIdenticalTo - Return true if this operand is identical to the specified
269 /// operand. Note: This method ignores isKill and isDead properties.
270 bool isIdenticalTo(const MachineOperand &Other) const;
272 /// ChangeToImmediate - Replace this operand with a new immediate operand of
273 /// the specified value. If an operand is known to be an immediate already,
274 /// the setImmedValue method should be used.
275 void ChangeToImmediate(int64_t ImmVal) {
276 opType = MO_Immediate;
277 contents.immedVal = ImmVal;
280 /// ChangeToRegister - Replace this operand with a new register operand of
281 /// the specified value. If an operand is known to be an register already,
282 /// the setReg method should be used.
283 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
284 bool isKill = false, bool isDead = false) {
285 opType = MO_Register;
286 contents.RegNo = Reg;
293 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop) {
298 friend class MachineInstr;
302 //===----------------------------------------------------------------------===//
303 /// MachineInstr - Representation of each machine instruction.
306 const TargetInstrDescriptor *TID; // Instruction descriptor.
307 unsigned short NumImplicitOps; // Number of implicit operands (which
308 // are determined at construction time).
310 std::vector<MachineOperand> Operands; // the operands
311 MachineInstr* prev, *next; // links for our intrusive list
312 MachineBasicBlock* parent; // pointer to the owning basic block
314 // OperandComplete - Return true if it's illegal to add a new operand
315 bool OperandsComplete() const;
317 MachineInstr(const MachineInstr&);
318 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
320 // Intrusive list support
322 friend struct ilist_traits<MachineInstr>;
325 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
326 /// TID NULL and no operands.
329 /// MachineInstr ctor - This constructor create a MachineInstr and add the
330 /// implicit operands. It reserves space for number of operands specified by
331 /// TargetInstrDescriptor.
332 MachineInstr(const TargetInstrDescriptor &TID);
334 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
335 /// the MachineInstr is created and added to the end of the specified basic
338 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID);
342 const MachineBasicBlock* getParent() const { return parent; }
343 MachineBasicBlock* getParent() { return parent; }
345 /// getInstrDescriptor - Returns the target instruction descriptor of this
347 const TargetInstrDescriptor *getInstrDescriptor() const { return TID; }
349 /// getOpcode - Returns the opcode of this MachineInstr.
351 const int getOpcode() const;
353 /// Access to explicit operands of the instruction.
355 unsigned getNumOperands() const { return Operands.size(); }
357 const MachineOperand& getOperand(unsigned i) const {
358 assert(i < getNumOperands() && "getOperand() out of range!");
361 MachineOperand& getOperand(unsigned i) {
362 assert(i < getNumOperands() && "getOperand() out of range!");
367 /// isIdenticalTo - Return true if this instruction is identical to (same
368 /// opcode and same operands as) the specified instruction.
369 bool isIdenticalTo(const MachineInstr *Other) const {
370 if (Other->getOpcode() != getOpcode() ||
371 Other->getNumOperands() != getNumOperands())
373 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
374 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
379 /// clone - Create a copy of 'this' instruction that is identical in
380 /// all ways except the the instruction has no parent, prev, or next.
381 MachineInstr* clone() const { return new MachineInstr(*this); }
383 /// removeFromParent - This method unlinks 'this' from the containing basic
384 /// block, and returns it, but does not delete it.
385 MachineInstr *removeFromParent();
387 /// eraseFromParent - This method unlinks 'this' from the containing basic
388 /// block and deletes it.
389 void eraseFromParent() {
390 delete removeFromParent();
393 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
394 /// the specific register or -1 if it is not found. It further tightening
395 /// the search criteria to a use that kills the register if isKill is true.
396 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false);
398 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
399 /// the specific register or NULL if it is not found.
400 MachineOperand *findRegisterDefOperand(unsigned Reg);
402 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
404 void copyKillDeadInfo(const MachineInstr *MI);
409 void print(std::ostream *OS, const TargetMachine *TM) const {
410 if (OS) print(*OS, TM);
412 void print(std::ostream &OS, const TargetMachine *TM) const;
413 void print(std::ostream &OS) const;
414 void print(std::ostream *OS) const { if (OS) print(*OS); }
416 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr){
421 //===--------------------------------------------------------------------===//
422 // Accessors to add operands when building up machine instructions.
425 /// addRegOperand - Add a register operand.
427 void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false,
428 bool IsKill = false, bool IsDead = false) {
429 MachineOperand &Op = AddNewOperand(IsImp);
430 Op.opType = MachineOperand::MO_Register;
435 Op.contents.RegNo = Reg;
439 /// addImmOperand - Add a zero extended constant argument to the
440 /// machine instruction.
442 void addImmOperand(int64_t Val) {
443 MachineOperand &Op = AddNewOperand();
444 Op.opType = MachineOperand::MO_Immediate;
445 Op.contents.immedVal = Val;
449 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
450 MachineOperand &Op = AddNewOperand();
451 Op.opType = MachineOperand::MO_MachineBasicBlock;
452 Op.contents.MBB = MBB;
456 /// addFrameIndexOperand - Add an abstract frame index to the instruction
458 void addFrameIndexOperand(unsigned Idx) {
459 MachineOperand &Op = AddNewOperand();
460 Op.opType = MachineOperand::MO_FrameIndex;
461 Op.contents.immedVal = Idx;
465 /// addConstantPoolndexOperand - Add a constant pool object index to the
468 void addConstantPoolIndexOperand(unsigned Idx, int Offset) {
469 MachineOperand &Op = AddNewOperand();
470 Op.opType = MachineOperand::MO_ConstantPoolIndex;
471 Op.contents.immedVal = Idx;
475 /// addJumpTableIndexOperand - Add a jump table object index to the
478 void addJumpTableIndexOperand(unsigned Idx) {
479 MachineOperand &Op = AddNewOperand();
480 Op.opType = MachineOperand::MO_JumpTableIndex;
481 Op.contents.immedVal = Idx;
485 void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
486 MachineOperand &Op = AddNewOperand();
487 Op.opType = MachineOperand::MO_GlobalAddress;
492 /// addExternalSymbolOperand - Add an external symbol operand to this instr
494 void addExternalSymbolOperand(const char *SymName) {
495 MachineOperand &Op = AddNewOperand();
496 Op.opType = MachineOperand::MO_ExternalSymbol;
497 Op.contents.SymbolName = SymName;
501 //===--------------------------------------------------------------------===//
502 // Accessors used to modify instructions in place.
505 /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of
506 /// the current instruction with a new one.
508 void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; }
510 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
511 /// fewer operand than it started with.
513 void RemoveOperand(unsigned i) {
514 Operands.erase(Operands.begin()+i);
517 MachineOperand &AddNewOperand(bool IsImp = false) {
518 assert((IsImp || !OperandsComplete()) &&
519 "Trying to add an operand to a machine instr that is already done!");
520 if (IsImp || NumImplicitOps == 0) { // This is true most of the time.
521 Operands.push_back(MachineOperand());
522 return Operands.back();
524 return *Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps,
528 /// addImplicitDefUseOperands - Add all implicit def and use operands to
529 /// this instruction.
530 void addImplicitDefUseOperands();
533 //===----------------------------------------------------------------------===//
536 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
537 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
539 } // End llvm namespace