1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/ilist.h"
20 #include "llvm/ADT/ilist_node.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/CodeGen/MachineOperand.h"
23 #include "llvm/CodeGen/MachineMemOperand.h"
29 class TargetInstrDesc;
30 class TargetInstrInfo;
31 class TargetRegisterInfo;
32 class MachineFunction;
34 //===----------------------------------------------------------------------===//
35 /// MachineInstr - Representation of each machine instruction.
37 class MachineInstr : public ilist_node<MachineInstr> {
38 const TargetInstrDesc *TID; // Instruction descriptor.
39 unsigned short NumImplicitOps; // Number of implicit operands (which
40 // are determined at construction time).
42 std::vector<MachineOperand> Operands; // the operands
43 std::list<MachineMemOperand> MemOperands; // information on memory references
44 MachineBasicBlock *Parent; // Pointer to the owning basic block.
46 // OperandComplete - Return true if it's illegal to add a new operand
47 bool OperandsComplete() const;
49 MachineInstr(const MachineInstr&); // DO NOT IMPLEMENT
50 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
52 // Intrusive list support
53 friend struct ilist_traits<MachineInstr>;
54 friend struct ilist_traits<MachineBasicBlock>;
55 friend struct ilist_sentinel_traits<MachineInstr>;
56 void setParent(MachineBasicBlock *P) { Parent = P; }
58 /// MachineInstr ctor - This constructor creates a copy of the given
59 /// MachineInstr in the given MachineFunction.
60 MachineInstr(MachineFunction &, const MachineInstr &);
62 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
63 /// TID NULL and no operands.
66 /// MachineInstr ctor - This constructor create a MachineInstr and add the
67 /// implicit operands. It reserves space for number of operands specified by
69 explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false);
71 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
72 /// the MachineInstr is created and added to the end of the specified basic
75 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID);
79 // MachineInstrs are pool-allocated and owned by MachineFunction.
80 friend class MachineFunction;
83 const MachineBasicBlock* getParent() const { return Parent; }
84 MachineBasicBlock* getParent() { return Parent; }
86 /// getDesc - Returns the target instruction descriptor of this
88 const TargetInstrDesc &getDesc() const { return *TID; }
90 /// getOpcode - Returns the opcode of this MachineInstr.
92 int getOpcode() const;
94 /// Access to explicit operands of the instruction.
96 unsigned getNumOperands() const { return (unsigned)Operands.size(); }
98 const MachineOperand& getOperand(unsigned i) const {
99 assert(i < getNumOperands() && "getOperand() out of range!");
102 MachineOperand& getOperand(unsigned i) {
103 assert(i < getNumOperands() && "getOperand() out of range!");
107 /// getNumExplicitOperands - Returns the number of non-implicit operands.
109 unsigned getNumExplicitOperands() const;
111 /// Access to memory operands of the instruction
112 std::list<MachineMemOperand>::iterator memoperands_begin()
113 { return MemOperands.begin(); }
114 std::list<MachineMemOperand>::iterator memoperands_end()
115 { return MemOperands.end(); }
116 std::list<MachineMemOperand>::const_iterator memoperands_begin() const
117 { return MemOperands.begin(); }
118 std::list<MachineMemOperand>::const_iterator memoperands_end() const
119 { return MemOperands.end(); }
120 bool memoperands_empty() const { return MemOperands.empty(); }
122 /// hasOneMemOperand - Return true if this instruction has exactly one
123 /// MachineMemOperand.
124 bool hasOneMemOperand() const {
125 return !memoperands_empty() &&
126 next(memoperands_begin()) == memoperands_end();
129 /// isIdenticalTo - Return true if this instruction is identical to (same
130 /// opcode and same operands as) the specified instruction.
131 bool isIdenticalTo(const MachineInstr *Other) const {
132 if (Other->getOpcode() != getOpcode() ||
133 Other->getNumOperands() != getNumOperands())
135 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
136 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
141 /// removeFromParent - This method unlinks 'this' from the containing basic
142 /// block, and returns it, but does not delete it.
143 MachineInstr *removeFromParent();
145 /// eraseFromParent - This method unlinks 'this' from the containing basic
146 /// block and deletes it.
147 void eraseFromParent();
149 /// isLabel - Returns true if the MachineInstr represents a label.
151 bool isLabel() const;
153 /// isDebugLabel - Returns true if the MachineInstr represents a debug label.
155 bool isDebugLabel() const;
157 /// readsRegister - Return true if the MachineInstr reads the specified
158 /// register. If TargetRegisterInfo is passed, then it also checks if there
159 /// is a read of a super-register.
160 bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
161 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
164 /// killsRegister - Return true if the MachineInstr kills the specified
165 /// register. If TargetRegisterInfo is passed, then it also checks if there is
166 /// a kill of a super-register.
167 bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
168 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
171 /// modifiesRegister - Return true if the MachineInstr modifies the
172 /// specified register. If TargetRegisterInfo is passed, then it also checks
173 /// if there is a def of a super-register.
174 bool modifiesRegister(unsigned Reg,
175 const TargetRegisterInfo *TRI = NULL) const {
176 return findRegisterDefOperandIdx(Reg, false, TRI) != -1;
179 /// registerDefIsDead - Returns true if the register is dead in this machine
180 /// instruction. If TargetRegisterInfo is passed, then it also checks
181 /// if there is a dead def of a super-register.
182 bool registerDefIsDead(unsigned Reg,
183 const TargetRegisterInfo *TRI = NULL) const {
184 return findRegisterDefOperandIdx(Reg, true, TRI) != -1;
187 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
188 /// the specific register or -1 if it is not found. It further tightening
189 /// the search criteria to a use that kills the register if isKill is true.
190 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
191 const TargetRegisterInfo *TRI = NULL) const;
193 /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns
194 /// a pointer to the MachineOperand rather than an index.
195 MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false,
196 const TargetRegisterInfo *TRI = NULL) {
197 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
198 return (Idx == -1) ? NULL : &getOperand(Idx);
201 /// findRegisterDefOperandIdx() - Returns the operand index that is a def of
202 /// the specified register or -1 if it is not found. If isDead is true, defs
203 /// that are not dead are skipped. If TargetRegisterInfo is non-null, then it
204 /// also checks if there is a def of a super-register.
205 int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false,
206 const TargetRegisterInfo *TRI = NULL) const;
208 /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
209 /// a pointer to the MachineOperand rather than an index.
210 MachineOperand *findRegisterDefOperand(unsigned Reg,bool isDead = false,
211 const TargetRegisterInfo *TRI = NULL) {
212 int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
213 return (Idx == -1) ? NULL : &getOperand(Idx);
216 /// findFirstPredOperandIdx() - Find the index of the first operand in the
217 /// operand list that is used to represent the predicate. It returns -1 if
219 int findFirstPredOperandIdx() const;
221 /// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
222 /// check if the register def is a re-definition due to two addr elimination.
223 bool isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const;
225 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
227 void copyKillDeadInfo(const MachineInstr *MI);
229 /// copyPredicates - Copies predicate operand(s) from MI.
230 void copyPredicates(const MachineInstr *MI);
232 /// addRegisterKilled - We have determined MI kills a register. Look for the
233 /// operand that uses it and mark it as IsKill. If AddIfNotFound is true,
234 /// add a implicit operand if it's not found. Returns true if the operand
235 /// exists / is added.
236 bool addRegisterKilled(unsigned IncomingReg,
237 const TargetRegisterInfo *RegInfo,
238 bool AddIfNotFound = false);
240 /// addRegisterDead - We have determined MI defined a register without a use.
241 /// Look for the operand that defines it and mark it as IsDead. If
242 /// AddIfNotFound is true, add a implicit operand if it's not found. Returns
243 /// true if the operand exists / is added.
244 bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
245 bool AddIfNotFound = false);
247 /// isSafeToMove - Return true if it is safe to move this instruction. If
248 /// SawStore is set to true, it means that there is a store (or call) between
249 /// the instruction's location and its intended destination.
250 bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore);
255 void print(std::ostream *OS, const TargetMachine *TM) const {
256 if (OS) print(*OS, TM);
258 void print(std::ostream &OS, const TargetMachine *TM = 0) const;
259 void print(std::ostream *OS) const { if (OS) print(*OS); }
262 //===--------------------------------------------------------------------===//
263 // Accessors used to build up machine instructions.
265 /// addOperand - Add the specified operand to the instruction. If it is an
266 /// implicit operand, it is added to the end of the operand list. If it is
267 /// an explicit operand it is added at the end of the explicit operand list
268 /// (before the first implicit operand).
269 void addOperand(const MachineOperand &Op);
271 /// setDesc - Replace the instruction descriptor (thus opcode) of
272 /// the current instruction with a new one.
274 void setDesc(const TargetInstrDesc &tid) { TID = &tid; }
276 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
277 /// fewer operand than it started with.
279 void RemoveOperand(unsigned i);
281 /// addMemOperand - Add a MachineMemOperand to the machine instruction,
282 /// referencing arbitrary storage.
283 void addMemOperand(MachineFunction &MF,
284 const MachineMemOperand &MO);
286 /// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands.
287 void clearMemOperands(MachineFunction &MF);
290 /// getRegInfo - If this instruction is embedded into a MachineFunction,
291 /// return the MachineRegisterInfo object for the current function, otherwise
293 MachineRegisterInfo *getRegInfo();
295 /// addImplicitDefUseOperands - Add all implicit def and use operands to
296 /// this instruction.
297 void addImplicitDefUseOperands();
299 /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
300 /// this instruction from their respective use lists. This requires that the
301 /// operands already be on their use lists.
302 void RemoveRegOperandsFromUseLists();
304 /// AddRegOperandsToUseLists - Add all of the register operands in
305 /// this instruction from their respective use lists. This requires that the
306 /// operands not be on their use lists yet.
307 void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo);
310 //===----------------------------------------------------------------------===//
313 inline std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI) {
318 } // End llvm namespace