1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
20 #include "llvm/Support/DataTypes.h"
28 class MachineBasicBlock;
32 template <typename T> struct ilist_traits;
33 template <typename T> struct ilist;
35 typedef short MachineOpCode;
37 //===----------------------------------------------------------------------===//
38 // class MachineOperand
41 // Representation of each machine instruction operand.
42 // This class is designed so that you can allocate a vector of operands
43 // first and initialize each one later.
45 // E.g, for this VM instruction:
46 // ptr = alloca type, numElements
47 // we generate 2 machine instructions on the SPARC:
49 // mul Constant, Numelements -> Reg
50 // add %sp, Reg -> Ptr
52 // Each instruction has 3 operands, listed above. Of those:
53 // - Reg, NumElements, and Ptr are of operand type MO_Register.
54 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
56 // For the register operands, the virtual register type is as follows:
58 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
59 // MachineInstr* minstr will point to the instruction that computes reg.
61 // - %sp will be of virtual register type MO_MachineReg.
62 // The field regNum identifies the machine register.
64 // - NumElements will be of virtual register type MO_VirtualReg.
65 // The field Value* value identifies the value.
67 // - Ptr will also be of virtual register type MO_VirtualReg.
68 // Again, the field Value* value identifies the value.
70 //===----------------------------------------------------------------------===//
72 struct MachineOperand {
74 // Bit fields of the flags variable used for different operand properties
76 DEFFLAG = 0x01, // this is a def of the operand
77 USEFLAG = 0x02, // this is a use of the operand
78 HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
79 LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
80 HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
81 LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
82 PCRELATIVE = 0x40 // Operand is relative to PC, not a global address
86 // UseType - This enum describes how the machine operand is used by
87 // the instruction. Note that the MachineInstr/Operator class
88 // currently uses bool arguments to represent this information
89 // instead of an enum. Eventually this should change over to use
90 // this _easier to read_ representation instead.
93 Use = USEFLAG, /// only read
94 Def = DEFFLAG, /// only written
95 UseAndDef = Use | Def /// read AND written
98 enum MachineOperandType {
99 MO_VirtualRegister, // virtual register for *value
100 MO_MachineRegister, // pre-assigned machine register `regNum'
102 MO_SignExtendedImmed,
105 MO_MachineBasicBlock, // MachineBasicBlock reference
106 MO_FrameIndex, // Abstract Stack Frame Index
107 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
108 MO_JumpTableIndex, // Address of indexed Jump Table for switch
109 MO_ExternalSymbol, // Name of external global symbol
110 MO_GlobalAddress // Address of a global value
115 Value* value; // BasicBlockVal for a label operand.
116 // ConstantVal for a non-address immediate.
117 // Virtual register for an SSA operand,
118 // including hidden operands required for
119 // the generated machine code.
120 // LLVM global for MO_GlobalAddress.
122 int64_t immedVal; // Constant value for an explicit constant
124 MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
125 const char *SymbolName; // For MO_ExternalSymbol type
128 char flags; // see bit field definitions above
129 MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
131 int regNum; // register number for an explicit register
132 // will be set for a value after reg allocation
134 int offset; // Offset to address of global or external, only
135 // valid for MO_GlobalAddress, MO_ExternalSym
136 // and MO_ConstantPoolIndex
139 void zeroContents () {
140 memset (&contents, 0, sizeof (contents));
141 memset (&extra, 0, sizeof (extra));
144 MachineOperand(int64_t ImmVal = 0,
145 MachineOperandType OpTy = MO_VirtualRegister, int Offset = 0)
146 : flags(0), opType(OpTy) {
148 contents.immedVal = ImmVal;
149 if (OpTy == MachineOperand::MO_ConstantPoolIndex)
150 extra.offset = Offset;
155 MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
156 : flags(UseTy), opType(OpTy) {
161 MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
162 bool isPCRelative = false)
163 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
164 assert(OpTy != MachineOperand::MO_GlobalAddress);
170 MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
171 bool isPCRelative = false, int Offset = 0)
172 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
173 assert(OpTy == MachineOperand::MO_GlobalAddress);
175 contents.value = (Value*)V;
176 extra.offset = Offset;
179 MachineOperand(MachineBasicBlock *mbb)
180 : flags(0), opType(MO_MachineBasicBlock) {
186 MachineOperand(const char *SymName, bool isPCRelative, int Offset)
187 : flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
189 contents.SymbolName = SymName;
190 extra.offset = Offset;
194 MachineOperand(const MachineOperand &M)
195 : flags(M.flags), opType(M.opType) {
197 contents = M.contents;
204 const MachineOperand &operator=(const MachineOperand &MO) {
205 contents = MO.contents;
212 /// getType - Returns the MachineOperandType for this operand.
214 MachineOperandType getType() const { return opType; }
216 /// getUseType - Returns the MachineOperandUseType of this operand.
218 UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
220 /// isPCRelative - This returns the value of the PCRELATIVE flag, which
221 /// indicates whether this operand should be emitted as a PC relative value
222 /// instead of a global address. This is used for operands of the forms:
223 /// MachineBasicBlock, GlobalAddress, ExternalSymbol
225 bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
227 /// isRegister - Return true if this operand is a register operand. The X86
228 /// backend currently can't decide whether to use MO_MR or MO_VR to represent
229 /// them, so we accept both.
231 /// Note: The sparc backend should not use this method.
233 bool isRegister() const {
234 return opType == MO_MachineRegister || opType == MO_VirtualRegister;
237 /// Accessors that tell you what kind of MachineOperand you're looking at.
239 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
240 bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
241 bool isImmediate() const {
242 return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
244 bool isFrameIndex() const { return opType == MO_FrameIndex; }
245 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
246 bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
247 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
248 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
250 /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
251 /// has one. This is deprecated and only used by the SPARC v9 backend.
253 Value* getVRegValueOrNull() const {
254 return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
255 isPCRelativeDisp()) ? contents.value : NULL;
258 /// MachineOperand accessors that only work on certain types of
259 /// MachineOperand...
261 Value* getVRegValue() const {
262 assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
263 || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
264 return contents.value;
266 int getMachineRegNum() const {
267 assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
270 int64_t getImmedValue() const {
271 assert(isImmediate() && "Wrong MachineOperand accessor");
272 return contents.immedVal;
274 MachineBasicBlock *getMachineBasicBlock() const {
275 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
278 void setMachineBasicBlock(MachineBasicBlock *MBB) {
279 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
282 int getFrameIndex() const {
283 assert(isFrameIndex() && "Wrong MachineOperand accessor");
284 return (int)contents.immedVal;
286 unsigned getConstantPoolIndex() const {
287 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
288 return (unsigned)contents.immedVal;
290 unsigned getJumpTableIndex() const {
291 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
292 return (unsigned)contents.immedVal;
294 GlobalValue *getGlobal() const {
295 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
296 return (GlobalValue*)contents.value;
298 int getOffset() const {
299 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
300 "Wrong MachineOperand accessor");
303 const char *getSymbolName() const {
304 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
305 return contents.SymbolName;
308 /// MachineOperand methods for testing that work on any kind of
309 /// MachineOperand...
311 bool isUse () const { return flags & USEFLAG; }
312 MachineOperand& setUse () { flags |= USEFLAG; return *this; }
313 bool isDef () const { return flags & DEFFLAG; }
314 MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
315 bool isHiBits32 () const { return flags & HIFLAG32; }
316 bool isLoBits32 () const { return flags & LOFLAG32; }
317 bool isHiBits64 () const { return flags & HIFLAG64; }
318 bool isLoBits64 () const { return flags & LOFLAG64; }
320 /// hasAllocatedReg - Returns true iff a machine register has been
321 /// allocated to this operand.
323 bool hasAllocatedReg() const {
324 return (extra.regNum >= 0 &&
325 (opType == MO_VirtualRegister || opType == MO_CCRegister ||
326 opType == MO_MachineRegister));
329 /// getReg - Returns the register number. It is a runtime error to call this
330 /// if a register is not allocated.
332 unsigned getReg() const {
333 assert(hasAllocatedReg());
337 /// MachineOperand mutators...
339 void setReg(unsigned Reg) {
340 // This method's comment used to say: 'TODO: get rid of this duplicate
341 // code.' It's not clear where the duplication is.
342 assert(hasAllocatedReg() && "This operand cannot have a register number!");
346 void setValueReg(Value *val) {
347 assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
348 contents.value = val;
351 void setImmedValue(int immVal) {
352 assert(isImmediate() && "Wrong MachineOperand mutator");
353 contents.immedVal = immVal;
356 void setOffset(int Offset) {
357 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
358 isJumpTableIndex()) &&
359 "Wrong MachineOperand accessor");
360 extra.offset = Offset;
363 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
365 /// markHi32, markLo32, etc. - These methods are deprecated and only used by
366 /// the SPARC v9 back-end.
368 void markHi32() { flags |= HIFLAG32; }
369 void markLo32() { flags |= LOFLAG32; }
370 void markHi64() { flags |= HIFLAG64; }
371 void markLo64() { flags |= LOFLAG64; }
374 /// setRegForValue - Replaces the Value with its corresponding physical
375 /// register after register allocation is complete. This is deprecated
376 /// and only used by the SPARC v9 back-end.
378 void setRegForValue(int reg) {
379 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
380 opType == MO_MachineRegister);
384 friend class MachineInstr;
388 //===----------------------------------------------------------------------===//
389 // class MachineInstr
392 // Representation of each machine instruction.
394 // MachineOpCode must be an enum, defined separately for each target.
395 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
397 // There are 2 kinds of operands:
399 // (1) Explicit operands of the machine instruction in vector operands[]
401 // (2) "Implicit operands" are values implicitly used or defined by the
402 // machine instruction, such as arguments to a CALL, return value of
403 // a CALL (if any), and return value of a RETURN.
404 //===----------------------------------------------------------------------===//
407 short Opcode; // the opcode
408 std::vector<MachineOperand> operands; // the operands
409 MachineInstr* prev, *next; // links for our intrusive list
410 MachineBasicBlock* parent; // pointer to the owning basic block
412 // OperandComplete - Return true if it's illegal to add a new operand
413 bool OperandsComplete() const;
415 //Constructor used by clone() method
416 MachineInstr(const MachineInstr&);
418 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
420 // Intrusive list support
422 friend struct ilist_traits<MachineInstr>;
425 MachineInstr(short Opcode, unsigned numOperands);
427 /// MachineInstr ctor - This constructor only does a _reserve_ of the
428 /// operands, not a resize for them. It is expected that if you use this that
429 /// you call add* methods below to fill up the operands, instead of the Set
430 /// methods. Eventually, the "resizing" ctors will be phased out.
432 MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
434 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
435 /// the MachineInstr is created and added to the end of the specified basic
438 MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
442 const MachineBasicBlock* getParent() const { return parent; }
443 MachineBasicBlock* getParent() { return parent; }
445 /// getOpcode - Returns the opcode of this MachineInstr.
447 const int getOpcode() const { return Opcode; }
449 /// Access to explicit operands of the instruction.
451 unsigned getNumOperands() const { return operands.size(); }
453 const MachineOperand& getOperand(unsigned i) const {
454 assert(i < getNumOperands() && "getOperand() out of range!");
457 MachineOperand& getOperand(unsigned i) {
458 assert(i < getNumOperands() && "getOperand() out of range!");
463 /// clone - Create a copy of 'this' instruction that is identical in
464 /// all ways except the the instruction has no parent, prev, or next.
465 MachineInstr* clone() const;
467 /// removeFromParent - This method unlinks 'this' from the containing basic
468 /// block, and returns it, but does not delete it.
469 MachineInstr *removeFromParent();
471 /// eraseFromParent - This method unlinks 'this' from the containing basic
472 /// block and deletes it.
473 void eraseFromParent() {
474 delete removeFromParent();
480 void print(std::ostream &OS, const TargetMachine *TM) const;
482 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
484 //===--------------------------------------------------------------------===//
485 // Accessors to add operands when building up machine instructions
488 /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
491 void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
492 assert(!OperandsComplete() &&
493 "Trying to add an operand to a machine instr that is already done!");
495 MachineOperand(V, MachineOperand::MO_VirtualRegister,
496 !isDef ? MachineOperand::Use :
497 (isDefAndUse ? MachineOperand::UseAndDef :
498 MachineOperand::Def)));
501 void addRegOperand(Value *V,
502 MachineOperand::UseType UTy = MachineOperand::Use,
503 bool isPCRelative = false) {
504 assert(!OperandsComplete() &&
505 "Trying to add an operand to a machine instr that is already done!");
506 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
510 void addCCRegOperand(Value *V,
511 MachineOperand::UseType UTy = MachineOperand::Use) {
512 assert(!OperandsComplete() &&
513 "Trying to add an operand to a machine instr that is already done!");
514 operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
519 /// addRegOperand - Add a symbolic virtual register reference...
521 void addRegOperand(int reg, bool isDef) {
522 assert(!OperandsComplete() &&
523 "Trying to add an operand to a machine instr that is already done!");
525 MachineOperand(reg, MachineOperand::MO_VirtualRegister,
526 isDef ? MachineOperand::Def : MachineOperand::Use));
529 /// addRegOperand - Add a symbolic virtual register reference...
531 void addRegOperand(int reg,
532 MachineOperand::UseType UTy = MachineOperand::Use) {
533 assert(!OperandsComplete() &&
534 "Trying to add an operand to a machine instr that is already done!");
536 MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
539 /// addPCDispOperand - Add a PC relative displacement operand to the MI
541 void addPCDispOperand(Value *V) {
542 assert(!OperandsComplete() &&
543 "Trying to add an operand to a machine instr that is already done!");
545 MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
548 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
550 void addMachineRegOperand(int reg, bool isDef) {
551 assert(!OperandsComplete() &&
552 "Trying to add an operand to a machine instr that is already done!");
554 MachineOperand(reg, MachineOperand::MO_MachineRegister,
555 isDef ? MachineOperand::Def : MachineOperand::Use));
558 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
560 void addMachineRegOperand(int reg,
561 MachineOperand::UseType UTy = MachineOperand::Use) {
562 assert(!OperandsComplete() &&
563 "Trying to add an operand to a machine instr that is already done!");
565 MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy));
568 /// addZeroExtImmOperand - Add a zero extended constant argument to the
569 /// machine instruction.
571 void addZeroExtImmOperand(int intValue) {
572 assert(!OperandsComplete() &&
573 "Trying to add an operand to a machine instr that is already done!");
575 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
578 /// addZeroExtImm64Operand - Add a zero extended 64-bit constant argument
579 /// to the machine instruction.
581 void addZeroExtImm64Operand(uint64_t intValue) {
582 assert(!OperandsComplete() &&
583 "Trying to add an operand to a machine instr that is already done!");
585 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
588 /// addSignExtImmOperand - Add a zero extended constant argument to the
589 /// machine instruction.
591 void addSignExtImmOperand(int intValue) {
592 assert(!OperandsComplete() &&
593 "Trying to add an operand to a machine instr that is already done!");
595 MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
598 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
599 assert(!OperandsComplete() &&
600 "Trying to add an operand to a machine instr that is already done!");
601 operands.push_back(MachineOperand(MBB));
604 /// addFrameIndexOperand - Add an abstract frame index to the instruction
606 void addFrameIndexOperand(unsigned Idx) {
607 assert(!OperandsComplete() &&
608 "Trying to add an operand to a machine instr that is already done!");
609 operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
612 /// addConstantPoolndexOperand - Add a constant pool object index to the
615 void addConstantPoolIndexOperand(unsigned I, int Offset=0) {
616 assert(!OperandsComplete() &&
617 "Trying to add an operand to a machine instr that is already done!");
618 operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
621 /// addJumpTableIndexOperand - Add a jump table object index to the
624 void addJumpTableIndexOperand(unsigned I) {
625 assert(!OperandsComplete() &&
626 "Trying to add an operand to a machine instr that is already done!");
627 operands.push_back(MachineOperand(I, MachineOperand::MO_JumpTableIndex));
630 void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative, int Offset) {
631 assert(!OperandsComplete() &&
632 "Trying to add an operand to a machine instr that is already done!");
634 MachineOperand(GV, MachineOperand::MO_GlobalAddress,
635 MachineOperand::Use, isPCRelative, Offset));
638 /// addExternalSymbolOperand - Add an external symbol operand to this instr
640 void addExternalSymbolOperand(const char *SymName, bool isPCRelative) {
641 operands.push_back(MachineOperand(SymName, isPCRelative, 0));
644 //===--------------------------------------------------------------------===//
645 // Accessors used to modify instructions in place.
647 // FIXME: Move this stuff to MachineOperand itself!
649 /// setOpcode - Replace the opcode of the current instruction with a new one.
651 void setOpcode(unsigned Op) { Opcode = Op; }
653 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
654 /// fewer operand than it started with.
656 void RemoveOperand(unsigned i) {
657 operands.erase(operands.begin()+i);
660 // Access to set the operands when building the machine instruction
662 void SetMachineOperandVal(unsigned i,
663 MachineOperand::MachineOperandType operandType,
666 void SetMachineOperandConst(unsigned i,
667 MachineOperand::MachineOperandType operandType,
670 void SetMachineOperandReg(unsigned i, int regNum);
673 //===----------------------------------------------------------------------===//
676 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
677 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
679 } // End llvm namespace