1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class ---------*- C++ -*--=//
3 // This file contains the declaration of the MachineInstr class, which is the
4 // basic representation for all target dependant machine instructions used by
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
10 #define LLVM_CODEGEN_MACHINEINSTR_H
12 #include "llvm/Target/MachineInstrInfo.h"
16 //---------------------------------------------------------------------------
17 // class MachineOperand
20 // Representation of each machine instruction operand.
21 // This class is designed so that you can allocate a vector of operands
22 // first and initialize each one later.
24 // E.g, for this VM instruction:
25 // ptr = alloca type, numElements
26 // we generate 2 machine instructions on the SPARC:
28 // mul Constant, Numelements -> Reg
29 // add %sp, Reg -> Ptr
31 // Each instruction has 3 operands, listed above. Of those:
32 // - Reg, NumElements, and Ptr are of operand type MO_Register.
33 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
35 // For the register operands, the virtual register type is as follows:
37 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
38 // MachineInstr* minstr will point to the instruction that computes reg.
40 // - %sp will be of virtual register type MO_MachineReg.
41 // The field regNum identifies the machine register.
43 // - NumElements will be of virtual register type MO_VirtualReg.
44 // The field Value* value identifies the value.
46 // - Ptr will also be of virtual register type MO_VirtualReg.
47 // Again, the field Value* value identifies the value.
49 //---------------------------------------------------------------------------
52 class MachineOperand {
54 enum MachineOperandType {
55 MO_VirtualRegister, // virtual register for *value
56 MO_MachineRegister, // pre-assigned machine register `regNum'
64 MachineOperandType opType;
67 Value* value; // BasicBlockVal for a label operand.
68 // ConstantVal for a non-address immediate.
69 // Virtual register for an SSA operand,
70 // including hidden operands required for
71 // the generated machine code.
72 int64_t immedVal; // constant value for an explicit constant
75 int regNum; // register number for an explicit register
76 // will be set for a value after reg allocation
77 bool isDef; // is this a defition for the value
80 /*ctor*/ MachineOperand ();
81 /*ctor*/ MachineOperand (MachineOperandType operandType,
83 /*copy ctor*/ MachineOperand (const MachineOperand&);
84 /*dtor*/ ~MachineOperand () {}
86 // Accessor methods. Caller is responsible for checking the
87 // operand type before invoking the corresponding accessor.
89 inline MachineOperandType getOperandType() const {
92 inline Value* getVRegValue () const {
93 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
94 opType == MO_PCRelativeDisp);
97 inline int getMachineRegNum() const {
98 assert(opType == MO_MachineRegister);
101 inline int64_t getImmedValue () const {
102 assert(opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed);
105 inline bool opIsDef () const {
110 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
114 // These functions are provided so that a vector of operands can be
115 // statically allocated and individual ones can be initialized later.
116 // Give class MachineInstr gets access to these functions.
118 void Initialize (MachineOperandType operandType,
120 void InitializeConst (MachineOperandType operandType,
122 void InitializeReg (int regNum,
125 friend class MachineInstr;
129 // replaces the Value with its corresponding physical register after
130 // register allocation is complete
131 void setRegForValue(int reg) {
132 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
133 opType == MO_MachineRegister);
137 // used to get the reg number if when one is allocted (must be
138 // called only after reg alloc)
139 inline int getAllocatedRegNum() const {
140 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
141 opType == MO_MachineRegister);
150 MachineOperand::MachineOperand()
151 : opType(MO_VirtualRegister),
158 MachineOperand::MachineOperand(MachineOperandType operandType,
160 : opType(operandType),
167 MachineOperand::MachineOperand(const MachineOperand& mo)
172 case MO_VirtualRegister:
173 case MO_CCRegister: value = mo.value; break;
174 case MO_MachineRegister: regNum = mo.regNum; break;
175 case MO_SignExtendedImmed:
176 case MO_UnextendedImmed:
177 case MO_PCRelativeDisp: immedVal = mo.immedVal; break;
183 MachineOperand::Initialize(MachineOperandType operandType,
186 opType = operandType;
192 MachineOperand::InitializeConst(MachineOperandType operandType,
195 opType = operandType;
202 MachineOperand::InitializeReg(int _regNum, bool isCCReg)
204 opType = isCCReg? MO_CCRegister : MO_MachineRegister;
206 regNum = (int) _regNum;
210 //---------------------------------------------------------------------------
211 // class MachineInstr
214 // Representation of each machine instruction.
216 // MachineOpCode must be an enum, defined separately for each target.
217 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
219 // opCodeMask is used to record variants of an instruction.
220 // E.g., each branch instruction on SPARC has 2 flags (i.e., 4 variants):
221 // ANNUL: if 1: Annul delay slot instruction.
222 // PREDICT-NOT-TAKEN: if 1: predict branch not taken.
223 // Instead of creating 4 different opcodes for BNZ, we create a single
224 // opcode and set bits in opCodeMask for each of these flags.
226 // There are 2 kinds of operands:
228 // (1) Explicit operands of the machine instruction in vector operands[]
230 // (2) "Implicit operands" are values implicitly used or defined by the
231 // machine instruction, such as arguments to a CALL, return value of
232 // a CALL (if any), and return value of a RETURN.
233 //---------------------------------------------------------------------------
235 class MachineInstr : public NonCopyable {
236 MachineOpCode opCode;
237 OpCodeMask opCodeMask; // extra bits for variants of an opcode
238 std::vector<MachineOperand> operands;
239 std::vector<Value*> implicitRefs; // values implicitly referenced by this
240 std::vector<bool> implicitIsDef; // machine instruction (eg, call args)
243 /*ctor*/ MachineInstr (MachineOpCode _opCode,
244 OpCodeMask _opCodeMask = 0x0);
245 /*ctor*/ MachineInstr (MachineOpCode _opCode,
246 unsigned numOperands,
247 OpCodeMask _opCodeMask = 0x0);
248 inline ~MachineInstr () {}
249 const MachineOpCode getOpCode () const { return opCode; }
252 // Information about explicit operands of the instruction
254 unsigned int getNumOperands () const { return operands.size(); }
256 bool operandIsDefined(unsigned i) const;
258 const MachineOperand& getOperand (unsigned i) const;
259 MachineOperand& getOperand (unsigned i);
262 // Information about implicit operands of the instruction
264 unsigned getNumImplicitRefs() const{return implicitRefs.size();}
266 bool implicitRefIsDefined(unsigned i) const;
268 const Value* getImplicitRef (unsigned i) const;
269 Value* getImplicitRef (unsigned i);
274 void dump (unsigned int indent = 0) const;
275 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
279 // Define iterators to access the Value operands of the Machine Instruction.
280 // begin() and end() are defined to produce these iterators...
282 template<class _MI, class _V> class ValOpIterator;
283 typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
284 typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
287 // Access to set the operands when building the machine instruction
288 void SetMachineOperandVal(unsigned i,
289 MachineOperand::MachineOperandType operandType,
290 Value* _val, bool isDef=false);
291 void SetMachineOperandConst(unsigned i,
292 MachineOperand::MachineOperandType operandType,
294 void SetMachineOperandReg(unsigned i,
299 void addImplicitRef (Value* val,
302 void setImplicitRef (unsigned i,
306 template<class MITy, class VTy>
307 class ValOpIterator : public std::forward_iterator<VTy, ptrdiff_t> {
311 inline void skipToNextVal() {
312 while (i < MI->getNumOperands() &&
313 !((MI->getOperand(i).getOperandType() == MachineOperand::MO_VirtualRegister ||
314 MI->getOperand(i).getOperandType() == MachineOperand::MO_CCRegister)
315 && MI->getOperand(i).getVRegValue() != 0))
319 inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
324 typedef ValOpIterator<MITy, VTy> _Self;
326 inline VTy operator*() const { return MI->getOperand(i).getVRegValue(); }
328 const MachineOperand &getMachineOperand() const {
329 return MI->getOperand(i);
332 inline VTy operator->() const { return operator*(); }
334 inline bool isDef() const { return MI->getOperand(i).opIsDef(); }
336 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
337 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
339 inline bool operator==(const _Self &y) const {
342 inline bool operator!=(const _Self &y) const {
343 return !operator==(y);
346 static _Self begin(MITy MI) {
349 static _Self end(MITy MI) {
350 return _Self(MI, MI->getNumOperands());
354 // define begin() and end()
355 val_op_iterator begin() { return val_op_iterator::begin(this); }
356 val_op_iterator end() { return val_op_iterator::end(this); }
358 const_val_op_iterator begin() const {
359 return const_val_op_iterator::begin(this);
361 const_val_op_iterator end() const {
362 return const_val_op_iterator::end(this);
367 inline MachineOperand&
368 MachineInstr::getOperand(unsigned int i)
370 assert(i < operands.size() && "getOperand() out of range!");
374 inline const MachineOperand&
375 MachineInstr::getOperand(unsigned int i) const
377 assert(i < operands.size() && "getOperand() out of range!");
382 MachineInstr::operandIsDefined(unsigned int i) const
384 return getOperand(i).opIsDef();
388 MachineInstr::implicitRefIsDefined(unsigned int i) const
390 assert(i < implicitIsDef.size() && "operand out of range!");
391 return implicitIsDef[i];
395 MachineInstr::getImplicitRef(unsigned int i) const
397 assert(i < implicitRefs.size() && "getImplicitRef() out of range!");
398 return implicitRefs[i];
402 MachineInstr::getImplicitRef(unsigned int i)
404 assert(i < implicitRefs.size() && "getImplicitRef() out of range!");
405 return implicitRefs[i];
409 MachineInstr::addImplicitRef(Value* val,
412 implicitRefs.push_back(val);
413 implicitIsDef.push_back(isDef);
417 MachineInstr::setImplicitRef(unsigned int i,
421 assert(i < implicitRefs.size() && "setImplicitRef() out of range!");
422 implicitRefs[i] = val;
423 implicitIsDef[i] = isDef;
428 //---------------------------------------------------------------------------
429 // class MachineCodeForBasicBlock
432 // Representation of the sequence of machine instructions created
433 // for a basic block.
434 //---------------------------------------------------------------------------
437 class MachineCodeForBasicBlock {
438 std::vector<MachineInstr*> Insts;
440 ~MachineCodeForBasicBlock() {
442 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
447 typedef std::vector<MachineInstr*>::iterator iterator;
448 typedef std::vector<MachineInstr*>::const_iterator const_iterator;
449 typedef std::reverse_iterator<const_iterator> const_reverse_iterator;
450 typedef std::reverse_iterator<iterator> reverse_iterator;
452 unsigned size() const { return Insts.size(); }
453 bool empty() const { return Insts.empty(); }
455 MachineInstr * operator[](unsigned i) const { return Insts[i]; }
456 MachineInstr *&operator[](unsigned i) { return Insts[i]; }
458 MachineInstr *front() const { return Insts.front(); }
459 MachineInstr *back() const { return Insts.back(); }
461 iterator begin() { return Insts.begin(); }
462 const_iterator begin() const { return Insts.begin(); }
463 iterator end() { return Insts.end(); }
464 const_iterator end() const { return Insts.end(); }
465 reverse_iterator rbegin() { return Insts.rbegin(); }
466 const_reverse_iterator rbegin() const { return Insts.rbegin(); }
467 reverse_iterator rend () { return Insts.rend(); }
468 const_reverse_iterator rend () const { return Insts.rend(); }
470 void push_back(MachineInstr *MI) { Insts.push_back(MI); }
471 template<typename IT>
472 void insert(iterator I, IT S, IT E) { Insts.insert(I, S, E); }
473 iterator insert(iterator I, MachineInstr *M) { return Insts.insert(I, M); }
475 // erase - Remove the specified range from the instruction list. This does
476 // not delete in instructions removed.
478 iterator erase(iterator I, iterator E) { return Insts.erase(I, E); }
480 MachineInstr *pop_back() {
481 MachineInstr *R = back();
488 //---------------------------------------------------------------------------
490 //---------------------------------------------------------------------------
493 std::ostream& operator<< (std::ostream& os, const MachineInstr& minstr);
496 std::ostream& operator<< (std::ostream& os, const MachineOperand& mop);
499 void PrintMachineInstructions(const Function *F);