1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/CodeGen/MachineOperand.h"
20 #include "llvm/CodeGen/MemOperand.h"
24 class TargetInstrDesc;
25 class TargetRegisterInfo;
27 template <typename T> struct ilist_traits;
28 template <typename T> struct ilist;
30 //===----------------------------------------------------------------------===//
31 /// MachineInstr - Representation of each machine instruction.
34 const TargetInstrDesc *TID; // Instruction descriptor.
35 unsigned short NumImplicitOps; // Number of implicit operands (which
36 // are determined at construction time).
38 std::vector<MachineOperand> Operands; // the operands
39 std::vector<MemOperand> MemOperands; // information on memory references
40 MachineInstr *Prev, *Next; // Links for MBB's intrusive list.
41 MachineBasicBlock *Parent; // Pointer to the owning basic block.
43 // OperandComplete - Return true if it's illegal to add a new operand
44 bool OperandsComplete() const;
46 MachineInstr(const MachineInstr&);
47 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
49 // Intrusive list support
50 friend struct ilist_traits<MachineInstr>;
51 friend struct ilist_traits<MachineBasicBlock>;
52 void setParent(MachineBasicBlock *P) { Parent = P; }
54 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
55 /// TID NULL and no operands.
58 /// MachineInstr ctor - This constructor create a MachineInstr and add the
59 /// implicit operands. It reserves space for number of operands specified by
61 explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false);
63 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
64 /// the MachineInstr is created and added to the end of the specified basic
67 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID);
71 const MachineBasicBlock* getParent() const { return Parent; }
72 MachineBasicBlock* getParent() { return Parent; }
74 /// getDesc - Returns the target instruction descriptor of this
76 const TargetInstrDesc &getDesc() const { return *TID; }
78 /// getOpcode - Returns the opcode of this MachineInstr.
80 int getOpcode() const;
82 /// Access to explicit operands of the instruction.
84 unsigned getNumOperands() const { return Operands.size(); }
86 const MachineOperand& getOperand(unsigned i) const {
87 assert(i < getNumOperands() && "getOperand() out of range!");
90 MachineOperand& getOperand(unsigned i) {
91 assert(i < getNumOperands() && "getOperand() out of range!");
95 /// getNumExplicitOperands - Returns the number of non-implicit operands.
97 unsigned getNumExplicitOperands() const;
99 /// Access to memory operands of the instruction
100 unsigned getNumMemOperands() const { return MemOperands.size(); }
102 const MemOperand& getMemOperand(unsigned i) const {
103 assert(i < getNumMemOperands() && "getMemOperand() out of range!");
104 return MemOperands[i];
106 MemOperand& getMemOperand(unsigned i) {
107 assert(i < getNumMemOperands() && "getMemOperand() out of range!");
108 return MemOperands[i];
111 /// isIdenticalTo - Return true if this instruction is identical to (same
112 /// opcode and same operands as) the specified instruction.
113 bool isIdenticalTo(const MachineInstr *Other) const {
114 if (Other->getOpcode() != getOpcode() ||
115 Other->getNumOperands() != getNumOperands())
117 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
118 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
123 /// clone - Create a copy of 'this' instruction that is identical in
124 /// all ways except the the instruction has no parent, prev, or next.
125 MachineInstr* clone() const { return new MachineInstr(*this); }
127 /// removeFromParent - This method unlinks 'this' from the containing basic
128 /// block, and returns it, but does not delete it.
129 MachineInstr *removeFromParent();
131 /// eraseFromParent - This method unlinks 'this' from the containing basic
132 /// block and deletes it.
133 void eraseFromParent() {
134 delete removeFromParent();
137 /// isDebugLabel - Returns true if the MachineInstr represents a debug label.
139 bool isDebugLabel() const;
141 /// readsRegister - Return true if the MachineInstr reads the specified
142 /// register. If TargetRegisterInfo is passed, then it also checks if there
143 /// is a read of a super-register.
144 bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
145 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
148 /// killsRegister - Return true if the MachineInstr kills the specified
149 /// register. If TargetRegisterInfo is passed, then it also checks if there is
150 /// a kill of a super-register.
151 bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
152 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
155 /// modifiesRegister - Return true if the MachineInstr modifies the
156 /// specified register. If TargetRegisterInfo is passed, then it also checks
157 /// if there is a def of a super-register.
158 bool modifiesRegister(unsigned Reg,
159 const TargetRegisterInfo *TRI = NULL) const {
160 return findRegisterDefOperandIdx(Reg, false, TRI) != -1;
163 /// registerDefIsDead - Returns true if the register is dead in this machine
164 /// instruction. If TargetRegisterInfo is passed, then it also checks
165 /// if there is a dead def of a super-register.
166 bool registerDefIsDead(unsigned Reg,
167 const TargetRegisterInfo *TRI = NULL) const {
168 return findRegisterDefOperandIdx(Reg, true, TRI) != -1;
171 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
172 /// the specific register or -1 if it is not found. It further tightening
173 /// the search criteria to a use that kills the register if isKill is true.
174 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
175 const TargetRegisterInfo *TRI = NULL) const;
177 /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns
178 /// a pointer to the MachineOperand rather than an index.
179 MachineOperand *findRegisterUseOperand(unsigned Reg,bool isKill = false,
180 const TargetRegisterInfo *TRI = NULL) {
181 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
182 return (Idx == -1) ? NULL : &getOperand(Idx);
185 /// findRegisterDefOperandIdx() - Returns the operand index that is a def of
186 /// the specific register or -1 if it is not found. It further tightening
187 /// the search criteria to a def that is dead the register if isDead is true.
188 /// If TargetRegisterInfo is passed, then it also checks if there is a def of
189 /// a super-register.
190 int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false,
191 const TargetRegisterInfo *TRI = NULL) const;
193 /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
194 /// a pointer to the MachineOperand rather than an index.
195 MachineOperand *findRegisterDefOperand(unsigned Reg,bool isDead = false,
196 const TargetRegisterInfo *TRI = NULL) {
197 int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
198 return (Idx == -1) ? NULL : &getOperand(Idx);
201 /// findFirstPredOperandIdx() - Find the index of the first operand in the
202 /// operand list that is used to represent the predicate. It returns -1 if
204 int findFirstPredOperandIdx() const;
206 /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
207 /// to two addr elimination.
208 bool isRegReDefinedByTwoAddr(unsigned Reg) const;
210 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
212 void copyKillDeadInfo(const MachineInstr *MI);
214 /// copyPredicates - Copies predicate operand(s) from MI.
215 void copyPredicates(const MachineInstr *MI);
217 /// addRegisterKilled - We have determined MI kills a register. Look for the
218 /// operand that uses it and mark it as IsKill. If AddIfNotFound is true,
219 /// add a implicit operand if it's not found. Returns true if the operand
220 /// exists / is added.
221 bool addRegisterKilled(unsigned IncomingReg,
222 const TargetRegisterInfo *RegInfo,
223 bool AddIfNotFound = false);
225 /// addRegisterDead - We have determined MI defined a register without a use.
226 /// Look for the operand that defines it and mark it as IsDead. If
227 /// AddIfNotFound is true, add a implicit operand if it's not found. Returns
228 /// true if the operand exists / is added.
229 bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
230 bool AddIfNotFound = false);
232 /// copyKillDeadInfo - copies killed/dead information from one instr to another
233 void copyKillDeadInfo(MachineInstr *OldMI,
234 const TargetRegisterInfo *RegInfo);
239 void print(std::ostream *OS, const TargetMachine *TM) const {
240 if (OS) print(*OS, TM);
242 void print(std::ostream &OS, const TargetMachine *TM = 0) const;
243 void print(std::ostream *OS) const { if (OS) print(*OS); }
246 //===--------------------------------------------------------------------===//
247 // Accessors used to build up machine instructions.
249 /// addOperand - Add the specified operand to the instruction. If it is an
250 /// implicit operand, it is added to the end of the operand list. If it is
251 /// an explicit operand it is added at the end of the explicit operand list
252 /// (before the first implicit operand).
253 void addOperand(const MachineOperand &Op);
255 /// setDesc - Replace the instruction descriptor (thus opcode) of
256 /// the current instruction with a new one.
258 void setDesc(const TargetInstrDesc &tid) { TID = &tid; }
260 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
261 /// fewer operand than it started with.
263 void RemoveOperand(unsigned i);
265 /// addMemOperand - Add a MemOperand to the machine instruction, referencing
266 /// arbitrary storage.
267 void addMemOperand(const MemOperand &MO) {
268 MemOperands.push_back(MO);
272 /// getRegInfo - If this instruction is embedded into a MachineFunction,
273 /// return the MachineRegisterInfo object for the current function, otherwise
275 MachineRegisterInfo *getRegInfo();
277 /// addImplicitDefUseOperands - Add all implicit def and use operands to
278 /// this instruction.
279 void addImplicitDefUseOperands();
281 /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
282 /// this instruction from their respective use lists. This requires that the
283 /// operands already be on their use lists.
284 void RemoveRegOperandsFromUseLists();
286 /// AddRegOperandsToUseLists - Add all of the register operands in
287 /// this instruction from their respective use lists. This requires that the
288 /// operands not be on their use lists yet.
289 void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo);
292 //===----------------------------------------------------------------------===//
295 inline std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI) {
300 } // End llvm namespace