1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
20 #include "llvm/Support/DataTypes.h"
28 class MachineBasicBlock;
32 template <typename T> struct ilist_traits;
33 template <typename T> struct ilist;
35 typedef short MachineOpCode;
37 //===----------------------------------------------------------------------===//
38 // class MachineOperand
41 // Representation of each machine instruction operand.
42 // This class is designed so that you can allocate a vector of operands
43 // first and initialize each one later.
45 // E.g, for this VM instruction:
46 // ptr = alloca type, numElements
47 // we generate 2 machine instructions on the SPARC:
49 // mul Constant, Numelements -> Reg
50 // add %sp, Reg -> Ptr
52 // Each instruction has 3 operands, listed above. Of those:
53 // - Reg, NumElements, and Ptr are of operand type MO_Register.
54 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
56 // For the register operands, the virtual register type is as follows:
58 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
59 // MachineInstr* minstr will point to the instruction that computes reg.
61 // - %sp will be of virtual register type MO_MachineReg.
62 // The field regNum identifies the machine register.
64 // - NumElements will be of virtual register type MO_VirtualReg.
65 // The field Value* value identifies the value.
67 // - Ptr will also be of virtual register type MO_VirtualReg.
68 // Again, the field Value* value identifies the value.
70 //===----------------------------------------------------------------------===//
72 struct MachineOperand {
74 // Bit fields of the flags variable used for different operand properties
76 DEFFLAG = 0x01, // this is a def of the operand
77 USEFLAG = 0x02, // this is a use of the operand
78 HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
79 LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
80 HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
81 LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
82 PCRELATIVE = 0x40, // Operand is relative to PC, not a global address
86 // UseType - This enum describes how the machine operand is used by
87 // the instruction. Note that the MachineInstr/Operator class
88 // currently uses bool arguments to represent this information
89 // instead of an enum. Eventually this should change over to use
90 // this _easier to read_ representation instead.
93 Use = USEFLAG, /// only read
94 Def = DEFFLAG, /// only written
95 UseAndDef = Use | Def /// read AND written
98 enum MachineOperandType {
99 MO_VirtualRegister, // virtual register for *value
100 MO_MachineRegister, // pre-assigned machine register `regNum'
102 MO_SignExtendedImmed,
105 MO_MachineBasicBlock, // MachineBasicBlock reference
106 MO_FrameIndex, // Abstract Stack Frame Index
107 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
108 MO_ExternalSymbol, // Name of external global symbol
109 MO_GlobalAddress, // Address of a global value
114 Value* value; // BasicBlockVal for a label operand.
115 // ConstantVal for a non-address immediate.
116 // Virtual register for an SSA operand,
117 // including hidden operands required for
118 // the generated machine code.
119 // LLVM global for MO_GlobalAddress.
121 int64_t immedVal; // Constant value for an explicit constant
123 MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
124 const char *SymbolName; // For MO_ExternalSymbol type
127 char flags; // see bit field definitions above
128 MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
130 int regNum; // register number for an explicit register
131 // will be set for a value after reg allocation
133 int offset; // Offset to address of global or external, only
134 // valid for MO_GlobalAddress and MO_ExternalSym
137 void zeroContents () {
138 memset (&contents, 0, sizeof (contents));
139 memset (&extra, 0, sizeof (extra));
142 MachineOperand(int64_t ImmVal = 0,
143 MachineOperandType OpTy = MO_VirtualRegister)
144 : flags(0), opType(OpTy) {
146 contents.immedVal = ImmVal;
150 MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
151 : flags(UseTy), opType(OpTy) {
156 MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
157 bool isPCRelative = false)
158 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
159 assert(OpTy != MachineOperand::MO_GlobalAddress);
165 MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
166 bool isPCRelative = false, int Offset = 0)
167 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
168 assert(OpTy == MachineOperand::MO_GlobalAddress);
170 contents.value = (Value*)V;
171 extra.offset = Offset;
174 MachineOperand(MachineBasicBlock *mbb)
175 : flags(0), opType(MO_MachineBasicBlock) {
181 MachineOperand(const char *SymName, bool isPCRelative, int Offset)
182 : flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
184 contents.SymbolName = SymName;
185 extra.offset = Offset;
189 MachineOperand(const MachineOperand &M)
190 : flags(M.flags), opType(M.opType) {
192 contents = M.contents;
199 const MachineOperand &operator=(const MachineOperand &MO) {
200 contents = MO.contents;
207 /// getType - Returns the MachineOperandType for this operand.
209 MachineOperandType getType() const { return opType; }
211 /// getUseType - Returns the MachineOperandUseType of this operand.
213 UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
215 /// isPCRelative - This returns the value of the PCRELATIVE flag, which
216 /// indicates whether this operand should be emitted as a PC relative value
217 /// instead of a global address. This is used for operands of the forms:
218 /// MachineBasicBlock, GlobalAddress, ExternalSymbol
220 bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
222 /// isRegister - Return true if this operand is a register operand. The X86
223 /// backend currently can't decide whether to use MO_MR or MO_VR to represent
224 /// them, so we accept both.
226 /// Note: The sparc backend should not use this method.
228 bool isRegister() const {
229 return opType == MO_MachineRegister || opType == MO_VirtualRegister;
232 /// Accessors that tell you what kind of MachineOperand you're looking at.
234 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
235 bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
236 bool isImmediate() const {
237 return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
239 bool isFrameIndex() const { return opType == MO_FrameIndex; }
240 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
241 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
242 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
244 /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
245 /// has one. This is deprecated and only used by the SPARC v9 backend.
247 Value* getVRegValueOrNull() const {
248 return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
249 isPCRelativeDisp()) ? contents.value : NULL;
252 /// MachineOperand accessors that only work on certain types of
253 /// MachineOperand...
255 Value* getVRegValue() const {
256 assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
257 || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
258 return contents.value;
260 int getMachineRegNum() const {
261 assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
264 int64_t getImmedValue() const {
265 assert(isImmediate() && "Wrong MachineOperand accessor");
266 return contents.immedVal;
268 MachineBasicBlock *getMachineBasicBlock() const {
269 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
272 void setMachineBasicBlock(MachineBasicBlock *MBB) {
273 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
276 int getFrameIndex() const {
277 assert(isFrameIndex() && "Wrong MachineOperand accessor");
278 return (int)contents.immedVal;
280 unsigned getConstantPoolIndex() const {
281 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
282 return (unsigned)contents.immedVal;
284 GlobalValue *getGlobal() const {
285 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
286 return (GlobalValue*)contents.value;
288 int getOffset() const {
289 assert((isGlobalAddress() || isExternalSymbol()) &&
290 "Wrong MachineOperand accessor");
293 const char *getSymbolName() const {
294 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
295 return contents.SymbolName;
298 /// MachineOperand methods for testing that work on any kind of
299 /// MachineOperand...
301 bool isUse () const { return flags & USEFLAG; }
302 MachineOperand& setUse () { flags |= USEFLAG; return *this; }
303 bool isDef () const { return flags & DEFFLAG; }
304 MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
305 bool isHiBits32 () const { return flags & HIFLAG32; }
306 bool isLoBits32 () const { return flags & LOFLAG32; }
307 bool isHiBits64 () const { return flags & HIFLAG64; }
308 bool isLoBits64 () const { return flags & LOFLAG64; }
310 /// hasAllocatedReg - Returns true iff a machine register has been
311 /// allocated to this operand.
313 bool hasAllocatedReg() const {
314 return (extra.regNum >= 0 &&
315 (opType == MO_VirtualRegister || opType == MO_CCRegister ||
316 opType == MO_MachineRegister));
319 /// getReg - Returns the register number. It is a runtime error to call this
320 /// if a register is not allocated.
322 unsigned getReg() const {
323 assert(hasAllocatedReg());
327 /// MachineOperand mutators...
329 void setReg(unsigned Reg) {
330 // This method's comment used to say: 'TODO: get rid of this duplicate
331 // code.' It's not clear where the duplication is.
332 assert(hasAllocatedReg() && "This operand cannot have a register number!");
336 void setValueReg(Value *val) {
337 assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
338 contents.value = val;
341 void setImmedValue(int immVal) {
342 assert(isImmediate() && "Wrong MachineOperand mutator");
343 contents.immedVal = immVal;
346 void setOffset(int Offset) {
347 assert((isGlobalAddress() || isExternalSymbol()) &&
348 "Wrong MachineOperand accessor");
349 extra.offset = Offset;
352 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
354 /// markHi32, markLo32, etc. - These methods are deprecated and only used by
355 /// the SPARC v9 back-end.
357 void markHi32() { flags |= HIFLAG32; }
358 void markLo32() { flags |= LOFLAG32; }
359 void markHi64() { flags |= HIFLAG64; }
360 void markLo64() { flags |= LOFLAG64; }
363 /// setRegForValue - Replaces the Value with its corresponding physical
364 /// register after register allocation is complete. This is deprecated
365 /// and only used by the SPARC v9 back-end.
367 void setRegForValue(int reg) {
368 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
369 opType == MO_MachineRegister);
373 friend class MachineInstr;
377 //===----------------------------------------------------------------------===//
378 // class MachineInstr
381 // Representation of each machine instruction.
383 // MachineOpCode must be an enum, defined separately for each target.
384 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
386 // There are 2 kinds of operands:
388 // (1) Explicit operands of the machine instruction in vector operands[]
390 // (2) "Implicit operands" are values implicitly used or defined by the
391 // machine instruction, such as arguments to a CALL, return value of
392 // a CALL (if any), and return value of a RETURN.
393 //===----------------------------------------------------------------------===//
396 short Opcode; // the opcode
397 unsigned char numImplicitRefs; // number of implicit operands
398 std::vector<MachineOperand> operands; // the operands
399 MachineInstr* prev, *next; // links for our intrusive list
400 MachineBasicBlock* parent; // pointer to the owning basic block
402 // OperandComplete - Return true if it's illegal to add a new operand
403 bool OperandsComplete() const;
405 //Constructor used by clone() method
406 MachineInstr(const MachineInstr&);
408 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
410 // Intrusive list support
412 friend struct ilist_traits<MachineInstr>;
415 MachineInstr(short Opcode, unsigned numOperands);
417 /// MachineInstr ctor - This constructor only does a _reserve_ of the
418 /// operands, not a resize for them. It is expected that if you use this that
419 /// you call add* methods below to fill up the operands, instead of the Set
420 /// methods. Eventually, the "resizing" ctors will be phased out.
422 MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
424 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
425 /// the MachineInstr is created and added to the end of the specified basic
428 MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
432 const MachineBasicBlock* getParent() const { return parent; }
433 MachineBasicBlock* getParent() { return parent; }
435 /// getOpcode - Returns the opcode of this MachineInstr.
437 const int getOpcode() const { return Opcode; }
439 /// Access to explicit operands of the instruction.
441 unsigned getNumOperands() const { return operands.size() - numImplicitRefs; }
443 const MachineOperand& getOperand(unsigned i) const {
444 assert(i < getNumOperands() && "getOperand() out of range!");
447 MachineOperand& getOperand(unsigned i) {
448 assert(i < getNumOperands() && "getOperand() out of range!");
453 // Access to explicit or implicit operands of the instruction
454 // This returns the i'th entry in the operand vector.
455 // That represents the i'th explicit operand or the (i-N)'th implicit operand,
456 // depending on whether i < N or i >= N.
458 const MachineOperand& getExplOrImplOperand(unsigned i) const {
459 assert(i < operands.size() && "getExplOrImplOperand() out of range!");
460 return (i < getNumOperands()? getOperand(i)
461 : getImplicitOp(i - getNumOperands()));
465 // Access to implicit operands of the instruction
467 unsigned getNumImplicitRefs() const{ return numImplicitRefs; }
469 MachineOperand& getImplicitOp(unsigned i) {
470 assert(i < numImplicitRefs && "implicit ref# out of range!");
471 return operands[i + operands.size() - numImplicitRefs];
473 const MachineOperand& getImplicitOp(unsigned i) const {
474 assert(i < numImplicitRefs && "implicit ref# out of range!");
475 return operands[i + operands.size() - numImplicitRefs];
478 Value* getImplicitRef(unsigned i) {
479 return getImplicitOp(i).getVRegValue();
481 const Value* getImplicitRef(unsigned i) const {
482 return getImplicitOp(i).getVRegValue();
485 void addImplicitRef(Value* V, bool isDef = false, bool isDefAndUse = false) {
487 addRegOperand(V, isDef, isDefAndUse);
489 void setImplicitRef(unsigned i, Value* V) {
490 assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!");
491 SetMachineOperandVal(i + getNumOperands(),
492 MachineOperand::MO_VirtualRegister, V);
495 /// clone - Create a copy of 'this' instruction that is identical in
496 /// all ways except the the instruction has no parent, prev, or next.
497 MachineInstr* clone() const;
502 void print(std::ostream &OS, const TargetMachine *TM) const;
504 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
507 // Define iterators to access the Value operands of the Machine Instruction.
508 // Note that these iterators only enumerate the explicit operands.
509 // begin() and end() are defined to produce these iterators...
511 template<class _MI, class _V> class ValOpIterator;
512 typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
513 typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
516 //===--------------------------------------------------------------------===//
517 // Accessors to add operands when building up machine instructions
520 /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
523 void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
524 assert(!OperandsComplete() &&
525 "Trying to add an operand to a machine instr that is already done!");
527 MachineOperand(V, MachineOperand::MO_VirtualRegister,
528 !isDef ? MachineOperand::Use :
529 (isDefAndUse ? MachineOperand::UseAndDef :
530 MachineOperand::Def)));
533 void addRegOperand(Value *V,
534 MachineOperand::UseType UTy = MachineOperand::Use,
535 bool isPCRelative = false) {
536 assert(!OperandsComplete() &&
537 "Trying to add an operand to a machine instr that is already done!");
538 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
542 void addCCRegOperand(Value *V,
543 MachineOperand::UseType UTy = MachineOperand::Use) {
544 assert(!OperandsComplete() &&
545 "Trying to add an operand to a machine instr that is already done!");
546 operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
551 /// addRegOperand - Add a symbolic virtual register reference...
553 void addRegOperand(int reg, bool isDef) {
554 assert(!OperandsComplete() &&
555 "Trying to add an operand to a machine instr that is already done!");
557 MachineOperand(reg, MachineOperand::MO_VirtualRegister,
558 isDef ? MachineOperand::Def : MachineOperand::Use));
561 /// addRegOperand - Add a symbolic virtual register reference...
563 void addRegOperand(int reg,
564 MachineOperand::UseType UTy = MachineOperand::Use) {
565 assert(!OperandsComplete() &&
566 "Trying to add an operand to a machine instr that is already done!");
568 MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
571 /// addPCDispOperand - Add a PC relative displacement operand to the MI
573 void addPCDispOperand(Value *V) {
574 assert(!OperandsComplete() &&
575 "Trying to add an operand to a machine instr that is already done!");
577 MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
580 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
582 void addMachineRegOperand(int reg, bool isDef) {
583 assert(!OperandsComplete() &&
584 "Trying to add an operand to a machine instr that is already done!");
586 MachineOperand(reg, MachineOperand::MO_MachineRegister,
587 isDef ? MachineOperand::Def : MachineOperand::Use));
590 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
592 void addMachineRegOperand(int reg,
593 MachineOperand::UseType UTy = MachineOperand::Use) {
594 assert(!OperandsComplete() &&
595 "Trying to add an operand to a machine instr that is already done!");
597 MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy));
600 /// addZeroExtImmOperand - Add a zero extended constant argument to the
601 /// machine instruction.
603 void addZeroExtImmOperand(int intValue) {
604 assert(!OperandsComplete() &&
605 "Trying to add an operand to a machine instr that is already done!");
607 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
610 /// addZeroExtImm64Operand - Add a zero extended 64-bit constant argument
611 /// to the machine instruction.
613 void addZeroExtImm64Operand(uint64_t intValue) {
614 assert(!OperandsComplete() &&
615 "Trying to add an operand to a machine instr that is already done!");
617 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
620 /// addSignExtImmOperand - Add a zero extended constant argument to the
621 /// machine instruction.
623 void addSignExtImmOperand(int intValue) {
624 assert(!OperandsComplete() &&
625 "Trying to add an operand to a machine instr that is already done!");
627 MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
630 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
631 assert(!OperandsComplete() &&
632 "Trying to add an operand to a machine instr that is already done!");
633 operands.push_back(MachineOperand(MBB));
636 /// addFrameIndexOperand - Add an abstract frame index to the instruction
638 void addFrameIndexOperand(unsigned Idx) {
639 assert(!OperandsComplete() &&
640 "Trying to add an operand to a machine instr that is already done!");
641 operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
644 /// addConstantPoolndexOperand - Add a constant pool object index to the
647 void addConstantPoolIndexOperand(unsigned I) {
648 assert(!OperandsComplete() &&
649 "Trying to add an operand to a machine instr that is already done!");
650 operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
653 void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative, int Offset) {
654 assert(!OperandsComplete() &&
655 "Trying to add an operand to a machine instr that is already done!");
657 MachineOperand(GV, MachineOperand::MO_GlobalAddress,
658 MachineOperand::Use, isPCRelative, Offset));
661 /// addExternalSymbolOperand - Add an external symbol operand to this instr
663 void addExternalSymbolOperand(const char *SymName, bool isPCRelative) {
664 operands.push_back(MachineOperand(SymName, isPCRelative, 0));
667 //===--------------------------------------------------------------------===//
668 // Accessors used to modify instructions in place.
670 // FIXME: Move this stuff to MachineOperand itself!
672 /// replace - Support to rewrite a machine instruction in place: for now,
673 /// simply replace() and then set new operands with Set.*Operand methods
676 void replace(short Opcode, unsigned numOperands);
678 /// setOpcode - Replace the opcode of the current instruction with a new one.
680 void setOpcode(unsigned Op) { Opcode = Op; }
682 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
683 /// fewer operand than it started with.
685 void RemoveOperand(unsigned i) {
686 operands.erase(operands.begin()+i);
689 // Access to set the operands when building the machine instruction
691 void SetMachineOperandVal(unsigned i,
692 MachineOperand::MachineOperandType operandType,
695 void SetMachineOperandConst(unsigned i,
696 MachineOperand::MachineOperandType operandType,
699 void SetMachineOperandReg(unsigned i, int regNum);
702 unsigned substituteValue(const Value* oldVal, Value* newVal,
703 bool defsOnly, bool notDefsAndUses,
704 bool& someArgsWereIgnored);
706 // SetRegForOperand -
707 // SetRegForImplicitRef -
708 // Mark an explicit or implicit operand with its allocated physical register.
710 void SetRegForOperand(unsigned i, int regNum);
711 void SetRegForImplicitRef(unsigned i, int regNum);
714 // Iterator to enumerate machine operands.
716 template<class MITy, class VTy>
717 class ValOpIterator : public forward_iterator<VTy, ptrdiff_t> {
721 void skipToNextVal() {
722 while (i < MI->getNumOperands() &&
723 !( (MI->getOperand(i).getType() == MachineOperand::MO_VirtualRegister ||
724 MI->getOperand(i).getType() == MachineOperand::MO_CCRegister)
725 && MI->getOperand(i).getVRegValue() != 0))
729 inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
734 typedef ValOpIterator<MITy, VTy> _Self;
736 inline VTy operator*() const {
737 return MI->getOperand(i).getVRegValue();
740 const MachineOperand &getMachineOperand() const { return MI->getOperand(i);}
741 MachineOperand &getMachineOperand() { return MI->getOperand(i);}
743 inline VTy operator->() const { return operator*(); }
745 inline bool isUse() const { return MI->getOperand(i).isUse(); }
746 inline bool isDef() const { return MI->getOperand(i).isDef(); }
748 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
749 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
751 inline bool operator==(const _Self &y) const {
754 inline bool operator!=(const _Self &y) const {
755 return !operator==(y);
758 static _Self begin(MITy MI) {
761 static _Self end(MITy MI) {
762 return _Self(MI, MI->getNumOperands());
766 // define begin() and end()
767 val_op_iterator begin() { return val_op_iterator::begin(this); }
768 val_op_iterator end() { return val_op_iterator::end(this); }
770 const_val_op_iterator begin() const {
771 return const_val_op_iterator::begin(this);
773 const_val_op_iterator end() const {
774 return const_val_op_iterator::end(this);
778 //===----------------------------------------------------------------------===//
781 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
782 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
783 void PrintMachineInstructions(const Function *F);
785 } // End llvm namespace