1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
20 #include "llvm/Support/DataTypes.h"
28 class MachineBasicBlock;
32 template <typename T> struct ilist_traits;
33 template <typename T> struct ilist;
35 typedef short MachineOpCode;
37 //===----------------------------------------------------------------------===//
38 // class MachineOperand
41 // Representation of each machine instruction operand.
42 // This class is designed so that you can allocate a vector of operands
43 // first and initialize each one later.
45 // E.g, for this VM instruction:
46 // ptr = alloca type, numElements
47 // we generate 2 machine instructions on the SPARC:
49 // mul Constant, Numelements -> Reg
50 // add %sp, Reg -> Ptr
52 // Each instruction has 3 operands, listed above. Of those:
53 // - Reg, NumElements, and Ptr are of operand type MO_Register.
54 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
56 // For the register operands, the virtual register type is as follows:
58 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
59 // MachineInstr* minstr will point to the instruction that computes reg.
61 // - %sp will be of virtual register type MO_MachineReg.
62 // The field regNum identifies the machine register.
64 // - NumElements will be of virtual register type MO_VirtualReg.
65 // The field Value* value identifies the value.
67 // - Ptr will also be of virtual register type MO_VirtualReg.
68 // Again, the field Value* value identifies the value.
70 //===----------------------------------------------------------------------===//
72 struct MachineOperand {
74 // Bit fields of the flags variable used for different operand properties
76 DEFFLAG = 0x01, // this is a def of the operand
77 USEFLAG = 0x02, // this is a use of the operand
78 HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
79 LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
80 HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
81 LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
82 PCRELATIVE = 0x40 // Operand is relative to PC, not a global address
86 // UseType - This enum describes how the machine operand is used by
87 // the instruction. Note that the MachineInstr/Operator class
88 // currently uses bool arguments to represent this information
89 // instead of an enum. Eventually this should change over to use
90 // this _easier to read_ representation instead.
93 Use = USEFLAG, /// only read
94 Def = DEFFLAG, /// only written
95 UseAndDef = Use | Def /// read AND written
98 enum MachineOperandType {
99 MO_VirtualRegister, // virtual register for *value
100 MO_MachineRegister, // pre-assigned machine register `regNum'
102 MO_SignExtendedImmed,
105 MO_MachineBasicBlock, // MachineBasicBlock reference
106 MO_FrameIndex, // Abstract Stack Frame Index
107 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
108 MO_ExternalSymbol, // Name of external global symbol
109 MO_GlobalAddress // Address of a global value
114 Value* value; // BasicBlockVal for a label operand.
115 // ConstantVal for a non-address immediate.
116 // Virtual register for an SSA operand,
117 // including hidden operands required for
118 // the generated machine code.
119 // LLVM global for MO_GlobalAddress.
121 int64_t immedVal; // Constant value for an explicit constant
123 MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
124 const char *SymbolName; // For MO_ExternalSymbol type
127 char flags; // see bit field definitions above
128 MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
130 int regNum; // register number for an explicit register
131 // will be set for a value after reg allocation
133 int offset; // Offset to address of global or external, only
134 // valid for MO_GlobalAddress, MO_ExternalSym
135 // and MO_ConstantPoolIndex
138 void zeroContents () {
139 memset (&contents, 0, sizeof (contents));
140 memset (&extra, 0, sizeof (extra));
143 MachineOperand(int64_t ImmVal = 0,
144 MachineOperandType OpTy = MO_VirtualRegister, int Offset = 0)
145 : flags(0), opType(OpTy) {
147 contents.immedVal = ImmVal;
148 if (OpTy == MachineOperand::MO_ConstantPoolIndex)
149 extra.offset = Offset;
154 MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
155 : flags(UseTy), opType(OpTy) {
160 MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
161 bool isPCRelative = false)
162 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
163 assert(OpTy != MachineOperand::MO_GlobalAddress);
169 MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
170 bool isPCRelative = false, int Offset = 0)
171 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
172 assert(OpTy == MachineOperand::MO_GlobalAddress);
174 contents.value = (Value*)V;
175 extra.offset = Offset;
178 MachineOperand(MachineBasicBlock *mbb)
179 : flags(0), opType(MO_MachineBasicBlock) {
185 MachineOperand(const char *SymName, bool isPCRelative, int Offset)
186 : flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
188 contents.SymbolName = SymName;
189 extra.offset = Offset;
193 MachineOperand(const MachineOperand &M)
194 : flags(M.flags), opType(M.opType) {
196 contents = M.contents;
203 const MachineOperand &operator=(const MachineOperand &MO) {
204 contents = MO.contents;
211 /// getType - Returns the MachineOperandType for this operand.
213 MachineOperandType getType() const { return opType; }
215 /// getUseType - Returns the MachineOperandUseType of this operand.
217 UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
219 /// isPCRelative - This returns the value of the PCRELATIVE flag, which
220 /// indicates whether this operand should be emitted as a PC relative value
221 /// instead of a global address. This is used for operands of the forms:
222 /// MachineBasicBlock, GlobalAddress, ExternalSymbol
224 bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
226 /// isRegister - Return true if this operand is a register operand. The X86
227 /// backend currently can't decide whether to use MO_MR or MO_VR to represent
228 /// them, so we accept both.
230 /// Note: The sparc backend should not use this method.
232 bool isRegister() const {
233 return opType == MO_MachineRegister || opType == MO_VirtualRegister;
236 /// Accessors that tell you what kind of MachineOperand you're looking at.
238 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
239 bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
240 bool isImmediate() const {
241 return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
243 bool isFrameIndex() const { return opType == MO_FrameIndex; }
244 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
245 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
246 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
248 /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
249 /// has one. This is deprecated and only used by the SPARC v9 backend.
251 Value* getVRegValueOrNull() const {
252 return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
253 isPCRelativeDisp()) ? contents.value : NULL;
256 /// MachineOperand accessors that only work on certain types of
257 /// MachineOperand...
259 Value* getVRegValue() const {
260 assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
261 || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
262 return contents.value;
264 int getMachineRegNum() const {
265 assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
268 int64_t getImmedValue() const {
269 assert(isImmediate() && "Wrong MachineOperand accessor");
270 return contents.immedVal;
272 MachineBasicBlock *getMachineBasicBlock() const {
273 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
276 void setMachineBasicBlock(MachineBasicBlock *MBB) {
277 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
280 int getFrameIndex() const {
281 assert(isFrameIndex() && "Wrong MachineOperand accessor");
282 return (int)contents.immedVal;
284 unsigned getConstantPoolIndex() const {
285 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
286 return (unsigned)contents.immedVal;
288 GlobalValue *getGlobal() const {
289 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
290 return (GlobalValue*)contents.value;
292 int getOffset() const {
293 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
294 "Wrong MachineOperand accessor");
297 const char *getSymbolName() const {
298 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
299 return contents.SymbolName;
302 /// MachineOperand methods for testing that work on any kind of
303 /// MachineOperand...
305 bool isUse () const { return flags & USEFLAG; }
306 MachineOperand& setUse () { flags |= USEFLAG; return *this; }
307 bool isDef () const { return flags & DEFFLAG; }
308 MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
309 bool isHiBits32 () const { return flags & HIFLAG32; }
310 bool isLoBits32 () const { return flags & LOFLAG32; }
311 bool isHiBits64 () const { return flags & HIFLAG64; }
312 bool isLoBits64 () const { return flags & LOFLAG64; }
314 /// hasAllocatedReg - Returns true iff a machine register has been
315 /// allocated to this operand.
317 bool hasAllocatedReg() const {
318 return (extra.regNum >= 0 &&
319 (opType == MO_VirtualRegister || opType == MO_CCRegister ||
320 opType == MO_MachineRegister));
323 /// getReg - Returns the register number. It is a runtime error to call this
324 /// if a register is not allocated.
326 unsigned getReg() const {
327 assert(hasAllocatedReg());
331 /// MachineOperand mutators...
333 void setReg(unsigned Reg) {
334 // This method's comment used to say: 'TODO: get rid of this duplicate
335 // code.' It's not clear where the duplication is.
336 assert(hasAllocatedReg() && "This operand cannot have a register number!");
340 void setValueReg(Value *val) {
341 assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
342 contents.value = val;
345 void setImmedValue(int immVal) {
346 assert(isImmediate() && "Wrong MachineOperand mutator");
347 contents.immedVal = immVal;
350 void setOffset(int Offset) {
351 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
352 "Wrong MachineOperand accessor");
353 extra.offset = Offset;
356 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
358 /// markHi32, markLo32, etc. - These methods are deprecated and only used by
359 /// the SPARC v9 back-end.
361 void markHi32() { flags |= HIFLAG32; }
362 void markLo32() { flags |= LOFLAG32; }
363 void markHi64() { flags |= HIFLAG64; }
364 void markLo64() { flags |= LOFLAG64; }
367 /// setRegForValue - Replaces the Value with its corresponding physical
368 /// register after register allocation is complete. This is deprecated
369 /// and only used by the SPARC v9 back-end.
371 void setRegForValue(int reg) {
372 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
373 opType == MO_MachineRegister);
377 friend class MachineInstr;
381 //===----------------------------------------------------------------------===//
382 // class MachineInstr
385 // Representation of each machine instruction.
387 // MachineOpCode must be an enum, defined separately for each target.
388 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
390 // There are 2 kinds of operands:
392 // (1) Explicit operands of the machine instruction in vector operands[]
394 // (2) "Implicit operands" are values implicitly used or defined by the
395 // machine instruction, such as arguments to a CALL, return value of
396 // a CALL (if any), and return value of a RETURN.
397 //===----------------------------------------------------------------------===//
400 short Opcode; // the opcode
401 unsigned char numImplicitRefs; // number of implicit operands
402 std::vector<MachineOperand> operands; // the operands
403 MachineInstr* prev, *next; // links for our intrusive list
404 MachineBasicBlock* parent; // pointer to the owning basic block
406 // OperandComplete - Return true if it's illegal to add a new operand
407 bool OperandsComplete() const;
409 //Constructor used by clone() method
410 MachineInstr(const MachineInstr&);
412 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
414 // Intrusive list support
416 friend struct ilist_traits<MachineInstr>;
419 MachineInstr(short Opcode, unsigned numOperands);
421 /// MachineInstr ctor - This constructor only does a _reserve_ of the
422 /// operands, not a resize for them. It is expected that if you use this that
423 /// you call add* methods below to fill up the operands, instead of the Set
424 /// methods. Eventually, the "resizing" ctors will be phased out.
426 MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
428 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
429 /// the MachineInstr is created and added to the end of the specified basic
432 MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
436 const MachineBasicBlock* getParent() const { return parent; }
437 MachineBasicBlock* getParent() { return parent; }
439 /// getOpcode - Returns the opcode of this MachineInstr.
441 const int getOpcode() const { return Opcode; }
443 /// Access to explicit operands of the instruction.
445 unsigned getNumOperands() const { return operands.size() - numImplicitRefs; }
447 const MachineOperand& getOperand(unsigned i) const {
448 assert(i < getNumOperands() && "getOperand() out of range!");
451 MachineOperand& getOperand(unsigned i) {
452 assert(i < getNumOperands() && "getOperand() out of range!");
457 // Access to explicit or implicit operands of the instruction
458 // This returns the i'th entry in the operand vector.
459 // That represents the i'th explicit operand or the (i-N)'th implicit operand,
460 // depending on whether i < N or i >= N.
462 const MachineOperand& getExplOrImplOperand(unsigned i) const {
463 assert(i < operands.size() && "getExplOrImplOperand() out of range!");
464 return (i < getNumOperands()? getOperand(i)
465 : getImplicitOp(i - getNumOperands()));
469 // Access to implicit operands of the instruction
471 unsigned getNumImplicitRefs() const{ return numImplicitRefs; }
473 MachineOperand& getImplicitOp(unsigned i) {
474 assert(i < numImplicitRefs && "implicit ref# out of range!");
475 return operands[i + operands.size() - numImplicitRefs];
477 const MachineOperand& getImplicitOp(unsigned i) const {
478 assert(i < numImplicitRefs && "implicit ref# out of range!");
479 return operands[i + operands.size() - numImplicitRefs];
482 Value* getImplicitRef(unsigned i) {
483 return getImplicitOp(i).getVRegValue();
485 const Value* getImplicitRef(unsigned i) const {
486 return getImplicitOp(i).getVRegValue();
489 void addImplicitRef(Value* V, bool isDef = false, bool isDefAndUse = false) {
491 addRegOperand(V, isDef, isDefAndUse);
493 void setImplicitRef(unsigned i, Value* V) {
494 assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!");
495 SetMachineOperandVal(i + getNumOperands(),
496 MachineOperand::MO_VirtualRegister, V);
499 /// clone - Create a copy of 'this' instruction that is identical in
500 /// all ways except the the instruction has no parent, prev, or next.
501 MachineInstr* clone() const;
506 void print(std::ostream &OS, const TargetMachine *TM) const;
508 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
510 // Define iterators to access the Value operands of the Machine Instruction.
511 // Note that these iterators only enumerate the explicit operands.
512 // begin() and end() are defined to produce these iterators. NOTE, these are
515 template<class _MI, class _V> class ValOpIterator;
516 typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
517 typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
520 //===--------------------------------------------------------------------===//
521 // Accessors to add operands when building up machine instructions
524 /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
527 void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
528 assert(!OperandsComplete() &&
529 "Trying to add an operand to a machine instr that is already done!");
531 MachineOperand(V, MachineOperand::MO_VirtualRegister,
532 !isDef ? MachineOperand::Use :
533 (isDefAndUse ? MachineOperand::UseAndDef :
534 MachineOperand::Def)));
537 void addRegOperand(Value *V,
538 MachineOperand::UseType UTy = MachineOperand::Use,
539 bool isPCRelative = false) {
540 assert(!OperandsComplete() &&
541 "Trying to add an operand to a machine instr that is already done!");
542 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
546 void addCCRegOperand(Value *V,
547 MachineOperand::UseType UTy = MachineOperand::Use) {
548 assert(!OperandsComplete() &&
549 "Trying to add an operand to a machine instr that is already done!");
550 operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
555 /// addRegOperand - Add a symbolic virtual register reference...
557 void addRegOperand(int reg, bool isDef) {
558 assert(!OperandsComplete() &&
559 "Trying to add an operand to a machine instr that is already done!");
561 MachineOperand(reg, MachineOperand::MO_VirtualRegister,
562 isDef ? MachineOperand::Def : MachineOperand::Use));
565 /// addRegOperand - Add a symbolic virtual register reference...
567 void addRegOperand(int reg,
568 MachineOperand::UseType UTy = MachineOperand::Use) {
569 assert(!OperandsComplete() &&
570 "Trying to add an operand to a machine instr that is already done!");
572 MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
575 /// addPCDispOperand - Add a PC relative displacement operand to the MI
577 void addPCDispOperand(Value *V) {
578 assert(!OperandsComplete() &&
579 "Trying to add an operand to a machine instr that is already done!");
581 MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
584 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
586 void addMachineRegOperand(int reg, bool isDef) {
587 assert(!OperandsComplete() &&
588 "Trying to add an operand to a machine instr that is already done!");
590 MachineOperand(reg, MachineOperand::MO_MachineRegister,
591 isDef ? MachineOperand::Def : MachineOperand::Use));
594 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
596 void addMachineRegOperand(int reg,
597 MachineOperand::UseType UTy = MachineOperand::Use) {
598 assert(!OperandsComplete() &&
599 "Trying to add an operand to a machine instr that is already done!");
601 MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy));
604 /// addZeroExtImmOperand - Add a zero extended constant argument to the
605 /// machine instruction.
607 void addZeroExtImmOperand(int intValue) {
608 assert(!OperandsComplete() &&
609 "Trying to add an operand to a machine instr that is already done!");
611 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
614 /// addZeroExtImm64Operand - Add a zero extended 64-bit constant argument
615 /// to the machine instruction.
617 void addZeroExtImm64Operand(uint64_t intValue) {
618 assert(!OperandsComplete() &&
619 "Trying to add an operand to a machine instr that is already done!");
621 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
624 /// addSignExtImmOperand - Add a zero extended constant argument to the
625 /// machine instruction.
627 void addSignExtImmOperand(int intValue) {
628 assert(!OperandsComplete() &&
629 "Trying to add an operand to a machine instr that is already done!");
631 MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
634 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
635 assert(!OperandsComplete() &&
636 "Trying to add an operand to a machine instr that is already done!");
637 operands.push_back(MachineOperand(MBB));
640 /// addFrameIndexOperand - Add an abstract frame index to the instruction
642 void addFrameIndexOperand(unsigned Idx) {
643 assert(!OperandsComplete() &&
644 "Trying to add an operand to a machine instr that is already done!");
645 operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
648 /// addConstantPoolndexOperand - Add a constant pool object index to the
651 void addConstantPoolIndexOperand(unsigned I, int Offset=0) {
652 assert(!OperandsComplete() &&
653 "Trying to add an operand to a machine instr that is already done!");
654 operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
657 void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative, int Offset) {
658 assert(!OperandsComplete() &&
659 "Trying to add an operand to a machine instr that is already done!");
661 MachineOperand(GV, MachineOperand::MO_GlobalAddress,
662 MachineOperand::Use, isPCRelative, Offset));
665 /// addExternalSymbolOperand - Add an external symbol operand to this instr
667 void addExternalSymbolOperand(const char *SymName, bool isPCRelative) {
668 operands.push_back(MachineOperand(SymName, isPCRelative, 0));
671 //===--------------------------------------------------------------------===//
672 // Accessors used to modify instructions in place.
674 // FIXME: Move this stuff to MachineOperand itself!
676 /// replace - Support to rewrite a machine instruction in place: for now,
677 /// simply replace() and then set new operands with Set.*Operand methods
680 void replace(short Opcode, unsigned numOperands);
682 /// setOpcode - Replace the opcode of the current instruction with a new one.
684 void setOpcode(unsigned Op) { Opcode = Op; }
686 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
687 /// fewer operand than it started with.
689 void RemoveOperand(unsigned i) {
690 operands.erase(operands.begin()+i);
693 // Access to set the operands when building the machine instruction
695 void SetMachineOperandVal(unsigned i,
696 MachineOperand::MachineOperandType operandType,
699 void SetMachineOperandConst(unsigned i,
700 MachineOperand::MachineOperandType operandType,
703 void SetMachineOperandReg(unsigned i, int regNum);
706 unsigned substituteValue(const Value* oldVal, Value* newVal,
707 bool defsOnly, bool notDefsAndUses,
708 bool& someArgsWereIgnored);
710 // SetRegForOperand -
711 // SetRegForImplicitRef -
712 // Mark an explicit or implicit operand with its allocated physical register.
714 void SetRegForOperand(unsigned i, int regNum);
715 void SetRegForImplicitRef(unsigned i, int regNum);
718 // Iterator to enumerate machine operands. NOTE, this is SPARCV9 specific!
720 template<class MITy, class VTy>
721 class ValOpIterator : public forward_iterator<VTy, ptrdiff_t> {
725 void skipToNextVal() {
726 while (i < MI->getNumOperands() &&
727 !( (MI->getOperand(i).getType() == MachineOperand::MO_VirtualRegister ||
728 MI->getOperand(i).getType() == MachineOperand::MO_CCRegister)
729 && MI->getOperand(i).getVRegValue() != 0))
733 inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
738 typedef ValOpIterator<MITy, VTy> _Self;
740 inline VTy operator*() const {
741 return MI->getOperand(i).getVRegValue();
744 const MachineOperand &getMachineOperand() const { return MI->getOperand(i);}
745 MachineOperand &getMachineOperand() { return MI->getOperand(i);}
747 inline VTy operator->() const { return operator*(); }
749 inline bool isUse() const { return MI->getOperand(i).isUse(); }
750 inline bool isDef() const { return MI->getOperand(i).isDef(); }
752 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
753 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
755 inline bool operator==(const _Self &y) const {
758 inline bool operator!=(const _Self &y) const {
759 return !operator==(y);
762 static _Self begin(MITy MI) {
765 static _Self end(MITy MI) {
766 return _Self(MI, MI->getNumOperands());
770 // Note: These are Sparc-V9 specific!
771 val_op_iterator begin() { return val_op_iterator::begin(this); }
772 val_op_iterator end() { return val_op_iterator::end(this); }
773 const_val_op_iterator begin() const {
774 return const_val_op_iterator::begin(this);
776 const_val_op_iterator end() const {
777 return const_val_op_iterator::end(this);
781 //===----------------------------------------------------------------------===//
784 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
785 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
786 void PrintMachineInstructions(const Function *F);
788 } // End llvm namespace