2 //***************************************************************************
12 // 7/2/01 - Vikram Adve - Created
13 //**************************************************************************/
15 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
16 #define LLVM_CODEGEN_MACHINEINSTR_H
18 #include "Support/DataTypes.h"
19 #include "Support/NonCopyable.h"
20 #include "llvm/CodeGen/InstrForest.h"
21 #include "llvm/Target/MachineInstrInfo.h"
22 #include "llvm/Annotation.h"
23 #include "llvm/Method.h"
27 template<class _MI, class _V> class ValOpIterator;
30 //************************** External Constants ****************************/
32 const int INVALID_FRAME_OFFSET = MAXINT;
35 //*************************** External Classes *****************************/
38 //---------------------------------------------------------------------------
39 // class MachineOperand
42 // Representation of each machine instruction operand.
43 // This class is designed so that you can allocate a vector of operands
44 // first and initialize each one later.
46 // E.g, for this VM instruction:
47 // ptr = alloca type, numElements
48 // we generate 2 machine instructions on the SPARC:
50 // mul Constant, Numelements -> Reg
51 // add %sp, Reg -> Ptr
53 // Each instruction has 3 operands, listed above. Of those:
54 // - Reg, NumElements, and Ptr are of operand type MO_Register.
55 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
57 // For the register operands, the virtual register type is as follows:
59 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
60 // MachineInstr* minstr will point to the instruction that computes reg.
62 // - %sp will be of virtual register type MO_MachineReg.
63 // The field regNum identifies the machine register.
65 // - NumElements will be of virtual register type MO_VirtualReg.
66 // The field Value* value identifies the value.
68 // - Ptr will also be of virtual register type MO_VirtualReg.
69 // Again, the field Value* value identifies the value.
71 //---------------------------------------------------------------------------
74 class MachineOperand {
76 enum MachineOperandType {
77 MO_VirtualRegister, // virtual register for *value
78 MO_MachineRegister, // pre-assigned machine register `regNum'
86 MachineOperandType opType;
89 Value* value; // BasicBlockVal for a label operand.
90 // ConstantVal for a non-address immediate.
91 // Virtual register for an SSA operand,
92 // including hidden operands required for
93 // the generated machine code.
94 int64_t immedVal; // constant value for an explicit constant
97 int regNum; // register number for an explicit register
98 // will be set for a value after reg allocation
99 bool isDef; // is this a defition for the value
102 /*ctor*/ MachineOperand ();
103 /*ctor*/ MachineOperand (MachineOperandType operandType,
105 /*copy ctor*/ MachineOperand (const MachineOperand&);
106 /*dtor*/ ~MachineOperand () {}
108 // Accessor methods. Caller is responsible for checking the
109 // operand type before invoking the corresponding accessor.
111 inline MachineOperandType getOperandType () const {
114 inline Value* getVRegValue () const {
115 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
116 opType == MO_PCRelativeDisp);
119 inline int getMachineRegNum() const {
120 assert(opType == MO_MachineRegister);
123 inline int64_t getImmedValue () const {
124 assert(opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed);
127 inline bool opIsDef () const {
132 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
136 // These functions are provided so that a vector of operands can be
137 // statically allocated and individual ones can be initialized later.
138 // Give class MachineInstr gets access to these functions.
140 void Initialize (MachineOperandType operandType,
142 void InitializeConst (MachineOperandType operandType,
144 void InitializeReg (int regNum);
146 friend class MachineInstr;
147 friend class ValOpIterator<const MachineInstr, const Value>;
148 friend class ValOpIterator< MachineInstr, Value>;
153 // replaces the Value with its corresponding physical register after
154 // register allocation is complete
155 void setRegForValue(int reg) {
156 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
157 opType == MO_MachineRegister);
161 // used to get the reg number if when one is allocted (must be
162 // called only after reg alloc)
163 inline int getAllocatedRegNum() const {
164 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
165 opType == MO_MachineRegister);
174 MachineOperand::MachineOperand()
175 : opType(MO_VirtualRegister),
182 MachineOperand::MachineOperand(MachineOperandType operandType,
184 : opType(operandType),
191 MachineOperand::MachineOperand(const MachineOperand& mo)
196 case MO_VirtualRegister:
197 case MO_CCRegister: value = mo.value; break;
198 case MO_MachineRegister: regNum = mo.regNum; break;
199 case MO_SignExtendedImmed:
200 case MO_UnextendedImmed:
201 case MO_PCRelativeDisp: immedVal = mo.immedVal; break;
207 MachineOperand::Initialize(MachineOperandType operandType,
210 opType = operandType;
216 MachineOperand::InitializeConst(MachineOperandType operandType,
219 opType = operandType;
226 MachineOperand::InitializeReg(int _regNum)
228 opType = MO_MachineRegister;
230 regNum = (int) _regNum;
234 //---------------------------------------------------------------------------
235 // class MachineInstr
238 // Representation of each machine instruction.
240 // MachineOpCode must be an enum, defined separately for each target.
241 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
243 // opCodeMask is used to record variants of an instruction.
244 // E.g., each branch instruction on SPARC has 2 flags (i.e., 4 variants):
245 // ANNUL: if 1: Annul delay slot instruction.
246 // PREDICT-NOT-TAKEN: if 1: predict branch not taken.
247 // Instead of creating 4 different opcodes for BNZ, we create a single
248 // opcode and set bits in opCodeMask for each of these flags.
250 // There are 2 kinds of operands:
252 // (1) Explicit operands of the machine instruction in vector operands[]
254 // (2) "Implicit operands" are values implicitly used or defined by the
255 // machine instruction, such as arguments to a CALL, return value of
256 // a CALL (if any), and return value of a RETURN.
257 //---------------------------------------------------------------------------
259 class MachineInstr : public NonCopyable {
261 MachineOpCode opCode;
262 OpCodeMask opCodeMask; // extra bits for variants of an opcode
263 std::vector<MachineOperand> operands;
264 std::vector<Value*> implicitRefs; // values implicitly referenced by this
265 std::vector<bool> implicitIsDef; // machine instruction (eg, call args)
268 typedef ValOpIterator<const MachineInstr, const Value> val_const_op_iterator;
269 typedef ValOpIterator<const MachineInstr, Value> val_op_iterator;
272 /*ctor*/ MachineInstr (MachineOpCode _opCode,
273 OpCodeMask _opCodeMask = 0x0);
274 /*ctor*/ MachineInstr (MachineOpCode _opCode,
275 unsigned numOperands,
276 OpCodeMask _opCodeMask = 0x0);
277 inline ~MachineInstr () {}
278 const MachineOpCode getOpCode () const { return opCode; }
281 // Information about explicit operands of the instruction
283 unsigned int getNumOperands () const { return operands.size(); }
285 bool operandIsDefined(unsigned int i) const;
287 const MachineOperand& getOperand (unsigned int i) const;
288 MachineOperand& getOperand (unsigned int i);
291 // Information about implicit operands of the instruction
293 unsigned int getNumImplicitRefs() const{return implicitRefs.size();}
295 bool implicitRefIsDefined(unsigned int i) const;
297 const Value* getImplicitRef (unsigned int i) const;
298 Value* getImplicitRef (unsigned int i);
303 void dump (unsigned int indent = 0) const;
307 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
308 friend class val_const_op_iterator;
309 friend class val_op_iterator;
312 // Access to set the operands when building the machine instruction
313 void SetMachineOperand(unsigned int i,
314 MachineOperand::MachineOperandType operandType,
315 Value* _val, bool isDef=false);
316 void SetMachineOperand(unsigned int i,
317 MachineOperand::MachineOperandType operandType,
318 int64_t intValue, bool isDef=false);
319 void SetMachineOperand(unsigned int i,
323 void addImplicitRef (Value* val,
326 void setImplicitRef (unsigned int i,
332 inline MachineOperand&
333 MachineInstr::getOperand(unsigned int i)
335 assert(i < operands.size() && "getOperand() out of range!");
339 inline const MachineOperand&
340 MachineInstr::getOperand(unsigned int i) const
342 assert(i < operands.size() && "getOperand() out of range!");
347 MachineInstr::operandIsDefined(unsigned int i) const
349 return getOperand(i).opIsDef();
353 MachineInstr::implicitRefIsDefined(unsigned int i) const
355 assert(i < implicitIsDef.size() && "operand out of range!");
356 return implicitIsDef[i];
360 MachineInstr::getImplicitRef(unsigned int i) const
362 assert(i < implicitRefs.size() && "getImplicitRef() out of range!");
363 return implicitRefs[i];
367 MachineInstr::getImplicitRef(unsigned int i)
369 assert(i < implicitRefs.size() && "getImplicitRef() out of range!");
370 return implicitRefs[i];
374 MachineInstr::addImplicitRef(Value* val,
377 implicitRefs.push_back(val);
378 implicitIsDef.push_back(isDef);
382 MachineInstr::setImplicitRef(unsigned int i,
386 assert(i < implicitRefs.size() && "setImplicitRef() out of range!");
387 implicitRefs[i] = val;
388 implicitIsDef[i] = isDef;
392 template<class _MI, class _V>
393 class ValOpIterator : public std::forward_iterator<_V, ptrdiff_t> {
399 inline void skipToNextVal() {
400 while (i < minstr->getNumOperands() &&
401 ! ((minstr->operands[i].opType == MachineOperand::MO_VirtualRegister
402 || minstr->operands[i].opType == MachineOperand::MO_CCRegister)
403 && minstr->operands[i].value != NULL))
408 typedef ValOpIterator<_MI, _V> _Self;
410 inline ValOpIterator(_MI* _minstr) : i(0), minstr(_minstr) {
411 resultPos = TargetInstrDescriptors[minstr->opCode].resultPos;
415 inline _V* operator*() const { return minstr->getOperand(i).getVRegValue();}
417 const MachineOperand & getMachineOperand() const { return minstr->getOperand(i); }
419 inline _V* operator->() const { return operator*(); }
420 // inline bool isDef () const { return (((int) i) == resultPos); }
422 inline bool isDef () const { return minstr->getOperand(i).isDef; }
423 inline bool done () const { return (i == minstr->getNumOperands()); }
425 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
426 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
430 //---------------------------------------------------------------------------
431 // class MachineCodeForVMInstr
434 // Representation of the sequence of machine instructions created
435 // for a single VM instruction. Additionally records information
436 // about hidden and implicit values used by the machine instructions:
437 // about hidden values used by the machine instructions:
439 // "Temporary values" are intermediate values used in the machine
440 // instruction sequence, but not in the VM instruction
441 // Note that such values should be treated as pure SSA values with
442 // no interpretation of their operands (i.e., as a TmpInstruction
443 // object which actually represents such a value).
445 // (2) "Implicit uses" are values used in the VM instruction but not in
446 // the machine instruction sequence
448 //---------------------------------------------------------------------------
450 class MachineCodeForVMInstr: public std::vector<MachineInstr*>
453 std::vector<Value*> tempVec; // used by m/c instr but not VM instr
456 /*ctor*/ MachineCodeForVMInstr () {}
457 /*ctor*/ ~MachineCodeForVMInstr ();
459 const std::vector<Value*>& getTempValues () const { return tempVec; }
460 std::vector<Value*>& getTempValues () { return tempVec; }
462 void addTempValue (Value* val) { tempVec.push_back(val); }
464 // dropAllReferences() - This function drops all references within
465 // temporary (hidden) instructions created in implementing the original
466 // VM intruction. This ensures there are no remaining "uses" within
467 // these hidden instructions, before the values of a method are freed.
469 // Make this inline because it has to be called from class Instruction
470 // and inlining it avoids a serious circurality in link order.
471 inline void dropAllReferences() {
472 for (unsigned i=0, N=tempVec.size(); i < N; i++)
473 if (Instruction *I = dyn_cast<Instruction>(tempVec[i]))
474 I->dropAllReferences();
479 MachineCodeForVMInstr::~MachineCodeForVMInstr()
481 // Free the Value objects created to hold intermediate values
482 for (unsigned i=0, N=tempVec.size(); i < N; i++)
485 // Free the MachineInstr objects allocated, if any.
486 for (unsigned i=0, N=this->size(); i < N; i++)
491 //---------------------------------------------------------------------------
492 // class MachineCodeForBasicBlock
495 // Representation of the sequence of machine instructions created
496 // for a basic block.
497 //---------------------------------------------------------------------------
500 class MachineCodeForBasicBlock: public std::vector<MachineInstr*> {
502 typedef std::vector<MachineInstr*>::iterator iterator;
503 typedef std::vector<MachineInstr*>::const_iterator const_iterator;
507 //---------------------------------------------------------------------------
508 // class MachineCodeForMethod
511 // Collect native machine code information for a method.
512 // This allows target-specific information about the generated code
513 // to be stored with each method.
514 //---------------------------------------------------------------------------
518 class MachineCodeForMethod: public NonCopyable, private Annotation {
520 static AnnotationID AID;
522 const Method* method;
524 unsigned staticStackSize;
525 unsigned automaticVarsSize;
526 unsigned regSpillsSize;
527 unsigned currentOptionalArgsSize;
528 unsigned maxOptionalArgsSize;
529 unsigned currentTmpValuesSize;
530 std::hash_set<const Constant*> constantsForConstPool;
531 std::hash_map<const Value*, int> offsets;
532 // hash_map<const Value*, int> offsetsFromSP;
535 /*ctor*/ MachineCodeForMethod(const Method* method,
536 const TargetMachine& target);
538 // The next two methods are used to construct and to retrieve
539 // the MachineCodeForMethod object for the given method.
540 // construct() -- Allocates and initializes for a given method and target
541 // get() -- Returns a handle to the object.
542 // This should not be called before "construct()"
543 // for a given Method.
545 inline static MachineCodeForMethod& construct(const Method* method,
546 const TargetMachine& target)
548 assert(method->getAnnotation(MachineCodeForMethod::AID) == NULL &&
549 "Object already exists for this method!");
550 MachineCodeForMethod* mcInfo = new MachineCodeForMethod(method, target);
551 method->addAnnotation(mcInfo);
555 inline static MachineCodeForMethod& get(const Method* method)
557 MachineCodeForMethod* mc = (MachineCodeForMethod*)
558 method->getAnnotation(MachineCodeForMethod::AID);
559 assert(mc && "Call construct() method first to allocate the object");
564 // Accessors for global information about generated code for a method.
566 inline bool isCompiledAsLeafMethod() const { return compiledAsLeaf; }
567 inline unsigned getStaticStackSize() const { return staticStackSize; }
568 inline unsigned getAutomaticVarsSize() const { return automaticVarsSize; }
569 inline unsigned getRegSpillsSize() const { return regSpillsSize; }
570 inline unsigned getMaxOptionalArgsSize() const { return maxOptionalArgsSize;}
571 inline unsigned getCurrentOptionalArgsSize() const
572 { return currentOptionalArgsSize;}
573 inline const std::hash_set<const Constant*>&
574 getConstantPoolValues() const {return constantsForConstPool;}
577 // Modifiers used during code generation
579 void initializeFrameLayout (const TargetMachine& target);
581 void addToConstantPool (const Constant* constVal)
582 { constantsForConstPool.insert(constVal); }
584 inline void markAsLeafMethod() { compiledAsLeaf = true; }
586 int allocateLocalVar (const TargetMachine& target,
588 unsigned int size = 0);
590 int allocateSpilledValue (const TargetMachine& target,
593 int allocateOptionalArg (const TargetMachine& target,
596 void resetOptionalArgs (const TargetMachine& target);
598 int pushTempValue (const TargetMachine& target,
601 void popAllTempValues (const TargetMachine& target);
603 int getOffset (const Value* val) const;
605 // int getOffsetFromFP (const Value* val) const;
610 inline void incrementAutomaticVarsSize(int incr) {
611 automaticVarsSize+= incr;
612 staticStackSize += incr;
614 inline void incrementRegSpillsSize(int incr) {
615 regSpillsSize+= incr;
616 staticStackSize += incr;
618 inline void incrementCurrentOptionalArgsSize(int incr) {
619 currentOptionalArgsSize+= incr; // stack size already includes this!
624 //---------------------------------------------------------------------------
626 //---------------------------------------------------------------------------
629 std::ostream& operator<< (std::ostream& os, const MachineInstr& minstr);
632 std::ostream& operator<< (std::ostream& os, const MachineOperand& mop);
635 void PrintMachineInstructions(const Method *method);
638 //**************************************************************************/