2 //***************************************************************************
12 // 7/2/01 - Vikram Adve - Created
13 //**************************************************************************/
15 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
16 #define LLVM_CODEGEN_MACHINEINSTR_H
18 #include "Support/DataTypes.h"
19 #include "Support/NonCopyable.h"
20 #include "llvm/CodeGen/InstrForest.h"
21 #include "llvm/Target/MachineInstrInfo.h"
22 #include "llvm/Annotation.h"
23 #include "llvm/Method.h"
29 template<class _MI, class _V> class ValOpIterator;
32 //************************** External Constants ****************************/
34 const int INVALID_FRAME_OFFSET = MAXINT;
37 //*************************** External Classes *****************************/
40 //---------------------------------------------------------------------------
41 // class MachineOperand
44 // Representation of each machine instruction operand.
45 // This class is designed so that you can allocate a vector of operands
46 // first and initialize each one later.
48 // E.g, for this VM instruction:
49 // ptr = alloca type, numElements
50 // we generate 2 machine instructions on the SPARC:
52 // mul Constant, Numelements -> Reg
53 // add %sp, Reg -> Ptr
55 // Each instruction has 3 operands, listed above. Of those:
56 // - Reg, NumElements, and Ptr are of operand type MO_Register.
57 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
59 // For the register operands, the virtual register type is as follows:
61 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
62 // MachineInstr* minstr will point to the instruction that computes reg.
64 // - %sp will be of virtual register type MO_MachineReg.
65 // The field regNum identifies the machine register.
67 // - NumElements will be of virtual register type MO_VirtualReg.
68 // The field Value* value identifies the value.
70 // - Ptr will also be of virtual register type MO_VirtualReg.
71 // Again, the field Value* value identifies the value.
73 //---------------------------------------------------------------------------
76 class MachineOperand {
78 enum MachineOperandType {
79 MO_VirtualRegister, // virtual register for *value
80 MO_MachineRegister, // pre-assigned machine register `regNum'
88 MachineOperandType opType;
91 Value* value; // BasicBlockVal for a label operand.
92 // ConstantVal for a non-address immediate.
93 // Virtual register for an SSA operand,
94 // including hidden operands required for
95 // the generated machine code.
96 int64_t immedVal; // constant value for an explicit constant
99 int regNum; // register number for an explicit register
100 // will be set for a value after reg allocation
101 bool isDef; // is this a defition for the value
104 /*ctor*/ MachineOperand ();
105 /*ctor*/ MachineOperand (MachineOperandType operandType,
107 /*copy ctor*/ MachineOperand (const MachineOperand&);
108 /*dtor*/ ~MachineOperand () {}
110 // Accessor methods. Caller is responsible for checking the
111 // operand type before invoking the corresponding accessor.
113 inline MachineOperandType getOperandType () const {
116 inline Value* getVRegValue () const {
117 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
118 opType == MO_PCRelativeDisp);
121 inline int getMachineRegNum() const {
122 assert(opType == MO_MachineRegister);
125 inline int64_t getImmedValue () const {
126 assert(opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed);
129 inline bool opIsDef () const {
134 friend ostream& operator<<(ostream& os, const MachineOperand& mop);
138 // These functions are provided so that a vector of operands can be
139 // statically allocated and individual ones can be initialized later.
140 // Give class MachineInstr gets access to these functions.
142 void Initialize (MachineOperandType operandType,
144 void InitializeConst (MachineOperandType operandType,
146 void InitializeReg (int regNum);
148 friend class MachineInstr;
149 friend class ValOpIterator<const MachineInstr, const Value>;
150 friend class ValOpIterator< MachineInstr, Value>;
155 // replaces the Value with its corresponding physical register after
156 // register allocation is complete
157 void setRegForValue(int reg) {
158 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
159 opType == MO_MachineRegister);
163 // used to get the reg number if when one is allocted (must be
164 // called only after reg alloc)
165 inline int getAllocatedRegNum() const {
166 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
167 opType == MO_MachineRegister);
176 MachineOperand::MachineOperand()
177 : opType(MO_VirtualRegister),
184 MachineOperand::MachineOperand(MachineOperandType operandType,
186 : opType(operandType),
193 MachineOperand::MachineOperand(const MachineOperand& mo)
198 case MO_VirtualRegister:
199 case MO_CCRegister: value = mo.value; break;
200 case MO_MachineRegister: regNum = mo.regNum; break;
201 case MO_SignExtendedImmed:
202 case MO_UnextendedImmed:
203 case MO_PCRelativeDisp: immedVal = mo.immedVal; break;
209 MachineOperand::Initialize(MachineOperandType operandType,
212 opType = operandType;
218 MachineOperand::InitializeConst(MachineOperandType operandType,
221 opType = operandType;
228 MachineOperand::InitializeReg(int _regNum)
230 opType = MO_MachineRegister;
232 regNum = (int) _regNum;
236 //---------------------------------------------------------------------------
237 // class MachineInstr
240 // Representation of each machine instruction.
242 // MachineOpCode must be an enum, defined separately for each target.
243 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
245 // opCodeMask is used to record variants of an instruction.
246 // E.g., each branch instruction on SPARC has 2 flags (i.e., 4 variants):
247 // ANNUL: if 1: Annul delay slot instruction.
248 // PREDICT-NOT-TAKEN: if 1: predict branch not taken.
249 // Instead of creating 4 different opcodes for BNZ, we create a single
250 // opcode and set bits in opCodeMask for each of these flags.
252 // There are 2 kinds of operands:
254 // (1) Explicit operands of the machine instruction in vector operands[]
256 // (2) "Implicit operands" are values implicitly used or defined by the
257 // machine instruction, such as arguments to a CALL, return value of
258 // a CALL (if any), and return value of a RETURN.
259 //---------------------------------------------------------------------------
261 class MachineInstr : public NonCopyable {
263 MachineOpCode opCode;
264 OpCodeMask opCodeMask; // extra bits for variants of an opcode
265 vector<MachineOperand> operands;
266 vector<Value*> implicitRefs; // values implicitly referenced by this
267 vector<bool> implicitIsDef; // machine instruction (eg, call args)
270 typedef ValOpIterator<const MachineInstr, const Value> val_const_op_iterator;
271 typedef ValOpIterator<const MachineInstr, Value> val_op_iterator;
274 /*ctor*/ MachineInstr (MachineOpCode _opCode,
275 OpCodeMask _opCodeMask = 0x0);
276 /*ctor*/ MachineInstr (MachineOpCode _opCode,
277 unsigned numOperands,
278 OpCodeMask _opCodeMask = 0x0);
279 inline ~MachineInstr () {}
280 const MachineOpCode getOpCode () const { return opCode; }
283 // Information about explicit operands of the instruction
285 unsigned int getNumOperands () const { return operands.size(); }
287 bool operandIsDefined(unsigned int i) const;
289 const MachineOperand& getOperand (unsigned int i) const;
290 MachineOperand& getOperand (unsigned int i);
293 // Information about implicit operands of the instruction
295 unsigned int getNumImplicitRefs() const{return implicitRefs.size();}
297 bool implicitRefIsDefined(unsigned int i) const;
299 const Value* getImplicitRef (unsigned int i) const;
300 Value* getImplicitRef (unsigned int i);
305 void dump (unsigned int indent = 0) const;
309 friend ostream& operator<<(ostream& os, const MachineInstr& minstr);
310 friend val_const_op_iterator;
311 friend val_op_iterator;
314 // Access to set the operands when building the machine instruction
315 void SetMachineOperand(unsigned int i,
316 MachineOperand::MachineOperandType operandType,
317 Value* _val, bool isDef=false);
318 void SetMachineOperand(unsigned int i,
319 MachineOperand::MachineOperandType operandType,
320 int64_t intValue, bool isDef=false);
321 void SetMachineOperand(unsigned int i,
325 void addImplicitRef (Value* val,
328 void setImplicitRef (unsigned int i,
334 inline MachineOperand&
335 MachineInstr::getOperand(unsigned int i)
337 assert(i < operands.size() && "getOperand() out of range!");
341 inline const MachineOperand&
342 MachineInstr::getOperand(unsigned int i) const
344 assert(i < operands.size() && "getOperand() out of range!");
349 MachineInstr::operandIsDefined(unsigned int i) const
351 return getOperand(i).opIsDef();
355 MachineInstr::implicitRefIsDefined(unsigned int i) const
357 assert(i < implicitIsDef.size() && "operand out of range!");
358 return implicitIsDef[i];
362 MachineInstr::getImplicitRef(unsigned int i) const
364 assert(i < implicitRefs.size() && "getImplicitRef() out of range!");
365 return implicitRefs[i];
369 MachineInstr::getImplicitRef(unsigned int i)
371 assert(i < implicitRefs.size() && "getImplicitRef() out of range!");
372 return implicitRefs[i];
376 MachineInstr::addImplicitRef(Value* val,
379 implicitRefs.push_back(val);
380 implicitIsDef.push_back(isDef);
384 MachineInstr::setImplicitRef(unsigned int i,
388 assert(i < implicitRefs.size() && "setImplicitRef() out of range!");
389 implicitRefs[i] = val;
390 implicitIsDef[i] = isDef;
394 template<class _MI, class _V>
395 class ValOpIterator : public std::forward_iterator<_V, ptrdiff_t> {
401 inline void skipToNextVal() {
402 while (i < minstr->getNumOperands() &&
403 ! ((minstr->operands[i].opType == MachineOperand::MO_VirtualRegister
404 || minstr->operands[i].opType == MachineOperand::MO_CCRegister)
405 && minstr->operands[i].value != NULL))
410 typedef ValOpIterator<_MI, _V> _Self;
412 inline ValOpIterator(_MI* _minstr) : i(0), minstr(_minstr) {
413 resultPos = TargetInstrDescriptors[minstr->opCode].resultPos;
417 inline _V* operator*() const { return minstr->getOperand(i).getVRegValue();}
419 const MachineOperand & getMachineOperand() const { return minstr->getOperand(i); }
421 inline _V* operator->() const { return operator*(); }
422 // inline bool isDef () const { return (((int) i) == resultPos); }
424 inline bool isDef () const { return minstr->getOperand(i).isDef; }
425 inline bool done () const { return (i == minstr->getNumOperands()); }
427 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
428 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
432 //---------------------------------------------------------------------------
433 // class MachineCodeForVMInstr
436 // Representation of the sequence of machine instructions created
437 // for a single VM instruction. Additionally records information
438 // about hidden and implicit values used by the machine instructions:
439 // about hidden values used by the machine instructions:
441 // "Temporary values" are intermediate values used in the machine
442 // instruction sequence, but not in the VM instruction
443 // Note that such values should be treated as pure SSA values with
444 // no interpretation of their operands (i.e., as a TmpInstruction
445 // object which actually represents such a value).
447 // (2) "Implicit uses" are values used in the VM instruction but not in
448 // the machine instruction sequence
450 //---------------------------------------------------------------------------
452 class MachineCodeForVMInstr: public vector<MachineInstr*>
455 vector<Value*> tempVec; // used by m/c instr but not VM instr
458 /*ctor*/ MachineCodeForVMInstr () {}
459 /*ctor*/ ~MachineCodeForVMInstr ();
461 const vector<Value*>& getTempValues () const { return tempVec; }
462 vector<Value*>& getTempValues () { return tempVec; }
464 void addTempValue (Value* val) { tempVec.push_back(val); }
466 // dropAllReferences() - This function drops all references within
467 // temporary (hidden) instructions created in implementing the original
468 // VM intruction. This ensures there are no remaining "uses" within
469 // these hidden instructions, before the values of a method are freed.
471 // Make this inline because it has to be called from class Instruction
472 // and inlining it avoids a serious circurality in link order.
473 inline void dropAllReferences() {
474 for (unsigned i=0, N=tempVec.size(); i < N; i++)
475 if (Instruction *I = dyn_cast<Instruction>(tempVec[i]))
476 I->dropAllReferences();
481 MachineCodeForVMInstr::~MachineCodeForVMInstr()
483 // Free the Value objects created to hold intermediate values
484 for (unsigned i=0, N=tempVec.size(); i < N; i++)
487 // Free the MachineInstr objects allocated, if any.
488 for (unsigned i=0, N=this->size(); i < N; i++)
493 //---------------------------------------------------------------------------
494 // class MachineCodeForBasicBlock
497 // Representation of the sequence of machine instructions created
498 // for a basic block.
499 //---------------------------------------------------------------------------
502 class MachineCodeForBasicBlock: public vector<MachineInstr*> {
504 typedef vector<MachineInstr*>::iterator iterator;
505 typedef vector<const MachineInstr*>::const_iterator const_iterator;
509 //---------------------------------------------------------------------------
510 // class MachineCodeForMethod
513 // Collect native machine code information for a method.
514 // This allows target-specific information about the generated code
515 // to be stored with each method.
516 //---------------------------------------------------------------------------
520 class MachineCodeForMethod: public NonCopyable, private Annotation {
522 static AnnotationID AID;
524 const Method* method;
526 unsigned staticStackSize;
527 unsigned automaticVarsSize;
528 unsigned regSpillsSize;
529 unsigned currentOptionalArgsSize;
530 unsigned maxOptionalArgsSize;
531 unsigned currentTmpValuesSize;
532 hash_set<const Constant*> constantsForConstPool;
533 hash_map<const Value*, int> offsets;
534 // hash_map<const Value*, int> offsetsFromSP;
537 /*ctor*/ MachineCodeForMethod(const Method* method,
538 const TargetMachine& target);
540 // The next two methods are used to construct and to retrieve
541 // the MachineCodeForMethod object for the given method.
542 // construct() -- Allocates and initializes for a given method and target
543 // get() -- Returns a handle to the object.
544 // This should not be called before "construct()"
545 // for a given Method.
547 inline static MachineCodeForMethod& construct(const Method* method,
548 const TargetMachine& target)
550 assert(method->getAnnotation(MachineCodeForMethod::AID) == NULL &&
551 "Object already exists for this method!");
552 MachineCodeForMethod* mcInfo = new MachineCodeForMethod(method, target);
553 method->addAnnotation(mcInfo);
557 inline static MachineCodeForMethod& get(const Method* method)
559 MachineCodeForMethod* mc = (MachineCodeForMethod*)
560 method->getAnnotation(MachineCodeForMethod::AID);
561 assert(mc && "Call construct() method first to allocate the object");
566 // Accessors for global information about generated code for a method.
568 inline bool isCompiledAsLeafMethod() const { return compiledAsLeaf; }
569 inline unsigned getStaticStackSize() const { return staticStackSize; }
570 inline unsigned getAutomaticVarsSize() const { return automaticVarsSize; }
571 inline unsigned getRegSpillsSize() const { return regSpillsSize; }
572 inline unsigned getMaxOptionalArgsSize() const { return maxOptionalArgsSize;}
573 inline unsigned getCurrentOptionalArgsSize() const
574 { return currentOptionalArgsSize;}
575 inline const hash_set<const Constant*>&
576 getConstantPoolValues() const {return constantsForConstPool;}
579 // Modifiers used during code generation
581 void initializeFrameLayout (const TargetMachine& target);
583 void addToConstantPool (const Constant* constVal)
584 { constantsForConstPool.insert(constVal); }
586 inline void markAsLeafMethod() { compiledAsLeaf = true; }
588 int allocateLocalVar (const TargetMachine& target,
590 unsigned int size = 0);
592 int allocateSpilledValue (const TargetMachine& target,
595 int allocateOptionalArg (const TargetMachine& target,
598 void resetOptionalArgs (const TargetMachine& target);
600 int pushTempValue (const TargetMachine& target,
603 void popAllTempValues (const TargetMachine& target);
605 int getOffset (const Value* val) const;
607 // int getOffsetFromFP (const Value* val) const;
612 inline void incrementAutomaticVarsSize(int incr) {
613 automaticVarsSize+= incr;
614 staticStackSize += incr;
616 inline void incrementRegSpillsSize(int incr) {
617 regSpillsSize+= incr;
618 staticStackSize += incr;
620 inline void incrementCurrentOptionalArgsSize(int incr) {
621 currentOptionalArgsSize+= incr; // stack size already includes this!
626 //---------------------------------------------------------------------------
628 //---------------------------------------------------------------------------
631 ostream& operator<< (ostream& os, const MachineInstr& minstr);
634 ostream& operator<< (ostream& os, const MachineOperand& mop);
637 void PrintMachineInstructions(const Method *method);
640 //**************************************************************************/