1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
20 #include "llvm/Support/DataTypes.h"
21 #include "llvm/Support/Streams.h"
30 class MachineBasicBlock;
31 class TargetInstrDescriptor;
35 template <typename T> struct ilist_traits;
36 template <typename T> struct ilist;
38 //===----------------------------------------------------------------------===//
39 // class MachineOperand
41 // Representation of each machine instruction operand.
43 struct MachineOperand {
44 enum MachineOperandType {
45 MO_Register, // Register operand.
46 MO_Immediate, // Immediate Operand
47 MO_MachineBasicBlock, // MachineBasicBlock reference
48 MO_FrameIndex, // Abstract Stack Frame Index
49 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
50 MO_JumpTableIndex, // Address of indexed Jump Table for switch
51 MO_ExternalSymbol, // Name of external global symbol
52 MO_GlobalAddress // Address of a global value
57 GlobalValue *GV; // For MO_GlobalAddress.
58 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
59 const char *SymbolName; // For MO_ExternalSymbol.
60 unsigned RegNo; // For MO_Register.
61 int64_t immedVal; // For MO_Immediate and MO_*Index.
64 MachineOperandType opType:8; // Discriminate the union.
65 bool IsDef : 1; // True if this is a def, false if this is a use.
66 bool IsImp : 1; // True if this is an implicit def or use.
68 bool IsKill : 1; // True if this is a reg use and the reg is dead
69 // immediately after the read.
70 bool IsDead : 1; // True if this is a reg def and the reg is dead
71 // immediately after the write. i.e. A register
72 // that is defined but never used.
74 /// auxInfo - auxiliary information used by the MachineOperand
76 /// offset - Offset to address of global or external, only valid for
77 /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
80 /// subReg - SubRegister number, only valid for MO_Register. A value of 0
81 /// indicates the MO_Register has no subReg.
87 void print(std::ostream &os) const;
88 void print(std::ostream *os) const { if (os) print(*os); }
91 MachineOperand(const MachineOperand &M) {
97 static MachineOperand CreateImm(int64_t Val) {
99 Op.opType = MachineOperand::MO_Immediate;
100 Op.contents.immedVal = Val;
105 Op.auxInfo.offset = 0;
109 static MachineOperand CreateFrameIndex(unsigned Idx) {
111 Op.opType = MachineOperand::MO_FrameIndex;
112 Op.contents.immedVal = Idx;
117 Op.auxInfo.offset = 0;
121 const MachineOperand &operator=(const MachineOperand &MO) {
122 contents = MO.contents;
128 auxInfo = MO.auxInfo;
132 /// getType - Returns the MachineOperandType for this operand.
134 MachineOperandType getType() const { return opType; }
136 /// Accessors that tell you what kind of MachineOperand you're looking at.
138 bool isRegister() const { return opType == MO_Register; }
139 bool isImmediate() const { return opType == MO_Immediate; }
140 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
141 bool isFrameIndex() const { return opType == MO_FrameIndex; }
142 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
143 bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
144 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
145 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
147 int64_t getImm() const {
148 assert(isImmediate() && "Wrong MachineOperand accessor");
149 return contents.immedVal;
152 int64_t getImmedValue() const {
153 assert(isImmediate() && "Wrong MachineOperand accessor");
154 return contents.immedVal;
156 MachineBasicBlock *getMBB() const {
157 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
160 MachineBasicBlock *getMachineBasicBlock() const {
161 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
164 void setMachineBasicBlock(MachineBasicBlock *MBB) {
165 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
168 int getFrameIndex() const {
169 assert(isFrameIndex() && "Wrong MachineOperand accessor");
170 return (int)contents.immedVal;
172 unsigned getConstantPoolIndex() const {
173 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
174 return (unsigned)contents.immedVal;
176 unsigned getJumpTableIndex() const {
177 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
178 return (unsigned)contents.immedVal;
180 GlobalValue *getGlobal() const {
181 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
184 int getOffset() const {
185 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
186 "Wrong MachineOperand accessor");
187 return auxInfo.offset;
189 unsigned getSubReg() const {
190 assert(isRegister() && "Wrong MachineOperand accessor");
191 return (unsigned)auxInfo.subReg;
193 const char *getSymbolName() const {
194 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
195 return contents.SymbolName;
199 assert(isRegister() && "Wrong MachineOperand accessor");
203 assert(isRegister() && "Wrong MachineOperand accessor");
207 assert(isRegister() && "Wrong MachineOperand accessor");
211 assert(isRegister() && "Wrong MachineOperand accessor");
215 bool isImplicit() const {
216 assert(isRegister() && "Wrong MachineOperand accessor");
220 assert(isRegister() && "Wrong MachineOperand accessor");
224 bool isKill() const {
225 assert(isRegister() && "Wrong MachineOperand accessor");
228 bool isDead() const {
229 assert(isRegister() && "Wrong MachineOperand accessor");
233 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
237 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
241 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
245 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
249 /// getReg - Returns the register number.
251 unsigned getReg() const {
252 assert(isRegister() && "This is not a register operand!");
253 return contents.RegNo;
256 /// MachineOperand mutators.
258 void setReg(unsigned Reg) {
259 assert(isRegister() && "This is not a register operand!");
260 contents.RegNo = Reg;
263 void setImmedValue(int64_t immVal) {
264 assert(isImmediate() && "Wrong MachineOperand mutator");
265 contents.immedVal = immVal;
267 void setImm(int64_t immVal) {
268 assert(isImmediate() && "Wrong MachineOperand mutator");
269 contents.immedVal = immVal;
272 void setOffset(int Offset) {
273 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
274 isJumpTableIndex()) &&
275 "Wrong MachineOperand accessor");
276 auxInfo.offset = Offset;
278 void setSubReg(unsigned subReg) {
279 assert(isRegister() && "Wrong MachineOperand accessor");
280 auxInfo.subReg = (unsigned char)subReg;
282 void setConstantPoolIndex(unsigned Idx) {
283 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
284 contents.immedVal = Idx;
286 void setJumpTableIndex(unsigned Idx) {
287 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
288 contents.immedVal = Idx;
291 /// isIdenticalTo - Return true if this operand is identical to the specified
292 /// operand. Note: This method ignores isKill and isDead properties.
293 bool isIdenticalTo(const MachineOperand &Other) const;
295 /// ChangeToImmediate - Replace this operand with a new immediate operand of
296 /// the specified value. If an operand is known to be an immediate already,
297 /// the setImmedValue method should be used.
298 void ChangeToImmediate(int64_t ImmVal) {
299 opType = MO_Immediate;
300 contents.immedVal = ImmVal;
303 /// ChangeToRegister - Replace this operand with a new register operand of
304 /// the specified value. If an operand is known to be an register already,
305 /// the setReg method should be used.
306 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
307 bool isKill = false, bool isDead = false) {
308 opType = MO_Register;
309 contents.RegNo = Reg;
316 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop) {
321 friend class MachineInstr;
325 //===----------------------------------------------------------------------===//
326 /// MachineInstr - Representation of each machine instruction.
329 const TargetInstrDescriptor *TID; // Instruction descriptor.
330 unsigned short NumImplicitOps; // Number of implicit operands (which
331 // are determined at construction time).
333 std::vector<MachineOperand> Operands; // the operands
334 MachineInstr* prev, *next; // links for our intrusive list
335 MachineBasicBlock* parent; // pointer to the owning basic block
337 // OperandComplete - Return true if it's illegal to add a new operand
338 bool OperandsComplete() const;
340 MachineInstr(const MachineInstr&);
341 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
343 // Intrusive list support
345 friend struct ilist_traits<MachineInstr>;
348 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
349 /// TID NULL and no operands.
352 /// MachineInstr ctor - This constructor create a MachineInstr and add the
353 /// implicit operands. It reserves space for number of operands specified by
354 /// TargetInstrDescriptor.
355 explicit MachineInstr(const TargetInstrDescriptor &TID, bool NoImp = false);
357 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
358 /// the MachineInstr is created and added to the end of the specified basic
361 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID);
365 const MachineBasicBlock* getParent() const { return parent; }
366 MachineBasicBlock* getParent() { return parent; }
368 /// getInstrDescriptor - Returns the target instruction descriptor of this
370 const TargetInstrDescriptor *getInstrDescriptor() const { return TID; }
372 /// getOpcode - Returns the opcode of this MachineInstr.
374 int getOpcode() const;
376 /// Access to explicit operands of the instruction.
378 unsigned getNumOperands() const { return Operands.size(); }
380 const MachineOperand& getOperand(unsigned i) const {
381 assert(i < getNumOperands() && "getOperand() out of range!");
384 MachineOperand& getOperand(unsigned i) {
385 assert(i < getNumOperands() && "getOperand() out of range!");
389 /// getNumExplicitOperands - Returns the number of non-implicit operands.
391 unsigned getNumExplicitOperands() const;
393 /// isIdenticalTo - Return true if this instruction is identical to (same
394 /// opcode and same operands as) the specified instruction.
395 bool isIdenticalTo(const MachineInstr *Other) const {
396 if (Other->getOpcode() != getOpcode() ||
397 Other->getNumOperands() != getNumOperands())
399 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
400 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
405 /// clone - Create a copy of 'this' instruction that is identical in
406 /// all ways except the the instruction has no parent, prev, or next.
407 MachineInstr* clone() const { return new MachineInstr(*this); }
409 /// removeFromParent - This method unlinks 'this' from the containing basic
410 /// block, and returns it, but does not delete it.
411 MachineInstr *removeFromParent();
413 /// eraseFromParent - This method unlinks 'this' from the containing basic
414 /// block and deletes it.
415 void eraseFromParent() {
416 delete removeFromParent();
419 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
420 /// the specific register or -1 if it is not found. It further tightening
421 /// the search criteria to a use that kills the register if isKill is true.
422 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const;
424 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
425 /// the specific register or NULL if it is not found.
426 MachineOperand *findRegisterDefOperand(unsigned Reg);
428 /// findFirstPredOperandIdx() - Find the index of the first operand in the
429 /// operand list that is used to represent the predicate. It returns -1 if
431 int findFirstPredOperandIdx() const;
433 /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
434 /// to two addr elimination.
435 bool isRegReDefinedByTwoAddr(unsigned Reg) const;
437 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
439 void copyKillDeadInfo(const MachineInstr *MI);
441 /// copyPredicates - Copies predicate operand(s) from MI.
442 void copyPredicates(const MachineInstr *MI);
447 void print(std::ostream *OS, const TargetMachine *TM) const {
448 if (OS) print(*OS, TM);
450 void print(std::ostream &OS, const TargetMachine *TM) const;
451 void print(std::ostream &OS) const;
452 void print(std::ostream *OS) const { if (OS) print(*OS); }
454 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr){
459 //===--------------------------------------------------------------------===//
460 // Accessors to add operands when building up machine instructions.
463 /// addRegOperand - Add a register operand.
465 void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false,
466 bool IsKill = false, bool IsDead = false,
467 unsigned SubReg = 0) {
468 MachineOperand &Op = AddNewOperand(IsImp);
469 Op.opType = MachineOperand::MO_Register;
474 Op.contents.RegNo = Reg;
475 Op.auxInfo.subReg = (unsigned char)SubReg;
478 /// addImmOperand - Add a zero extended constant argument to the
479 /// machine instruction.
481 void addImmOperand(int64_t Val) {
482 MachineOperand &Op = AddNewOperand();
483 Op.opType = MachineOperand::MO_Immediate;
484 Op.contents.immedVal = Val;
485 Op.auxInfo.offset = 0;
488 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
489 MachineOperand &Op = AddNewOperand();
490 Op.opType = MachineOperand::MO_MachineBasicBlock;
491 Op.contents.MBB = MBB;
492 Op.auxInfo.offset = 0;
495 /// addFrameIndexOperand - Add an abstract frame index to the instruction
497 void addFrameIndexOperand(unsigned Idx) {
498 MachineOperand &Op = AddNewOperand();
499 Op.opType = MachineOperand::MO_FrameIndex;
500 Op.contents.immedVal = Idx;
501 Op.auxInfo.offset = 0;
504 /// addConstantPoolndexOperand - Add a constant pool object index to the
507 void addConstantPoolIndexOperand(unsigned Idx, int Offset) {
508 MachineOperand &Op = AddNewOperand();
509 Op.opType = MachineOperand::MO_ConstantPoolIndex;
510 Op.contents.immedVal = Idx;
511 Op.auxInfo.offset = Offset;
514 /// addJumpTableIndexOperand - Add a jump table object index to the
517 void addJumpTableIndexOperand(unsigned Idx) {
518 MachineOperand &Op = AddNewOperand();
519 Op.opType = MachineOperand::MO_JumpTableIndex;
520 Op.contents.immedVal = Idx;
521 Op.auxInfo.offset = 0;
524 void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
525 MachineOperand &Op = AddNewOperand();
526 Op.opType = MachineOperand::MO_GlobalAddress;
528 Op.auxInfo.offset = Offset;
531 /// addExternalSymbolOperand - Add an external symbol operand to this instr
533 void addExternalSymbolOperand(const char *SymName) {
534 MachineOperand &Op = AddNewOperand();
535 Op.opType = MachineOperand::MO_ExternalSymbol;
536 Op.contents.SymbolName = SymName;
537 Op.auxInfo.offset = 0;
540 //===--------------------------------------------------------------------===//
541 // Accessors used to modify instructions in place.
544 /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of
545 /// the current instruction with a new one.
547 void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; }
549 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
550 /// fewer operand than it started with.
552 void RemoveOperand(unsigned i) {
553 Operands.erase(Operands.begin()+i);
556 MachineOperand &AddNewOperand(bool IsImp = false) {
557 assert((IsImp || !OperandsComplete()) &&
558 "Trying to add an operand to a machine instr that is already done!");
559 if (IsImp || NumImplicitOps == 0) { // This is true most of the time.
560 Operands.push_back(MachineOperand());
561 return Operands.back();
563 return *Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps,
567 /// addImplicitDefUseOperands - Add all implicit def and use operands to
568 /// this instruction.
569 void addImplicitDefUseOperands();
572 //===----------------------------------------------------------------------===//
575 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
576 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
578 } // End llvm namespace