1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class ---------*- C++ -*--=//
3 // This file contains the declaration of the MachineInstr class, which is the
4 // basic representation for all target dependant machine instructions used by
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
10 #define LLVM_CODEGEN_MACHINEINSTR_H
12 #include "llvm/Target/MachineInstrInfo.h"
13 #include "llvm/Annotation.h"
17 //---------------------------------------------------------------------------
18 // class MachineOperand
21 // Representation of each machine instruction operand.
22 // This class is designed so that you can allocate a vector of operands
23 // first and initialize each one later.
25 // E.g, for this VM instruction:
26 // ptr = alloca type, numElements
27 // we generate 2 machine instructions on the SPARC:
29 // mul Constant, Numelements -> Reg
30 // add %sp, Reg -> Ptr
32 // Each instruction has 3 operands, listed above. Of those:
33 // - Reg, NumElements, and Ptr are of operand type MO_Register.
34 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
36 // For the register operands, the virtual register type is as follows:
38 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
39 // MachineInstr* minstr will point to the instruction that computes reg.
41 // - %sp will be of virtual register type MO_MachineReg.
42 // The field regNum identifies the machine register.
44 // - NumElements will be of virtual register type MO_VirtualReg.
45 // The field Value* value identifies the value.
47 // - Ptr will also be of virtual register type MO_VirtualReg.
48 // Again, the field Value* value identifies the value.
50 //---------------------------------------------------------------------------
53 class MachineOperand {
55 enum MachineOperandType {
56 MO_VirtualRegister, // virtual register for *value
57 MO_MachineRegister, // pre-assigned machine register `regNum'
65 MachineOperandType opType;
68 Value* value; // BasicBlockVal for a label operand.
69 // ConstantVal for a non-address immediate.
70 // Virtual register for an SSA operand,
71 // including hidden operands required for
72 // the generated machine code.
73 int64_t immedVal; // constant value for an explicit constant
76 int regNum; // register number for an explicit register
77 // will be set for a value after reg allocation
78 bool isDef; // is this a defition for the value
81 /*ctor*/ MachineOperand ();
82 /*ctor*/ MachineOperand (MachineOperandType operandType,
84 /*copy ctor*/ MachineOperand (const MachineOperand&);
85 /*dtor*/ ~MachineOperand () {}
87 // Accessor methods. Caller is responsible for checking the
88 // operand type before invoking the corresponding accessor.
90 inline MachineOperandType getOperandType() const {
93 inline Value* getVRegValue () const {
94 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
95 opType == MO_PCRelativeDisp);
98 inline int getMachineRegNum() const {
99 assert(opType == MO_MachineRegister);
102 inline int64_t getImmedValue () const {
103 assert(opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed);
106 inline bool opIsDef () const {
111 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
115 // These functions are provided so that a vector of operands can be
116 // statically allocated and individual ones can be initialized later.
117 // Give class MachineInstr gets access to these functions.
119 void Initialize (MachineOperandType operandType,
121 void InitializeConst (MachineOperandType operandType,
123 void InitializeReg (int regNum,
126 friend class MachineInstr;
130 // replaces the Value with its corresponding physical register after
131 // register allocation is complete
132 void setRegForValue(int reg) {
133 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
134 opType == MO_MachineRegister);
138 // used to get the reg number if when one is allocted (must be
139 // called only after reg alloc)
140 inline int getAllocatedRegNum() const {
141 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
142 opType == MO_MachineRegister);
151 MachineOperand::MachineOperand()
152 : opType(MO_VirtualRegister),
159 MachineOperand::MachineOperand(MachineOperandType operandType,
161 : opType(operandType),
168 MachineOperand::MachineOperand(const MachineOperand& mo)
173 case MO_VirtualRegister:
174 case MO_CCRegister: value = mo.value; break;
175 case MO_MachineRegister: regNum = mo.regNum; break;
176 case MO_SignExtendedImmed:
177 case MO_UnextendedImmed:
178 case MO_PCRelativeDisp: immedVal = mo.immedVal; break;
184 MachineOperand::Initialize(MachineOperandType operandType,
187 opType = operandType;
193 MachineOperand::InitializeConst(MachineOperandType operandType,
196 opType = operandType;
203 MachineOperand::InitializeReg(int _regNum, bool isCCReg)
205 opType = isCCReg? MO_CCRegister : MO_MachineRegister;
207 regNum = (int) _regNum;
211 //---------------------------------------------------------------------------
212 // class MachineInstr
215 // Representation of each machine instruction.
217 // MachineOpCode must be an enum, defined separately for each target.
218 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
220 // opCodeMask is used to record variants of an instruction.
221 // E.g., each branch instruction on SPARC has 2 flags (i.e., 4 variants):
222 // ANNUL: if 1: Annul delay slot instruction.
223 // PREDICT-NOT-TAKEN: if 1: predict branch not taken.
224 // Instead of creating 4 different opcodes for BNZ, we create a single
225 // opcode and set bits in opCodeMask for each of these flags.
227 // There are 2 kinds of operands:
229 // (1) Explicit operands of the machine instruction in vector operands[]
231 // (2) "Implicit operands" are values implicitly used or defined by the
232 // machine instruction, such as arguments to a CALL, return value of
233 // a CALL (if any), and return value of a RETURN.
234 //---------------------------------------------------------------------------
236 class MachineInstr : public Annotable, // Values are annotable
237 public NonCopyableV { // Disable copy operations
238 MachineOpCode opCode;
239 OpCodeMask opCodeMask; // extra bits for variants of an opcode
240 std::vector<MachineOperand> operands;
241 std::vector<Value*> implicitRefs; // values implicitly referenced by this
242 std::vector<bool> implicitIsDef; // machine instruction (eg, call args)
245 /*ctor*/ MachineInstr (MachineOpCode _opCode,
246 OpCodeMask _opCodeMask = 0x0);
247 /*ctor*/ MachineInstr (MachineOpCode _opCode,
248 unsigned numOperands,
249 OpCodeMask _opCodeMask = 0x0);
250 inline ~MachineInstr () {}
251 const MachineOpCode getOpCode () const { return opCode; }
254 // Information about explicit operands of the instruction
256 unsigned int getNumOperands () const { return operands.size(); }
258 bool operandIsDefined(unsigned i) const;
260 const MachineOperand& getOperand (unsigned i) const;
261 MachineOperand& getOperand (unsigned i);
264 // Information about implicit operands of the instruction
266 unsigned getNumImplicitRefs() const{return implicitRefs.size();}
268 bool implicitRefIsDefined(unsigned i) const;
270 const Value* getImplicitRef (unsigned i) const;
271 Value* getImplicitRef (unsigned i);
276 void dump (unsigned int indent = 0) const;
277 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
281 // Define iterators to access the Value operands of the Machine Instruction.
282 // begin() and end() are defined to produce these iterators...
284 template<class _MI, class _V> class ValOpIterator;
285 typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
286 typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
289 // Access to set the operands when building the machine instruction
290 void SetMachineOperandVal(unsigned i,
291 MachineOperand::MachineOperandType operandType,
292 Value* _val, bool isDef=false);
293 void SetMachineOperandConst(unsigned i,
294 MachineOperand::MachineOperandType operandType,
296 void SetMachineOperandReg(unsigned i,
301 void addImplicitRef (Value* val,
304 void setImplicitRef (unsigned i,
308 template<class MITy, class VTy>
309 class ValOpIterator : public std::forward_iterator<VTy, ptrdiff_t> {
313 inline void skipToNextVal() {
314 while (i < MI->getNumOperands() &&
315 !((MI->getOperand(i).getOperandType() == MachineOperand::MO_VirtualRegister ||
316 MI->getOperand(i).getOperandType() == MachineOperand::MO_CCRegister)
317 && MI->getOperand(i).getVRegValue() != 0))
321 inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
326 typedef ValOpIterator<MITy, VTy> _Self;
328 inline VTy operator*() const { return MI->getOperand(i).getVRegValue(); }
330 const MachineOperand &getMachineOperand() const {
331 return MI->getOperand(i);
334 inline VTy operator->() const { return operator*(); }
336 inline bool isDef() const { return MI->getOperand(i).opIsDef(); }
338 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
339 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
341 inline bool operator==(const _Self &y) const {
344 inline bool operator!=(const _Self &y) const {
345 return !operator==(y);
348 static _Self begin(MITy MI) {
351 static _Self end(MITy MI) {
352 return _Self(MI, MI->getNumOperands());
356 // define begin() and end()
357 val_op_iterator begin() { return val_op_iterator::begin(this); }
358 val_op_iterator end() { return val_op_iterator::end(this); }
360 const_val_op_iterator begin() const {
361 return const_val_op_iterator::begin(this);
363 const_val_op_iterator end() const {
364 return const_val_op_iterator::end(this);
369 inline MachineOperand&
370 MachineInstr::getOperand(unsigned int i)
372 assert(i < operands.size() && "getOperand() out of range!");
376 inline const MachineOperand&
377 MachineInstr::getOperand(unsigned int i) const
379 assert(i < operands.size() && "getOperand() out of range!");
384 MachineInstr::operandIsDefined(unsigned int i) const
386 return getOperand(i).opIsDef();
390 MachineInstr::implicitRefIsDefined(unsigned int i) const
392 assert(i < implicitIsDef.size() && "operand out of range!");
393 return implicitIsDef[i];
397 MachineInstr::getImplicitRef(unsigned int i) const
399 assert(i < implicitRefs.size() && "getImplicitRef() out of range!");
400 return implicitRefs[i];
404 MachineInstr::getImplicitRef(unsigned int i)
406 assert(i < implicitRefs.size() && "getImplicitRef() out of range!");
407 return implicitRefs[i];
411 MachineInstr::addImplicitRef(Value* val,
414 implicitRefs.push_back(val);
415 implicitIsDef.push_back(isDef);
419 MachineInstr::setImplicitRef(unsigned int i,
423 assert(i < implicitRefs.size() && "setImplicitRef() out of range!");
424 implicitRefs[i] = val;
425 implicitIsDef[i] = isDef;
430 //---------------------------------------------------------------------------
431 // class MachineCodeForBasicBlock
434 // Representation of the sequence of machine instructions created
435 // for a basic block.
436 //---------------------------------------------------------------------------
439 class MachineCodeForBasicBlock {
440 std::vector<MachineInstr*> Insts;
442 ~MachineCodeForBasicBlock() {
444 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
449 typedef std::vector<MachineInstr*>::iterator iterator;
450 typedef std::vector<MachineInstr*>::const_iterator const_iterator;
451 typedef std::reverse_iterator<const_iterator> const_reverse_iterator;
452 typedef std::reverse_iterator<iterator> reverse_iterator;
454 unsigned size() const { return Insts.size(); }
455 bool empty() const { return Insts.empty(); }
457 MachineInstr * operator[](unsigned i) const { return Insts[i]; }
458 MachineInstr *&operator[](unsigned i) { return Insts[i]; }
460 MachineInstr *front() const { return Insts.front(); }
461 MachineInstr *back() const { return Insts.back(); }
463 iterator begin() { return Insts.begin(); }
464 const_iterator begin() const { return Insts.begin(); }
465 iterator end() { return Insts.end(); }
466 const_iterator end() const { return Insts.end(); }
467 reverse_iterator rbegin() { return Insts.rbegin(); }
468 const_reverse_iterator rbegin() const { return Insts.rbegin(); }
469 reverse_iterator rend () { return Insts.rend(); }
470 const_reverse_iterator rend () const { return Insts.rend(); }
472 void push_back(MachineInstr *MI) { Insts.push_back(MI); }
473 template<typename IT>
474 void insert(iterator I, IT S, IT E) { Insts.insert(I, S, E); }
475 iterator insert(iterator I, MachineInstr *M) { return Insts.insert(I, M); }
477 // erase - Remove the specified range from the instruction list. This does
478 // not delete in instructions removed.
480 iterator erase(iterator I, iterator E) { return Insts.erase(I, E); }
482 MachineInstr *pop_back() {
483 MachineInstr *R = back();
490 //---------------------------------------------------------------------------
492 //---------------------------------------------------------------------------
495 std::ostream& operator<< (std::ostream& os, const MachineInstr& minstr);
498 std::ostream& operator<< (std::ostream& os, const MachineOperand& mop);
501 void PrintMachineInstructions(const Function *F);