1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
28 class MachineBasicBlock;
32 template <typename T> class ilist_traits;
33 template <typename T> class ilist;
35 typedef short MachineOpCode;
37 //===----------------------------------------------------------------------===//
38 // class MachineOperand
41 // Representation of each machine instruction operand.
42 // This class is designed so that you can allocate a vector of operands
43 // first and initialize each one later.
45 // E.g, for this VM instruction:
46 // ptr = alloca type, numElements
47 // we generate 2 machine instructions on the SPARC:
49 // mul Constant, Numelements -> Reg
50 // add %sp, Reg -> Ptr
52 // Each instruction has 3 operands, listed above. Of those:
53 // - Reg, NumElements, and Ptr are of operand type MO_Register.
54 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
56 // For the register operands, the virtual register type is as follows:
58 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
59 // MachineInstr* minstr will point to the instruction that computes reg.
61 // - %sp will be of virtual register type MO_MachineReg.
62 // The field regNum identifies the machine register.
64 // - NumElements will be of virtual register type MO_VirtualReg.
65 // The field Value* value identifies the value.
67 // - Ptr will also be of virtual register type MO_VirtualReg.
68 // Again, the field Value* value identifies the value.
70 //===----------------------------------------------------------------------===//
72 struct MachineOperand {
74 // Bit fields of the flags variable used for different operand properties
76 DEFFLAG = 0x01, // this is a def of the operand
77 USEFLAG = 0x02, // this is a use of the operand
78 HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
79 LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
80 HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
81 LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
82 PCRELATIVE = 0x40, // Operand is relative to PC, not a global address
86 // UseType - This enum describes how the machine operand is used by
87 // the instruction. Note that the MachineInstr/Operator class
88 // currently uses bool arguments to represent this information
89 // instead of an enum. Eventually this should change over to use
90 // this _easier to read_ representation instead.
93 Use = USEFLAG, /// only read
94 Def = DEFFLAG, /// only written
95 UseAndDef = Use | Def /// read AND written
98 enum MachineOperandType {
99 MO_VirtualRegister, // virtual register for *value
100 MO_MachineRegister, // pre-assigned machine register `regNum'
102 MO_SignExtendedImmed,
105 MO_MachineBasicBlock, // MachineBasicBlock reference
106 MO_FrameIndex, // Abstract Stack Frame Index
107 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
108 MO_ExternalSymbol, // Name of external global symbol
109 MO_GlobalAddress, // Address of a global value
114 Value* value; // BasicBlockVal for a label operand.
115 // ConstantVal for a non-address immediate.
116 // Virtual register for an SSA operand,
117 // including hidden operands required for
118 // the generated machine code.
119 // LLVM global for MO_GlobalAddress.
121 int immedVal; // Constant value for an explicit constant
123 MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
124 std::string *SymbolName; // For MO_ExternalSymbol type
127 char flags; // see bit field definitions above
128 MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
130 int regNum; // register number for an explicit register
131 // will be set for a value after reg allocation
133 int offset; // Offset to address of global or external, only
134 // valid for MO_GlobalAddress and MO_ExternalSym
137 void zeroContents () {
138 memset (&contents, 0, sizeof (contents));
139 memset (&extra, 0, sizeof (extra));
142 MachineOperand(int ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
143 : flags(0), opType(OpTy) {
145 contents.immedVal = ImmVal;
149 MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
150 : flags(UseTy), opType(OpTy) {
155 MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
156 bool isPCRelative = false, int Offset = 0)
157 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
160 extra.offset = Offset;
163 MachineOperand(MachineBasicBlock *mbb)
164 : flags(0), opType(MO_MachineBasicBlock) {
170 MachineOperand(const std::string &SymName, bool isPCRelative, int Offset)
171 : flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
173 contents.SymbolName = new std::string (SymName);
174 extra.offset = Offset;
178 MachineOperand(const MachineOperand &M)
179 : flags(M.flags), opType(M.opType) {
181 contents = M.contents;
183 if (isExternalSymbol())
184 contents.SymbolName = new std::string(M.getSymbolName());
189 if (isExternalSymbol())
190 delete contents.SymbolName;
193 const MachineOperand &operator=(const MachineOperand &MO) {
194 if (isExternalSymbol()) // if old operand had a symbol name,
195 delete contents.SymbolName; // release old memory
196 contents = MO.contents;
200 if (isExternalSymbol())
201 contents.SymbolName = new std::string(MO.getSymbolName());
205 /// getType - Returns the MachineOperandType for this operand.
207 MachineOperandType getType() const { return opType; }
209 /// getUseType - Returns the MachineOperandUseType of this operand.
211 UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
213 /// isPCRelative - This returns the value of the PCRELATIVE flag, which
214 /// indicates whether this operand should be emitted as a PC relative value
215 /// instead of a global address. This is used for operands of the forms:
216 /// MachineBasicBlock, GlobalAddress, ExternalSymbol
218 bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
220 /// isRegister - Return true if this operand is a register operand. The X86
221 /// backend currently can't decide whether to use MO_MR or MO_VR to represent
222 /// them, so we accept both.
224 /// Note: The sparc backend should not use this method.
226 bool isRegister() const {
227 return opType == MO_MachineRegister || opType == MO_VirtualRegister;
230 /// Accessors that tell you what kind of MachineOperand you're looking at.
232 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
233 bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
234 bool isImmediate() const {
235 return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
237 bool isFrameIndex() const { return opType == MO_FrameIndex; }
238 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
239 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
240 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
242 /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
243 /// has one. This is deprecated and only used by the SPARC v9 backend.
245 Value* getVRegValueOrNull() const {
246 return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
247 isPCRelativeDisp()) ? contents.value : NULL;
250 /// MachineOperand accessors that only work on certain types of
251 /// MachineOperand...
253 Value* getVRegValue() const {
254 assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
255 || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
256 return contents.value;
258 int getMachineRegNum() const {
259 assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
262 int getImmedValue() const {
263 assert(isImmediate() && "Wrong MachineOperand accessor");
264 return contents.immedVal;
266 MachineBasicBlock *getMachineBasicBlock() const {
267 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
270 void setMachineBasicBlock(MachineBasicBlock *MBB) {
271 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
274 int getFrameIndex() const {
275 assert(isFrameIndex() && "Wrong MachineOperand accessor");
276 return contents.immedVal;
278 unsigned getConstantPoolIndex() const {
279 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
280 return contents.immedVal;
282 GlobalValue *getGlobal() const {
283 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
284 return (GlobalValue*)contents.value;
286 int getOffset() const {
287 assert((isGlobalAddress() || isExternalSymbol()) &&
288 "Wrong MachineOperand accessor");
291 const std::string &getSymbolName() const {
292 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
293 return *contents.SymbolName;
296 /// MachineOperand methods for testing that work on any kind of
297 /// MachineOperand...
299 bool isUse () const { return flags & USEFLAG; }
300 MachineOperand& setUse () { flags |= USEFLAG; return *this; }
301 bool isDef () const { return flags & DEFFLAG; }
302 MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
303 bool isHiBits32 () const { return flags & HIFLAG32; }
304 bool isLoBits32 () const { return flags & LOFLAG32; }
305 bool isHiBits64 () const { return flags & HIFLAG64; }
306 bool isLoBits64 () const { return flags & LOFLAG64; }
308 /// hasAllocatedReg - Returns true iff a machine register has been
309 /// allocated to this operand.
311 bool hasAllocatedReg() const {
312 return (extra.regNum >= 0 &&
313 (opType == MO_VirtualRegister || opType == MO_CCRegister ||
314 opType == MO_MachineRegister));
317 /// getReg - Returns the register number. It is a runtime error to call this
318 /// if a register is not allocated.
320 unsigned getReg() const {
321 assert(hasAllocatedReg());
325 /// MachineOperand mutators...
327 void setReg(unsigned Reg) {
328 // This method's comment used to say: 'TODO: get rid of this duplicate
329 // code.' It's not clear where the duplication is.
330 assert(hasAllocatedReg() && "This operand cannot have a register number!");
334 void setValueReg(Value *val) {
335 assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
336 contents.value = val;
339 void setImmedValue(int immVal) {
340 assert(isImmediate() && "Wrong MachineOperand mutator");
341 contents.immedVal = immVal;
344 void setOffset(int Offset) {
345 assert((isGlobalAddress() || isExternalSymbol()) &&
346 "Wrong MachineOperand accessor");
347 extra.offset = Offset;
350 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
352 /// markHi32, markLo32, etc. - These methods are deprecated and only used by
353 /// the SPARC v9 back-end.
355 void markHi32() { flags |= HIFLAG32; }
356 void markLo32() { flags |= LOFLAG32; }
357 void markHi64() { flags |= HIFLAG64; }
358 void markLo64() { flags |= LOFLAG64; }
361 /// setRegForValue - Replaces the Value with its corresponding physical
362 /// register after register allocation is complete. This is deprecated
363 /// and only used by the SPARC v9 back-end.
365 void setRegForValue(int reg) {
366 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
367 opType == MO_MachineRegister);
371 friend class MachineInstr;
375 //===----------------------------------------------------------------------===//
376 // class MachineInstr
379 // Representation of each machine instruction.
381 // MachineOpCode must be an enum, defined separately for each target.
382 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
384 // There are 2 kinds of operands:
386 // (1) Explicit operands of the machine instruction in vector operands[]
388 // (2) "Implicit operands" are values implicitly used or defined by the
389 // machine instruction, such as arguments to a CALL, return value of
390 // a CALL (if any), and return value of a RETURN.
391 //===----------------------------------------------------------------------===//
394 short Opcode; // the opcode
395 unsigned char numImplicitRefs; // number of implicit operands
396 std::vector<MachineOperand> operands; // the operands
397 MachineInstr* prev, *next; // links for our intrusive list
398 MachineBasicBlock* parent; // pointer to the owning basic block
400 // OperandComplete - Return true if it's illegal to add a new operand
401 bool OperandsComplete() const;
403 //Constructor used by clone() method
404 MachineInstr(const MachineInstr&);
406 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
408 // Intrusive list support
410 friend class ilist_traits<MachineInstr>;
413 MachineInstr(short Opcode, unsigned numOperands);
415 /// MachineInstr ctor - This constructor only does a _reserve_ of the
416 /// operands, not a resize for them. It is expected that if you use this that
417 /// you call add* methods below to fill up the operands, instead of the Set
418 /// methods. Eventually, the "resizing" ctors will be phased out.
420 MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
422 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
423 /// the MachineInstr is created and added to the end of the specified basic
426 MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
430 const MachineBasicBlock* getParent() const { return parent; }
431 MachineBasicBlock* getParent() { return parent; }
433 /// getOpcode - Returns the opcode of this MachineInstr.
435 const int getOpcode() const { return Opcode; }
437 /// Access to explicit operands of the instruction.
439 unsigned getNumOperands() const { return operands.size() - numImplicitRefs; }
441 const MachineOperand& getOperand(unsigned i) const {
442 assert(i < getNumOperands() && "getOperand() out of range!");
445 MachineOperand& getOperand(unsigned i) {
446 assert(i < getNumOperands() && "getOperand() out of range!");
451 // Access to explicit or implicit operands of the instruction
452 // This returns the i'th entry in the operand vector.
453 // That represents the i'th explicit operand or the (i-N)'th implicit operand,
454 // depending on whether i < N or i >= N.
456 const MachineOperand& getExplOrImplOperand(unsigned i) const {
457 assert(i < operands.size() && "getExplOrImplOperand() out of range!");
458 return (i < getNumOperands()? getOperand(i)
459 : getImplicitOp(i - getNumOperands()));
463 // Access to implicit operands of the instruction
465 unsigned getNumImplicitRefs() const{ return numImplicitRefs; }
467 MachineOperand& getImplicitOp(unsigned i) {
468 assert(i < numImplicitRefs && "implicit ref# out of range!");
469 return operands[i + operands.size() - numImplicitRefs];
471 const MachineOperand& getImplicitOp(unsigned i) const {
472 assert(i < numImplicitRefs && "implicit ref# out of range!");
473 return operands[i + operands.size() - numImplicitRefs];
476 Value* getImplicitRef(unsigned i) {
477 return getImplicitOp(i).getVRegValue();
479 const Value* getImplicitRef(unsigned i) const {
480 return getImplicitOp(i).getVRegValue();
483 void addImplicitRef(Value* V, bool isDef = false, bool isDefAndUse = false) {
485 addRegOperand(V, isDef, isDefAndUse);
487 void setImplicitRef(unsigned i, Value* V) {
488 assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!");
489 SetMachineOperandVal(i + getNumOperands(),
490 MachineOperand::MO_VirtualRegister, V);
493 /// clone - Create a copy of 'this' instruction that is identical in
494 /// all ways except the the instruction has no parent, prev, or next.
495 MachineInstr* clone() const;
500 void print(std::ostream &OS, const TargetMachine *TM) const;
502 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
505 // Define iterators to access the Value operands of the Machine Instruction.
506 // Note that these iterators only enumerate the explicit operands.
507 // begin() and end() are defined to produce these iterators...
509 template<class _MI, class _V> class ValOpIterator;
510 typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
511 typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
514 //===--------------------------------------------------------------------===//
515 // Accessors to add operands when building up machine instructions
518 /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
521 void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
522 assert(!OperandsComplete() &&
523 "Trying to add an operand to a machine instr that is already done!");
525 MachineOperand(V, MachineOperand::MO_VirtualRegister,
526 !isDef ? MachineOperand::Use :
527 (isDefAndUse ? MachineOperand::UseAndDef :
528 MachineOperand::Def)));
531 void addRegOperand(Value *V,
532 MachineOperand::UseType UTy = MachineOperand::Use,
533 bool isPCRelative = false) {
534 assert(!OperandsComplete() &&
535 "Trying to add an operand to a machine instr that is already done!");
536 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
540 void addCCRegOperand(Value *V,
541 MachineOperand::UseType UTy = MachineOperand::Use) {
542 assert(!OperandsComplete() &&
543 "Trying to add an operand to a machine instr that is already done!");
544 operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
549 /// addRegOperand - Add a symbolic virtual register reference...
551 void addRegOperand(int reg, bool isDef) {
552 assert(!OperandsComplete() &&
553 "Trying to add an operand to a machine instr that is already done!");
555 MachineOperand(reg, MachineOperand::MO_VirtualRegister,
556 isDef ? MachineOperand::Def : MachineOperand::Use));
559 /// addRegOperand - Add a symbolic virtual register reference...
561 void addRegOperand(int reg,
562 MachineOperand::UseType UTy = MachineOperand::Use) {
563 assert(!OperandsComplete() &&
564 "Trying to add an operand to a machine instr that is already done!");
566 MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
569 /// addPCDispOperand - Add a PC relative displacement operand to the MI
571 void addPCDispOperand(Value *V) {
572 assert(!OperandsComplete() &&
573 "Trying to add an operand to a machine instr that is already done!");
575 MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
578 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
580 void addMachineRegOperand(int reg, bool isDef) {
581 assert(!OperandsComplete() &&
582 "Trying to add an operand to a machine instr that is already done!");
584 MachineOperand(reg, MachineOperand::MO_MachineRegister,
585 isDef ? MachineOperand::Def : MachineOperand::Use));
588 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
590 void addMachineRegOperand(int reg,
591 MachineOperand::UseType UTy = MachineOperand::Use) {
592 assert(!OperandsComplete() &&
593 "Trying to add an operand to a machine instr that is already done!");
595 MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy));
598 /// addZeroExtImmOperand - Add a zero extended constant argument to the
599 /// machine instruction.
601 void addZeroExtImmOperand(int intValue) {
602 assert(!OperandsComplete() &&
603 "Trying to add an operand to a machine instr that is already done!");
605 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
608 /// addSignExtImmOperand - Add a zero extended constant argument to the
609 /// machine instruction.
611 void addSignExtImmOperand(int intValue) {
612 assert(!OperandsComplete() &&
613 "Trying to add an operand to a machine instr that is already done!");
615 MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
618 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
619 assert(!OperandsComplete() &&
620 "Trying to add an operand to a machine instr that is already done!");
621 operands.push_back(MachineOperand(MBB));
624 /// addFrameIndexOperand - Add an abstract frame index to the instruction
626 void addFrameIndexOperand(unsigned Idx) {
627 assert(!OperandsComplete() &&
628 "Trying to add an operand to a machine instr that is already done!");
629 operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
632 /// addConstantPoolndexOperand - Add a constant pool object index to the
635 void addConstantPoolIndexOperand(unsigned I) {
636 assert(!OperandsComplete() &&
637 "Trying to add an operand to a machine instr that is already done!");
638 operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
641 void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative, int Offset) {
642 assert(!OperandsComplete() &&
643 "Trying to add an operand to a machine instr that is already done!");
645 MachineOperand((Value*)GV, MachineOperand::MO_GlobalAddress,
646 MachineOperand::Use, isPCRelative, Offset));
649 /// addExternalSymbolOperand - Add an external symbol operand to this instr
651 void addExternalSymbolOperand(const std::string &SymName, bool isPCRelative) {
652 operands.push_back(MachineOperand(SymName, isPCRelative, 0));
655 //===--------------------------------------------------------------------===//
656 // Accessors used to modify instructions in place.
658 // FIXME: Move this stuff to MachineOperand itself!
660 /// replace - Support to rewrite a machine instruction in place: for now,
661 /// simply replace() and then set new operands with Set.*Operand methods
664 void replace(short Opcode, unsigned numOperands);
666 /// setOpcode - Replace the opcode of the current instruction with a new one.
668 void setOpcode(unsigned Op) { Opcode = Op; }
670 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
671 /// fewer operand than it started with.
673 void RemoveOperand(unsigned i) {
674 operands.erase(operands.begin()+i);
677 // Access to set the operands when building the machine instruction
679 void SetMachineOperandVal(unsigned i,
680 MachineOperand::MachineOperandType operandType,
683 void SetMachineOperandConst(unsigned i,
684 MachineOperand::MachineOperandType operandType,
687 void SetMachineOperandReg(unsigned i, int regNum);
690 unsigned substituteValue(const Value* oldVal, Value* newVal,
691 bool defsOnly, bool notDefsAndUses,
692 bool& someArgsWereIgnored);
694 // SetRegForOperand -
695 // SetRegForImplicitRef -
696 // Mark an explicit or implicit operand with its allocated physical register.
698 void SetRegForOperand(unsigned i, int regNum);
699 void SetRegForImplicitRef(unsigned i, int regNum);
702 // Iterator to enumerate machine operands.
704 template<class MITy, class VTy>
705 class ValOpIterator : public forward_iterator<VTy, ptrdiff_t> {
709 void skipToNextVal() {
710 while (i < MI->getNumOperands() &&
711 !( (MI->getOperand(i).getType() == MachineOperand::MO_VirtualRegister ||
712 MI->getOperand(i).getType() == MachineOperand::MO_CCRegister)
713 && MI->getOperand(i).getVRegValue() != 0))
717 inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
722 typedef ValOpIterator<MITy, VTy> _Self;
724 inline VTy operator*() const {
725 return MI->getOperand(i).getVRegValue();
728 const MachineOperand &getMachineOperand() const { return MI->getOperand(i);}
729 MachineOperand &getMachineOperand() { return MI->getOperand(i);}
731 inline VTy operator->() const { return operator*(); }
733 inline bool isUse() const { return MI->getOperand(i).isUse(); }
734 inline bool isDef() const { return MI->getOperand(i).isDef(); }
736 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
737 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
739 inline bool operator==(const _Self &y) const {
742 inline bool operator!=(const _Self &y) const {
743 return !operator==(y);
746 static _Self begin(MITy MI) {
749 static _Self end(MITy MI) {
750 return _Self(MI, MI->getNumOperands());
754 // define begin() and end()
755 val_op_iterator begin() { return val_op_iterator::begin(this); }
756 val_op_iterator end() { return val_op_iterator::end(this); }
758 const_val_op_iterator begin() const {
759 return const_val_op_iterator::begin(this);
761 const_val_op_iterator end() const {
762 return const_val_op_iterator::end(this);
766 //===----------------------------------------------------------------------===//
769 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
770 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
771 void PrintMachineInstructions(const Function *F);
773 } // End llvm namespace